Patents by Inventor Seung Bum Rim

Seung Bum Rim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10665739
    Abstract: A solar cell can include a built-in bypass diode. In one embodiment, the solar cell can include an active region disposed in or above a first portion of a substrate and a bypass diode disposed in or above a second portion of the substrate. The first and second portions of the substrate can be physically separated with a groove. A metallization structure can couple the active region to the bypass diode.
    Type: Grant
    Filed: July 26, 2016
    Date of Patent: May 26, 2020
    Assignee: SunPower Corporation
    Inventors: Seung Bum Rim, Gabriel Harley
  • Patent number: 10629758
    Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a solar cell can include a substrate having a light-receiving surface and a back surface. A first doped region of a first conductivity type, wherein the first doped region is disposed in a first portion of the back surface. A first thin dielectric layer disposed over the back surface of the substrate, where a portion of the first thin dielectric layer is disposed over the first doped region of the first conductivity type. A first semiconductor layer disposed over the first thin dielectric layer. A second doped region of a second conductivity type in the first semiconductor layer, where the second doped region is disposed over a second portion of the back surface. A first conductive contact disposed over the first doped region and a second conductive contact disposed over the second doped region.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: April 21, 2020
    Assignee: SunPower Corporation
    Inventors: Seung Bum Rim, Michael C. Johnson
  • Publication number: 20200111924
    Abstract: Methods of fabricating solar cells using UV-curing of light-receiving surfaces of the solar cells, and the resulting solar cells, are described herein. In an example, a method of fabricating a solar cell includes forming a passivating dielectric layer on a light-receiving surface of a silicon substrate. The method also includes forming an anti-reflective coating (ARC) layer below the passivating dielectric layer. The method also includes exposing the ARC layer to ultra-violet (UV) radiation. The method also includes, subsequent to exposing the ARC layer to ultra-violet (UV) radiation, thermally annealing the ARC layer.
    Type: Application
    Filed: December 5, 2019
    Publication date: April 9, 2020
    Inventors: Yu-Chen Shen, Périne Jaffrennou, Gilles Olav Tanguy Sylvain Poulain, Michael C. Johnson, Seung Bum Rim
  • Publication number: 20200075784
    Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region.
    Type: Application
    Filed: November 8, 2019
    Publication date: March 5, 2020
    Inventors: Seung Bum Rim, David D. Smith, Taiqing Qiu, Staffan Westerberg, Kieran Mark Tracy, Venkatasubramani Balu
  • Publication number: 20190273467
    Abstract: Methods of testing a semiconductor, and semiconductor testing apparatus, are described. In an example, a method for testing a semiconductor can include applying light on the semiconductor to induce photonic degradation. The method can also include receiving a photoluminescence measurement induced from the applied light from the semiconductor and monitoring the photonic degradation of the semiconductor from the photoluminescence measurement.
    Type: Application
    Filed: March 11, 2019
    Publication date: September 5, 2019
    Inventors: Xiuwen Tu, David Aitan Soltz, Michael C. Johnson, Seung Bum Rim, Taiqing Qiu, Yu-Chen Shen, Kieran Mark Tracy
  • Publication number: 20190207041
    Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type region architectures fabricated using an etch paste, and the resulting solar cells, are described herein. In an example, a solar cell includes a plurality of P-type polycrystalline silicon regions is disposed on a first thin dielectric layer disposed on a back surface of an N-type semiconductor substrate. A plurality of N-type polycrystalline silicon regions is disposed on a second thin dielectric layer disposed in a corresponding one of a plurality of trenches interleaving the plurality of P-type polycrystalline silicon regions in the back surface of the N-type semiconductor substrate. A plurality of conductive contact structures is electrically connected to the P-type polycrystalline silicon regions and the N-type polycrystalline silicon regions.
    Type: Application
    Filed: December 29, 2017
    Publication date: July 4, 2019
    Inventors: Seung Bum RIM, David D. SMITH
  • Publication number: 20190207042
    Abstract: Methods of fabricating conductive contacts for polycrystalline silicon features of solar cells, and the resulting solar cells, are described. In an example, a method of fabricating a solar cell includes providing a substrate having a polycrystalline silicon feature. The method also includes forming a conductive paste directly on the polycrystalline silicon feature. The method also includes firing the conductive paste at a temperature above approximately 700 degrees Celsius to form a conductive contact for the polycrystalline silicon feature. The method also includes, subsequent to firing the conductive paste, forming an anti-reflective coating (ARC) layer on the polycrystalline silicon feature and the conductive contact. The method also includes forming a conductive structure in an opening through the ARC layer and electrically contacting the conductive contact.
    Type: Application
    Filed: December 29, 2017
    Publication date: July 4, 2019
    Inventor: Seung Bum RIM
  • Patent number: 10230329
    Abstract: Methods of testing a semiconductor, and semiconductor testing apparatus, are described. In an example, a method for testing a semiconductor can include applying light on the semiconductor to induce photonic degradation. The method can also include receiving a photoluminescence measurement induced from the applied light from the semiconductor and monitoring the photonic degradation of the semiconductor from the photoluminescence measurement.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: March 12, 2019
    Assignee: SunPower Corporation
    Inventors: Xiuwen Tu, David Aitan Soltz, Michael C. Johnson, Seung Bum Rim, Taiqing Qiu, Yu-Chen Shen, Kieran Mark Tracy
  • Publication number: 20190051769
    Abstract: Methods of passivating light-receiving surfaces of solar cells, and the resulting solar cells, are described. In an example, a solar cell includes a silicon substrate having a light-receiving surface. An intrinsic silicon layer is disposed above the light-receiving surface of the silicon substrate. An N-type silicon layer is disposed on the intrinsic silicon layer. A non-conductive anti-reflective coating (ARC) layer is disposed on the N-type silicon layer. In another example, a solar cell includes a silicon substrate having a light-receiving surface. A tunneling dielectric layer is disposed on the light-receiving surface of the silicon substrate. An N-type silicon layer is disposed on the tunneling dielectric layer. A non-conductive anti-reflective coating (ARC) layer is disposed on the N-type silicon layer.
    Type: Application
    Filed: October 17, 2018
    Publication date: February 14, 2019
    Inventors: Seung Bum Rim, Genevieve A. Solomon, Michael C. Johnson, Jérôme Damon-Lacoste, Antoine Marie Olivier Salomon
  • Publication number: 20180190837
    Abstract: Methods of fabricating a solar cell including metallization techniques and resulting solar cells, are described. In an example, forming a first semiconductor region and a second semiconductor region on the back side of a substrate. A first conductive busbar can be formed above the first semiconductor region. A first portion of a second conductive busbar can be formed above the second semiconductor region. A second portion of the second conductive busbar can be formed above the second semiconductor region, where a separation region separates the second portion and the first portion of the second conductive busbar. A third conductive busbar can be formed above the first semiconductor region. A first conductive bridge can be formed above the separation region, where the first conductive bridge electrically connects the first conductive busbar to the third conductive busbar.
    Type: Application
    Filed: December 30, 2016
    Publication date: July 5, 2018
    Inventors: Matthieu Minault Reich, Seung Bum Rim
  • Publication number: 20180190849
    Abstract: Methods of fabricating solar cells having a plurality of sub-cells coupled by cell level interconnection, and the resulting solar cells, are described herein. In an example, a solar cell includes a plurality of sub-cells. Each of the plurality of sub-cells includes a singulated and physically separated semiconductor substrate portion. Each of the plurality of sub-cells includes an on-sub-cell metallization structure interconnecting emitter regions of the sub-cell. An inter-sub-cell metallization structure couples adjacent ones of the plurality of sub-cells. The inter-sub-cell metallization structure is different in composition from the on-sub-cell metallization structure.
    Type: Application
    Filed: December 30, 2016
    Publication date: July 5, 2018
    Inventors: Seung Bum Rim, Hung-Ming Wang, David Okawa, Lewis Abra
  • Publication number: 20180138354
    Abstract: A curing tool for fabricating solar cells using UV-curing of light-receiving surfaces of the solar cells, and the resulting solar cells, are described herein. In an example, a curing tool combines a UV-exposure stage and one or more of a deposition or an annealing stage to fabricate a solar cell. For example, a radiation curing stage can precede a back end processing stage used to perform operations on a back contact solar cell. The curing tool can therefore be used to perform a method to improve UV stability of solar cells.
    Type: Application
    Filed: November 9, 2017
    Publication date: May 17, 2018
    Inventors: Périne Jaffrennou, Gilles Olav Tanguy Sylvain Poulain, Kieran Mark Tracy, Taiqing Qiu, Michael C. Johnson, Seung Bum Rim
  • Publication number: 20180138328
    Abstract: Methods of fabricating solar cells using UV-curing of light-receiving surfaces of the solar cells, and the resulting solar cells, are described herein. In an example, a method of fabricating a solar cell includes forming a passivating dielectric layer on a light-receiving surface of a silicon substrate. The method also includes forming an anti-reflective coating (ARC) layer below the passivating dielectric layer. The method also includes exposing the ARC layer to ultra-violet (UV) radiation. The method also includes, subsequent to exposing the ARC layer to ultra-violet (UV) radiation, thermally annealing the ARC layer.
    Type: Application
    Filed: November 11, 2016
    Publication date: May 17, 2018
    Inventors: Yu-Chen Shen, Périne Jaffrennou, Gilles Olav Tanguy Sylvain Poulain, Michael C. Johnson, Seung Bum Rim
  • Publication number: 20180097131
    Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a solar cell can include a substrate having a light-receiving surface and a back surface. A first doped region of a first conductivity type, wherein the first doped region is disposed in a first portion of the back surface. A first thin dielectric layer disposed over the back surface of the substrate, where a portion of the first thin dielectric layer is disposed over the first doped region of the first conductivity type. A first semiconductor layer disposed over the first thin dielectric layer. A second doped region of a second conductivity type in the first semiconductor layer, where the second doped region is disposed over a second portion of the back surface. A first conductive contact disposed over the first doped region and a second conductive contact disposed over the second doped region.
    Type: Application
    Filed: September 30, 2016
    Publication date: April 5, 2018
    Inventors: Seung Bum Rim, Michael C. Johnson
  • Publication number: 20180040746
    Abstract: Methods of passivating light-receiving surfaces of solar cells with high energy gap (Eg) materials, and the resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface. A passivating dielectric layer is disposed on the light-receiving surface of the substrate. A Group III-nitride material layer is disposed above the passivating dielectric layer. In another example, a solar cell includes a substrate having a light-receiving surface. A passivating dielectric layer is disposed on the light-receiving surface of the substrate. A large direct band gap material layer is disposed above the passivating dielectric layer, the large direct band gap material layer having an energy gap (Eg) of at least approximately 3.3. An anti-reflective coating (ARC) layer disposed on the large direct band gap material layer, the ARC layer comprising a material different from the large direct band gap material layer.
    Type: Application
    Filed: October 13, 2017
    Publication date: February 8, 2018
    Inventors: Michael C. Johnson, Kieran Mark Tracy, Seung Bum Rim, Jara Fernandez Martin, Périne Jaffrennou, Julien Penaud
  • Publication number: 20180033894
    Abstract: One embodiment relates to a method of fabricating a solar cell. A silicon lamina is cleaved from the silicon substrate. The backside of the silicon lamina includes the P-type and N-type doped regions. A metal foil is attached to the backside of the silicon lamina. The metal foil may be used advantageously as a built-in carrier for handling the silicon lamina during processing of a frontside of the silicon lamina. Another embodiment relates to a solar cell that includes a silicon lamina having P-type and N-type doped regions on the backside. A metal foil is adhered to the backside of the lamina, and there are contacts formed between the metal foil and the doped regions. Other embodiments, aspects and features are also disclosed.
    Type: Application
    Filed: October 2, 2017
    Publication date: February 1, 2018
    Applicant: SUNPOWER CORPORATION
    Inventors: Seung Bum RIM, Gabriel HARLEY
  • Patent number: 9825191
    Abstract: Methods of passivating light-receiving surfaces of solar cells with high energy gap (Eg) materials, and the resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface. A passivating dielectric layer is disposed on the light-receiving surface of the substrate. A Group III-nitride material layer is disposed above the passivating dielectric layer. In another example, a solar cell includes a substrate having a light-receiving surface. A passivating dielectric layer is disposed on the light-receiving surface of the substrate. A large direct band gap material layer is disposed above the passivating dielectric layer, the large direct band gap material layer having an energy gap (Eg) of at least approximately 3.3. An anti-reflective coating (ARC) layer disposed on the large direct band gap material layer, the ARC layer comprising a material different from the large direct band gap material layer.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: November 21, 2017
    Assignees: SunPower Corporation, Total Marketing Services
    Inventors: Michael C. Johnson, Kieran Mark Tracy, Seung Bum Rim, Jara Fernandez Martin, Périne Jaffrennou, Julien Penaud
  • Patent number: 9812592
    Abstract: One embodiment relates to a method of fabricating a solar cell. A silicon lamina is cleaved from the silicon substrate. The backside of the silicon lamina includes the P-type and N-type doped regions. A metal foil is attached to the backside of the silicon lamina. The metal foil may be used advantageously as a built-in carrier for handling the silicon lamina during processing of a frontside of the silicon lamina. Another embodiment relates to a solar cell that includes a silicon lamina having P-type and N-type doped regions on the backside. A metal foil is adhered to the backside of the lamina, and there are contacts formed between the metal foil and the doped regions. Other embodiments, aspects and features are also disclosed.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: November 7, 2017
    Assignee: SunPower Corporation
    Inventors: Seung Bum Rim, Gabriel Harley
  • Publication number: 20170278990
    Abstract: The present disclosure provides improved approaches for marking and individual tracking of solar cells. These approaches can be used to identify key manufacturing process steps requiring optimization and/or significant factors extending solar cell lifetime. The approaches described herein for marking and individual tracking of solar cells avoid or greatly minimize any negative impact on solar cell performance while improving quality control of solar cells across multiple manufacturing steps and throughout the entire solar cell lifecycle. Embodiments described herein include a solar cell comprising a substrate having a front side and a back side. The substrate comprises at least one diffusion region of a first polarity. A first set of conductive conduits in the first set is electrically coupled to at least one active diffusion region of a first polarity. The solar cell further comprises a marking above an inactive region of the substrate.
    Type: Application
    Filed: March 25, 2016
    Publication date: September 28, 2017
    Inventors: David Aitan Soltz, Seung Bum Rim
  • Publication number: 20170222072
    Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region.
    Type: Application
    Filed: April 20, 2017
    Publication date: August 3, 2017
    Inventors: Seung Bum Rim, David D. Smith, Taiqing Qiu, Staffan Westerberg, Kieran Mark Tracy, Venkatasubramani Balu