Patents by Inventor Seung Cheol Lee

Seung Cheol Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9343474
    Abstract: A semiconductor device that includes a plurality of first conductive patterns stacked over a substrate, dummy patterns formed in the first conductive patterns, respectively, first barrier patterns each surrounding the respective first conductive patterns and partially interposed between the respective first conductive patterns and the respective dummy patterns, second barrier patterns each surrounding the respective first barrier patterns and the respective dummy patterns, a second conductive pattern located over or under the first conductive patterns, and a third barrier pattern surrounding the second conductive pattern, wherein the second conductive pattern has a greater thickness than the first conductive patterns.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: May 17, 2016
    Assignee: SK Hynix Inc.
    Inventor: Seung Cheol Lee
  • Publication number: 20160122188
    Abstract: Disclosed is AA? graphite with a new stacking feature of graphene, and a fabrication method thereof. Graphene is stacked in the sequence of AA? where alternate graphene layers exhibiting the AA? stacking are translated by a half hexagon (1.23 ?). AA? graphite has an interplanar spacing of about 3.44 ? larger than that of the conventional AB stacked graphite (3.35 ?) that has been known as the only crystal of pure graphite. This may allow the AA? stacked graphite to have unique physical and chemical characteristics.
    Type: Application
    Filed: November 4, 2015
    Publication date: May 5, 2016
    Applicant: Korea Institute of Science and Technology
    Inventors: Jae-Kap LEE, So-Hyung LEE, Jae-Pyoung AHN, Seung-cheol LEE, Wook-Seong LEE
  • Patent number: 9300056
    Abstract: Disclosed is an antenna in which certain radiators are shared for multiple frequency bands. The antenna may include at least one first radiator for a first frequency band; one or more second radiator for a second frequency band; and a third radiator. Here, the third radiator may be used when realizing the first frequency band and may also be used when realizing the second frequency band.
    Type: Grant
    Filed: February 7, 2014
    Date of Patent: March 29, 2016
    Assignee: ACE TECHNOLOGIES CORPORATION
    Inventors: Seung-Cheol Lee, Seung-Chul Lee
  • Patent number: 9281567
    Abstract: A broadband internal antenna using double electromagnetic coupling is disclosed. The disclosed antenna may include: a first conducting member electrically connected to a feeding point; a second conducting member placed at a designated distance from at least a portion of the first conducting member so as to allow a first electromagnetic coupling with at least a portion of the first conducting member, and remaining in a floating state without being coupled to a ground and the feeding point; a third conducting member placed at a designated distance from the second conducting member so as to allow a second electromagnetic coupling with the second conducting member, and electrically connected to the ground; and a fourth conducting member extending from the third conducting member, for radiating RF signals. The disclosed antenna has the advantage of providing broadband characteristics within a limited size.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: March 8, 2016
    Assignee: ACE TECHNOLOGIES CORPORATION
    Inventors: Byoung-Nam Kim, Jong-Ho Jung, Seung-Cheol Lee
  • Patent number: 9252498
    Abstract: A feeding system for feeding power using slow wave structure is disclosed. The feeding system includes a first substrate, a first pattern disposed on the first substrate, being a conductor, a second substrate separated from the first substrate, and a second pattern configured to locate on the second substrate, being a conductor. Here, the first pattern and the second pattern are connected electrically, and at least one of the first pattern and the second pattern has a slow wave structure.
    Type: Grant
    Filed: November 22, 2010
    Date of Patent: February 2, 2016
    Assignee: ACE TECHNOLOGIES CORPORATION
    Inventor: Seung-Cheol Lee
  • Publication number: 20160028669
    Abstract: According to various embodiments, a method for providing content in an electronic device includes: providing content through a display functionally connected to the electronic device; selecting at least one object included in the content based on a user input; and connecting an input comment to the at least one selected object when the comment corresponding to the at least one selected object is input. The method for providing content in an electronic device can be implemented through various embodiments of the present disclosure.
    Type: Application
    Filed: July 24, 2015
    Publication date: January 28, 2016
    Inventors: Kyung-Hee Lee, Jin-Hong Jeong, Seok-Kyoun Park, Tae-Gun Park, Ki-Huk Lee, Seung-Cheol Lee, Ju-Yeong Lee
  • Patent number: 9237394
    Abstract: Disclosed herein is a canal type earphone with a pressure equilibrium means, capable of eliminating a pressure difference between a user's external auditory meatus and an outside during wearing of the canal type earphone. A pressure equilibrium means includes a side air passage through which air within a tube or air within a speaker unit in the canal type earphone is discharged to a side surface of a gasket or a side surface of the speaker unit, and a rear air passage through which air in the side surface of the speaker unit is discharged to the rear of the speaker unit.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: January 12, 2016
    Assignee: BUJEON CO., LTD.
    Inventors: Dong Hyun Seo, Seung Cheol Lee, Su Cheon Lee
  • Publication number: 20150380426
    Abstract: A semiconductor device that includes a plurality of first conductive patterns stacked over a substrate, dummy patterns formed in the first conductive patterns, respectively, first barrier patterns each surrounding the respective first conductive patterns and partially interposed between the respective first conductive patterns and the respective dummy patterns, second barrier patterns each surrounding the respective first barrier patterns and the respective dummy patterns, a second conductive pattern located over or under the first conductive patterns, and a third barrier pattern surrounding the second conductive pattern, wherein the second conductive pattern has a greater thickness than the first conductive patterns.
    Type: Application
    Filed: September 3, 2015
    Publication date: December 31, 2015
    Inventor: Seung Cheol LEE
  • Patent number: 9200363
    Abstract: Disclosed is AA? graphite with a new stacking feature of graphene, and a fabrication method thereof. Graphene is stacked in the sequence of AA? where alternate graphene layers exhibiting the AA? stacking are translated by a half hexagon (1.23 ?). AA? graphite has an interplanar spacing of about 3.44 ? larger than that of the conventional AB stacked graphite (3.35 ?) that has been known as the only crystal of pure graphite. This may allow the AA? stacked graphite to have unique physical and chemical characteristics.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: December 1, 2015
    Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jae-Kap Lee, So-Hyung Lee, Jae-Pyoung Ahn, Seung-Cheol Lee, Wook-Seong Lee
  • Publication number: 20150340373
    Abstract: A method of manufacturing a semiconductor device includes forming isolation layers in a first direction at trenches at isolation regions defined at a semiconductor substrate and forming gate lines in a second direction crossing the first direction over the isolation layers and active regions defined between the isolation layers, performing a dry-etch process to remove the isolation layers, and forming an insulating layer over the semiconductor substrate to form a first air gap extending in the first direction in the trenches and a second air gap extending in the second direction between the gate lines.
    Type: Application
    Filed: July 31, 2015
    Publication date: November 26, 2015
    Inventors: Seung Cheol LEE, Yang Bok LEE
  • Publication number: 20150302242
    Abstract: A method for processing content in an electronic device and an electronic device for doing the same are provided. The method includes acquiring content including at least one character, and performing at least one of classifying the acquired content into at least one of a plurality of categories by analyzing the acquired content or generating vector images including a vector image corresponding to the at least one character based on the acquired content and displaying at least a part of the vector images on a display functionally connected to the electronic device.
    Type: Application
    Filed: April 15, 2015
    Publication date: October 22, 2015
    Inventors: Ki-Huk Lee, Seung-Cheol Lee, Jin-Hong Jeong, Tae-Gun Park, Sang-Keun Yoo, Sung-Ho Yoon
  • Patent number: 9153598
    Abstract: A semiconductor device that includes a plurality of first conductive patterns stacked over a substrate, dummy patterns formed in the first conductive patterns, respectively, first barrier patterns each surrounding the respective first conductive patterns and partially interposed between the respective first conductive patterns and the respective dummy patterns, second barrier patterns each surrounding the respective first barrier patterns and the respective dummy patterns, a second conductive pattern located over or under the first conductive patterns, and a third barrier pattern surrounding the second conductive pattern, wherein the second conductive pattern has a greater thickness than the first conductive patterns.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: October 6, 2015
    Assignee: SK Hynix Inc.
    Inventor: Seung Cheol Lee
  • Patent number: 9130013
    Abstract: A method of manufacturing a semiconductor device includes forming isolation layers in a first direction at trenches at isolation regions defined at a semiconductor substrate and forming gate lines in a second direction crossing the first direction over the isolation layers and active regions defined between the isolation layers, performing a dry-etch process to remove the isolation layers, and forming an insulating layer over the semiconductor substrate to form a first air gap extending in the first direction in the trenches and a second air gap extending in the second direction between the gate lines.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: September 8, 2015
    Assignee: SK Hynix Inc.
    Inventors: Seung Cheol Lee, Yang Bok Lee
  • Publication number: 20150187789
    Abstract: A semiconductor device that includes a plurality of first conductive patterns stacked over a substrate, dummy patterns formed in the first conductive patterns, respectively, first barrier patterns each surrounding the respective first conductive patterns and partially interposed between the respective first conductive patterns and the respective dummy patterns, second barrier patterns each surrounding the respective first barrier patterns and the respective dummy patterns, a second conductive pattern located over or under the first conductive patterns, and a third barrier pattern surrounding the second conductive pattern, wherein the second conductive pattern has a greater thickness than the first conductive patterns.
    Type: Application
    Filed: May 28, 2014
    Publication date: July 2, 2015
    Applicant: SK hynix Inc.
    Inventor: Seung Cheol LEE
  • Patent number: 9023724
    Abstract: A method of manufacturing a semiconductor memory device comprises forming a plurality of gate lines on a semiconductor substrate, forming an insulating layer on the gate lines, and performing a cleaning process using a surfactant-free cleaning solution having a viscosity of lower than 2 cP and an acidity of lower than 3 pH to remove residue from the surface of the insulating layer.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: May 5, 2015
    Assignee: SK Hynix Inc.
    Inventors: Duk Eui Lee, Seung Cheol Lee
  • Publication number: 20150106706
    Abstract: An electronic device and a method for controlling an object display are provided. The method of controlling an object display includes displaying at least one input object on a screen, creating and storing property information of the at least one displayed object, creating a preview window in a region of the screen so as to display the at least one object on the preview window, and controlling a display of the object by using the property information of the at least one selected object in correspondence to the at least one displayed object.
    Type: Application
    Filed: April 23, 2014
    Publication date: April 16, 2015
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jin-Hong JEONG, Seung-Cheol Lee, Seok-Kyoun Park, Sun-Kee Lee, Cheol-Ho Cheong, Joon-Young Cho, Bo-Kun Choi, Kyung-Hee Lee
  • Patent number: 8941725
    Abstract: A method of processing three-dimensional (3D) stereoscopic image data is provided that includes comparing the polarity of image data of a present frame with the polarity of image data of a previous frame. The image data of the present frame are compensated according to the result of the comparison. The image data of the present frame is compensated to generate first compensation data, when the polarity of the image data of the present frame is opposite to the polarity of the image data of the previous frame, with respect a reference voltage.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: January 27, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sang-Moon Moh, Mi-Sun Lee, Sang-Yong No, Seung-Cheol Lee
  • Publication number: 20140348372
    Abstract: Disclosed herein is a canal type earphone with a pressure equilibrium means, capable of eliminating a pressure difference between a user's external auditory meatus and an outside during wearing of the canal type earphone. A pressure equilibrium means includes a side air passage through which air within a tube or air within a speaker unit in the canal type earphone is discharged to a side surface of a gasket or a side surface of the speaker unit, and a rear air passage through which air in the side surface of the speaker unit is discharged to the rear of the speaker unit.
    Type: Application
    Filed: May 27, 2014
    Publication date: November 27, 2014
    Applicant: BUJEON CO., LTD.
    Inventors: Dong Hyun SEO, Seung Cheol LEE, Su Cheon LEE
  • Publication number: 20140252434
    Abstract: A method of manufacturing a semiconductor device includes forming isolation layers in a first direction at trenches at isolation regions defined at a semiconductor substrate and forming gate lines in a second direction crossing the first direction over the isolation layers and active regions defined between the isolation layers, performing a dry-etch process to remove the isolation layers, and forming an insulating layer over the semiconductor substrate to form a first air gap extending in the first direction in the trenches and a second air gap extending in the second direction between the gate lines.
    Type: Application
    Filed: July 15, 2013
    Publication date: September 11, 2014
    Inventors: Seung Cheol LEE, Yang Bok LEE
  • Publication number: 20140225792
    Abstract: Disclosed is an antenna in which certain radiators are shared for multiple frequency bands. The antenna may include at least one first radiator for a first frequency band; one or more second radiator for a second frequency band; and a third radiator. Here, the third radiator may be used when realizing the first frequency band and may also be used when realizing the second frequency band.
    Type: Application
    Filed: February 7, 2014
    Publication date: August 14, 2014
    Applicant: ACE TECHNOLOGIES CORPORATION
    Inventors: Seung-Cheol Lee, Seung-Chul Lee