Abstract: A battery pack includes a battery pack; a charging housing having an inlet, an outlet, and a pack insertion space into which the battery pack is insertable; a charging part electrically connected to the battery pack inserted into the pack insertion space, for charging the battery pack; a circulation part configured to supply cooling water supplied to the pack insertion space through the inlet and recover cooling water from the pack insertion space through the outlet; a heating part configured to heat to the pack insertion space; and a control part for controlling the charging part, the heating part, and the circulation part.

Abstract: A semiconductor device includes an active pattern on a substrate, a source/drain pattern on the active pattern, a channel pattern connected to the source/drain pattern, the channel pattern including semiconductor patterns stacked and spaced apart from each other, a gate electrode extending across the channel pattern, and inner spacers between the gate electrode and the source/drain pattern. The semiconductor patterns include stacked first and second semiconductor patterns. The gate electrode includes first and second portions, which are sequentially stacked between the substrate and the first and second semiconductor patterns, respectively. The inner spacers include first and second air gaps, between the first and second portions of the gate electrode and the source/drain pattern. The largest width of the first air gap is larger than that of the second air gap.

Abstract: An apparatus for dispensing a viscous fluid includes a dispenser module including a nozzle which dispenses a viscous fluid according to a profile; a robot module configured to move the nozzle according to the profile; a vision module configured to generate an image by photographing a workpiece to which the viscous fluid is dispensed; and a control module configured to integrally control the dispenser module and the robot module based on the image received from the vision module to dispense the viscous fluid according to the profile, wherein, in order to generate the profile, the control module provides a user with an interface which enables the user to input a pattern of the viscous fluid in such a way as to draw the pattern on the image. A user may freely generate a pattern of a viscous fluid, and may accurately dispense the viscous fluid according to the generated pattern.

Abstract: A semiconductor device includes: a fin-type active region extending on a substrate in a first direction that is parallel to an upper surface of the substrate; and a source/drain region in a recess region extending into the fin-type active region, wherein the source/drain region includes: a first source/drain material layer; a second source/drain material layer on the first source/drain material layer; and a first dopant diffusion barrier layer on an interface between the first source/drain material layer and the second source/drain material layer.

Abstract: A semiconductor device including an active pattern extending in a first direction; a channel pattern on the active pattern and including vertically stacked semiconductor patterns; a source/drain pattern in a recess in the active pattern; a gate electrode on the active pattern and extending in a second direction crossing the first direction, the gate electrode surrounding a top surface, at least one side surface, and a bottom surface of each of the semiconductor patterns; and a gate spacer covering a side surface of the gate electrode and having an opening to the semiconductor patterns, wherein the source/drain pattern includes a buffer layer covering inner sides of the recess, the buffer layer includes an outer side surface and an inner side surface, which are opposite to each other, and each of the outer and inner side surfaces is a curved surface that is convexly curved toward a closest gate electrode.

Abstract: Battery modules are disclosed. In an implementation, a battery module comprises a plurality of sub-battery units sequentially disposed in a front-rear direction between forward and rearward sides of the battery module, each of the plurality of sub-battery units including a first end and a second end; a first side cover coupled to the first ends of the plurality of sub-battery units; and a second side cover coupled to the second ends of the plurality of sub-battery units and positioned opposite the first side cover. Each of the plurality of sub-battery units includes a housing open toward the first side cover, the second side cover, and a bottom of the housing, and a plurality of battery cells accommodated in the housing and sequentially disposed in the front-rear direction.

Abstract: Battery modules and battery packs are disposed. In an embodiment, a battery module may include: a plurality of battery cells arranged in a row in one direction; an end plate disposed adjacent to an outermost battery cell of the plurality of battery cells; and an upper cooling plate and a lower cooling plate disposed above and below, respectively, and structured to include a first cooling flow path and a second cooling flow path, respectively, for a coolant for cooling the plurality of battery cells to flow, wherein the end plate may include a flow path connection portion connected between the upper cooling plate and the lower cooling plate for the coolant to flow between the first cooling flow path and the second cooling flow path.

Abstract: Provided is an operating method of a storage device. The method includes providing temperature information of each of a plurality of volatile memory devices in the storage device to a host device; and receiving a setting command related to a refresh operation of the plurality of volatile memory devices from the host device, wherein the plurality of volatile memory devices are classified into groups based on temperature information, and wherein the setting command indicates a number of rows of the plurality of volatile memory devices to be refreshed differently for each of the groups based on the temperature information.

Abstract: A battery pack, may include: a plurality of cell stacks including a plurality of battery cells; a pack housing accommodating the plurality of cell stacks; a fixing bracket disposed between the plurality of cell stacks and the pack housing and between the plurality of cell stacks; and a fastening member fastening the fixing bracket to the pack housing, wherein the fixing bracket may be disposed to contact the plurality of battery cells on an upper side of the plurality of cell stacks.

Abstract: A battery pack includes a first sub-battery pack and a second sub-battery pack each including a plurality of battery module including a plurality of battery cells arranged in one direction, and stacked in a height direction of the plurality of battery cells; and a heat sink disposed between the first sub-battery pack and the second sub-battery pack and including a cooling flow path, wherein the first sub-battery pack and the second sub-battery pack are disposed symmetrically with respect to the heat sink.

Abstract: A battery pack comprising one or more battery modules and a support frame opposing the one or more battery modules in a first direction, the one or more battery modules including a plurality of battery cells stacked in the first direction to form a cell stack and a side cover opposing the cell stack in the first direction, wherein the side cover comprises a first inclined surface opposing the support frame and inclined with respect to the first direction.

Abstract: A semiconductor device includes an active pattern on a substrate, a pair of source/drain patterns on the active pattern, a channel pattern between the pair of source/drain patterns, the channel pattern including semiconductor patterns stacked to be spaced apart from each other, and a gate electrode crossing the channel pattern and extending in a first direction. One of the pair of source/drain patterns includes a first semiconductor layer and a second semiconductor layer thereon. The first semiconductor layer is in contact with a first semiconductor pattern, which is one of the stacked semiconductor patterns. The largest widths of the first semiconductor pattern, the first semiconductor layer, and the second semiconductor layer in the first direction are a first width, a second width, a third width, respectively, and the second width is larger than the first width and smaller than the third width.

Abstract: A battery module which includes: a battery stack formed by stacking a plurality of battery cells respectively including electrode tabs on each other; and bus bar assemblies located on sides of the battery stack, from which the electrode tabs are drawn out, to electrically connect the plurality of battery cells to each other through a plurality of electrode tabs, wherein each of the bus bar assemblies includes a plurality of openings configured to hold the plurality of electrode tabs, and each of the plurality of openings includes an insertion portion formed by opening one side thereof so that the electrode tab is slidely inserted in a direction perpendicular to a direction in which the electrode tabs are drawn out.

Abstract: A semiconductor wafer cleaning composition for used in a semiconductor device manufacturing process and a method of cleaning a semiconductor wafer using the cleaning composition are provided. The cleaning composition includes surfactants represented by Formula 1 and Formula 2, respectively, an organic or inorganic acid, and water occupying for the remaining proportion. The cleaning method is a method of immersing a semiconductor wafer in the cleaning composition for 100 to 500 seconds. The cleaning composition and the cleaning method according to the present disclosure provide an incredibility improved removal rate and an effective cleaning power for contaminants, especially organic wax, during a process of polishing the surface of a wafer used to manufacture semiconductor devices, thereby providing a super-cleaned wafer surface, resulting in production of reliable semiconductor devices.

Abstract: A semiconductor device including a substrate; a first active pattern on the substrate and extending in a first direction, an upper portion of the first active pattern including a first channel pattern; first source/drain patterns in recesses in an upper portion of the first channel pattern; and a gate electrode on the first active pattern and extending in a second direction crossing the first direction, the gate electrode being on a top surface and on a side surface of the at least one first channel pattern, wherein each of the first source/drain patterns includes a first, second, and third semiconductor layer, which are sequentially provided in the recesses, each of the first channel pattern and the third semiconductor layers includes silicon-germanium (SiGe), and the first semiconductor layer has a germanium concentration higher than those of the first channel pattern and the second semiconductor layer.

Abstract: Provided is an operating method of a storage device. The method includes providing temperature information of each of a plurality of volatile memory devices in the storage device to a host device; and receiving a setting command related to a refresh operation of the plurality of volatile memory devices from the host device, wherein the plurality of volatile memory devices are classified into groups based on temperature information, and wherein the setting command indicates a number of rows of the plurality of volatile memory devices to be refreshed differently for each of the groups based on the temperature information.

Abstract: A method of manufacturing a semiconductor device, the method including: forming, in a first region of a substrate, an active fin and a sacrificial gate structure intersecting the active fin; forming a first spacer and a second spacer on the substrate to cover the sacrificial gate structure; forming a mask in a second region of the substrate to expose the first region of the substrate; removing the second spacer from the first spacer in the first region of the substrate by using the mask; forming recesses at opposite sides of the sacrificial gate structure by removing portions of the active fin; forming a source and a drain in the recesses; and forming an etch-stop layer to cover both sidewalls of the sacrificial gate structure and a top surfaces of the source and drain.

Abstract: A battery module which includes: a battery stack formed by stacking a plurality of battery cells respectively including electrode tabs on each other; bus bar assemblies located on both sides of the battery stack, from which the electrode tabs are drawn, to electrically connect the plurality of battery cells to each other through the plurality of electrode tabs; and a sensing module assembly disposed on one side of the battery stack, from which the electrode tab is not drawn out, to electrically connect the bus bar assemblies on both sides of the battery stack.

Abstract: Proposed is a photoresist composition for a KrF light source, which exhibits a vertical profile compared to conventional KrF positive photoresists by adding a resin capable of increasing transmittance in order to form a semiconductor pattern, particularly a chemically amplified positive photoresist composition for improving a pattern profile, which includes, based on the total weight of the composition, 5 to 60 wt % of a polymer resin, 0.1 to 10 wt % of a transmittance-increasing resin additive represented by Chemical Formula 1, 0.05 to 10 wt % of a photoacid generator, 0.01 to 5 wt % of an acid diffusion inhibitor, and the remainder of a solvent, thus making it possible to provide a composition exhibiting a vertical profile, enhanced sensitivity and a superior processing margin compared to conventional positive photoresists.

Abstract: A semiconductor device including: first and second cell regions; a substrate including first and second surfaces; first to third active patterns extending in a first horizontal direction in the first cell region, the first to third active patterns spaced apart from each other in a second horizontal direction; a fourth active pattern extending in the first horizontal direction in the second cell region, the fourth active pattern is aligned with the second active pattern in the first horizontal direction; an active cut separating the second and fourth active patterns; a source/drain region on the second active pattern; a buried rail extending in the first horizontal direction on the second surface of the substrate, the first buried rail overlaps each of the second and fourth active patterns in a vertical direction; and a source/drain contact penetrating the substrate and second active pattern and connecting the source/drain region to the buried rail.