Abstract: A battery module which includes: a battery stack formed by stacking a plurality of battery cells respectively including electrode tabs on each other; bus bar assemblies located on both sides of the battery stack, from which the electrode tabs are drawn, to electrically connect the plurality of battery cells to each other through the plurality of electrode tabs; and a sensing module assembly disposed on one side of the battery stack, from which the electrode tab is not drawn out, to electrically connect the bus bar assemblies on both sides of the battery stack.

Abstract: Proposed is a photoresist composition for a KrF light source, which exhibits a vertical profile compared to conventional KrF positive photoresists by adding a resin capable of increasing transmittance in order to form a semiconductor pattern, particularly a chemically amplified positive photoresist composition for improving a pattern profile, which includes, based on the total weight of the composition, 5 to 60 wt % of a polymer resin, 0.1 to 10 wt % of a transmittance-increasing resin additive represented by Chemical Formula 1, 0.05 to 10 wt % of a photoacid generator, 0.01 to 5 wt % of an acid diffusion inhibitor, and the remainder of a solvent, thus making it possible to provide a composition exhibiting a vertical profile, enhanced sensitivity and a superior processing margin compared to conventional positive photoresists.

Abstract: A semiconductor device including: first and second cell regions; a substrate including first and second surfaces; first to third active patterns extending in a first horizontal direction in the first cell region, the first to third active patterns spaced apart from each other in a second horizontal direction; a fourth active pattern extending in the first horizontal direction in the second cell region, the fourth active pattern is aligned with the second active pattern in the first horizontal direction; an active cut separating the second and fourth active patterns; a source/drain region on the second active pattern; a buried rail extending in the first horizontal direction on the second surface of the substrate, the first buried rail overlaps each of the second and fourth active patterns in a vertical direction; and a source/drain contact penetrating the substrate and second active pattern and connecting the source/drain region to the buried rail.

Abstract: A battery module which includes: a battery stack formed by stacking a plurality of battery cells respectively including electrode tabs on each other; and bus bar assemblies located on sides of the battery stack, from which the electrode tabs are drawn out, to electrically connect the plurality of battery cells to each other through a plurality of electrode tabs, wherein each of the bus bar assemblies includes a plurality of openings configured to hold the plurality of electrode tabs, and each of the plurality of openings includes an insertion portion formed by opening one side thereof so that the electrode tab is slidely inserted in a direction perpendicular to a direction in which the electrode tabs are drawn out.

Abstract: A battery module includes a cell stack including a plurality of battery cells stacked therein, a bus bar assembly coupled to a side of the cell stack, on which an electrode lead of the battery cell is disposed, and a sensing device coupled to the bus bar assembly and measuring a temperature of the battery cell. The bus bar assembly is coupled to the cell stack in a vertical direction, and the sensing device includes a temperature sensor disposed in close contact with the battery cell, and an elastic bracket pressing the temperature sensor toward the battery cell through elastic force.

Abstract: A semiconductor device includes an active pattern on a substrate, a pair of source/drain patterns on the active pattern, a channel pattern between the pair of source/drain patterns, the channel pattern including semiconductor patterns stacked to be spaced apart from each other, and a gate electrode crossing the channel pattern and extending in a first direction. One of the pair of source/drain patterns includes a first semiconductor layer and a second semiconductor layer thereon. The first semiconductor layer is in contact with a first semiconductor pattern, which is one of the stacked semiconductor patterns. The largest widths of the first semiconductor pattern, the first semiconductor layer, and the second semiconductor layer in the first direction are a first width, a second width, a third width, respectively, and the second width is larger than the first width and smaller than the third width.

Abstract: A semiconductor device including a substrate including an active pattern; a gate electrode crossing the active pattern; a source/drain pattern adjacent to one side of the gate electrode and on an upper portion of the active pattern; an active contact electrically connected to the source/drain pattern; and a silicide layer between the source/drain pattern and the active contact, the source/drain pattern including a body part including a plurality of semiconductor patterns; and a capping pattern on the body part, the body part has a first facet, a second facet on the first facet, and a corner edge defined where the first facet meets the second facet, the corner edge extending parallel to the substrate, the capping pattern covers the second facet of the body part and exposes the corner edge, and the silicide layer covers a top surface of the body part and a top surface of the capping pattern.

Abstract: A semiconductor device includes; a substrate including a first region and a second region, a first active pattern extending upward from the first region, a first superlattice pattern on the first active pattern, a first active fin centrally disposed on the first active pattern, a first gate electrode disposed on the first active fin, and first source/drain patterns disposed on opposing sides of the first active fin and on the first active pattern. The first superlattice pattern includes at least one first semiconductor layer and at least one first blocker-containing layer, and the first blocker-containing layer includes at least one of oxygen, carbon, fluorine and nitrogen.

Abstract: A battery module which includes: a battery stack formed by stacking a plurality of battery cells respectively including electrode tabs on each other; bus bar assemblies located on both sides of the battery stack, from which the electrode tabs are drawn, to electrically connect the plurality of battery cells to each other through the plurality of electrode tabs; and a sensing module assembly disposed on one side of the battery stack, from which the electrode tab is not drawn out, to electrically connect the bus bar assemblies on both sides of the battery stack.

Abstract: A display device includes a substrate, a first semiconductor pattern, a first gate insulating film covering the first semiconductor pattern, a first conductive layer and a second semiconductor pattern are on the first gate insulating film, a second gate insulating film on the second semiconductor pattern, a third gate insulating film covering the first gate insulating film and the second gate insulating film, a second conductive layer on the third gate insulating film, an interlayer insulating film covering the second conductive layer, and a third conductive layer on the interlayer insulating film, wherein the first and second semiconductor patterns respectively form semiconductor layers of the first and second transistors, wherein the first conductive layer includes a gate electrode of the first transistor and a first electrode of the capacitor, and wherein the second conductive layer includes a gate electrode of the second transistor and a second electrode of the capacitor.

Abstract: Provided is a battery module including a pad having characteristics of expanding at a predetermined temperature or higher, thereby blocking a path along which a high-temperature, high-pressure gas discharged from the battery cell in which an event occurs moves, and thus, the gas is prevented from spreading to other battery cells.

Abstract: A display device includes a substrate, a first transistor including a channel on the substrate, a first electrode and a second electrode, and a gate electrode overlapping the channel of the first transistor, a first interlayer insulation layer on the first and second electrodes of the first transistor, a second transistor including a channel disposed on the first interlayer insulation layer, a first electrode and a second electrode of the second transistor, and a gate electrode that overlaps the channel of the second transistor, a first connection electrode disposed on the first interlayer insulation layer, and connected with the first electrode of the first transistor, a gate insulation layer disposed between the first interlayer insulation layer and the first connection electrode, and a second connection electrode that connects the first connection electrode and the first electrode of the second transistor.

Abstract: A semiconductor device includes: a fin-type active region extending on a substrate in a first direction that is parallel to an upper surface of the substrate; and a source/drain region in a recess region extending into the fin-type active region, wherein the source/drain region includes: a first source/drain material layer; a second source/drain material layer on the first source/drain material layer; and a first dopant diffusion barrier layer on an interface between the first source/drain material layer and the second source/drain material layer.

Abstract: The present invention is for providing an I-line negative photoresist composition exhibiting better process margin than a conventional I-line negative photoresist, has the purpose of alleviating a problem in which the center of a contact hole pattern is dented during pattern formation, and relates to an I-line negative photoresist composition for reducing the height difference, between the center and the edge, formed by the denting of the center and for reducing line edge roughness (LER) during pattern formation in a semiconductor process, the composition comprising: a polymer resin; a compound represented by chemical formula 1; a crosslinking agent; a photoacid generator; an acid diffusion inhibitor; and a solvent.

Abstract: The present disclosure relates to an anti-glare film including an acrylic substrate and a coating layer located on at least one side of the acrylic substrate, which has a specific rate of change of band area ratio in a graph derived from the result of Raman spectroscopy performed for the coating layer in the thickness direction. It also relates to a polarizing plate, and a display apparatus including the same.

Abstract: A method includes forming an active pattern on a substrate, the active pattern comprising first semiconductor patterns and second semiconductor patterns, which are alternately stacked, forming a capping pattern on a top surface and a sidewall of the active pattern, performing a deposition process on the capping pattern to form an insulating layer, and forming a sacrificial gate pattern intersecting the active pattern on the insulating layer. The capping pattern has a crystalline structure and is in physical contact with sidewalls of the first semiconductor patterns and sidewalls of the second semiconductor patterns.

Abstract: A semiconductor device including an active pattern extending in a first direction; a channel pattern on the active pattern and including vertically stacked semiconductor patterns; a source/drain pattern in a recess in the active pattern; a gate electrode on the active pattern and extending in a second direction crossing the first direction, the gate electrode surrounding a top surface, at least one side surface, and a bottom surface of each of the semiconductor patterns; and a gate spacer covering a side surface of the gate electrode and having an opening to the semiconductor patterns, wherein the source/drain pattern includes a buffer layer covering inner sides of the recess, the buffer layer includes an outer side surface and an inner side surface, which are opposite to each other, and each of the outer and inner side surfaces is a curved surface that is convexly curved toward a closest gate electrode.

Abstract: An electromagnetic wave transceiver according to an embodiment includes a waveguide assembly including an assembly fastening hole, a circuit board including a board fastening hole and disposed to be stacked on the waveguide assembly, and a fastener interference-fitted or transition-fitted into the assembly fastening hole and the board fastening hole to couple the waveguide assembly and the circuit board.

Abstract: A semiconductor device may include a first active fin, a second active fin and a gate structure. The first active fin may extend in a first direction on a substrate and may include a first straight line extension portion, a second straight line extension portion, and a bent portion between the first and second straight line extension portions. The second active fin may extend in the first direction on the substrate. The gate structure may extend in a second direction perpendicular to the first direction on the substrate. The gate structure may cross one of the first and second straight line extension portions of the first active fin and may cross the second active fin.

Abstract: A semiconductor device includes a drain, a source, a gate electrode, and a nanowire between the source and drain. The nanowire has a first section with a first thickness and a second section with a second thickness greater than the first thickness. The second section is between the first section and at least one of the source or drain. The first nanowire includes a channel when a voltage is applied to the gate electrode.