Patents by Inventor Seung Yong Choi

Seung Yong Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7335532
    Abstract: A multichip module package uses bond wire with plastic resin on one side of a lead frame to package an integrated circuit and flip chip techniques to attach one or more mosfets to the other side of the lead frame. The assembled multichip module 30 has an integrated circuit controller 14 on a central die pad. Wire bonds 16 extend from contact areas on the integrated circuit to outer leads 2.6 of the lead frame 10. On the opposite, lower side of the central die pad, the sources and gates of the mosfets 24, 26 are bump or stud attached to the half etched regions of the lead frame. The drains 36 of the mosfets and the ball contacts 22.1 on the outer leads are soldered to a printed circuit board.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: February 26, 2008
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Jonathan A. Noquil, Seung Yong Choi, Rajeev Joshi, Chung-Lin Wu
  • Patent number: 7268414
    Abstract: A semiconductor package mounted on a printed circuit board using improved-reliability solder joints is described. The semiconductor package includes a lead frame pad and lead frame lead attached to the solder joints, a semiconductor chip mounted on top of the lead frame pad, wires electrically connecting the semiconductor chip and the lead frame lead, an epoxy molding compound that exposes the lower portion surface of the lead frame pad and part of the lead frame lead, and protrusions fixed to the lower portion surface of the epoxy molding compound and positioned between the solder joints, with the protrusions supporting the semiconductor package when the epoxy molding compound is mounted on the printed circuit board.
    Type: Grant
    Filed: March 4, 2003
    Date of Patent: September 11, 2007
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Seung-yong Choi, Seung-han Paek
  • Publication number: 20070132077
    Abstract: The invention provides a flip chip molded leadless package (MLP) with electrical paths printed in conducting ink. The MLP includes a taped leadframe with a plurality of leads and a non-conducting tape placed thereon. The electrical paths are printed on the tape to connect the features of the semiconductor device to the leads and an encapsulation layer protects the package. In a second embodiment, the MLP includes a pre-molded leadframe with the electrical paths printed directly thereon. The present invention also provides a method of fabricating the semiconductor package according to each embodiment.
    Type: Application
    Filed: February 28, 2006
    Publication date: June 14, 2007
    Inventors: Seung-Yong Choi, Ti Shian, Maria Estacio
  • Patent number: 7154186
    Abstract: A multichip module package uses bond wire with plastic resin on one side of a lead frame to package an integrated circuit and flip chip techniques to attach one or more mosfets to the other side of the lead frame. The assembled multichip module 30 has an integrated circuit controller 14 on a central die pad. Wire bonds 16 extend from contact areas on the integrated circuit to outer leads 2.6 of the lead frame 10. On the opposite, lower side of the central die pad, the sources and gates of the mosfets 24, 26 are bump or stud attached to the half etched regions of the lead frame. The drains 36 of the mosfets and the ball contacts 22.1 on the outer leads are soldered to a printed circuit board.
    Type: Grant
    Filed: March 18, 2004
    Date of Patent: December 26, 2006
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Jonathan A. Noquil, Seung Yong Choi, Rajeev Joshi, Chung-Lin Wu
  • Publication number: 20050087854
    Abstract: A power module flip chip package is provided. The power module flip chip package includes a package carrier having a front surface and a back surface facing the front surface, and a power semiconductor device electrically connected to the front surface of the package carrier via conductive bumps. The conductive bumps are electrically connected to a gate terminal, a source terminal, and a drain terminal of the power semiconductor device. The power module flip chip package has reduced resistance and inductance and improved reliability.
    Type: Application
    Filed: August 26, 2004
    Publication date: April 28, 2005
    Inventors: Seung-yong Choi, Jonathan Noquil
  • Publication number: 20050012225
    Abstract: A packaged semiconductor device (a wafer-level chip scale package) containing a conductive adhesive material as an electrical interconnect route between the semiconductor die and a patterned conductive substrate is described. The patterned conductive substrate acts not only as a substrate, but also as a redistribution layer that converts the dense pad layout of the die to a larger array configuration of the solder balls in the circuit board. Using the invention allows the formation of a lower priced chip scale package that also overcomes the restriction of the die size used in die-sized chip packages and the input-output pattern that can be required by the printed circuit board. Thus, the invention can provide a familiar pitch (i.e.,interface) to the printed circuit board for any small die.
    Type: Application
    Filed: May 24, 2004
    Publication date: January 20, 2005
    Inventors: Seung-Yong Choi, Min-Ho Park, Ji-Hwan Kim, Rajeev Joshi
  • Patent number: 6809207
    Abstract: The present invention provides certain alpha-amino acids and derivatives thereof, such as, but not limited to, esters, amides and salts. These derivatives may comprise such representative side groups as a phenyl, pyridyl, piperidinyl, tetrahydropyranyl, tetrahydrothiopyranyl, or thienyl group. The present invention further provides a method for synthesizing alpha-amino acids and derivatives thereof via a modified Ugi type reaction using an aldehyde, ammonium formate and a C1-C5 alkyl isocyanide. The compounds provided by this method are useful in the development of new pharmaceuticals for the treatment of human diseases.
    Type: Grant
    Filed: July 24, 2002
    Date of Patent: October 26, 2004
    Assignee: PharmaCore, Inc.
    Inventors: Sekar Alla, Seung-Yong Choi, Dale Dhanoa, Elso DiFranco, Galina Krokhina, Keqiang Li, Balasubramanian Thiagarajan, Wen-Chun Zhang
  • Publication number: 20040186282
    Abstract: The present invention relates to methods for the synthesis and purification of cyclic nucleotide derivatives. The present invention provides a method for separating a cyclic nucleotide derivative from a mixture resulting from a chemical reaction to produce a cyclic nucleotide derivative from a cyclic nucleotide. In one embodiment, this mixture may comprise a cyclic nucleotide derivative, a pyridine solvent, and at least one of an alkyl carboxylic acid, an alkyl acid halide, or an alkyl carboxylic acid anhydride. In another embodiment, this mixture may comprise a cyclic nucleotide derivative and at least one of an alkyl carboxylic acid, an alkyl acid halide, or an alkyl carboxylic acid anhydride.
    Type: Application
    Filed: March 20, 2003
    Publication date: September 23, 2004
    Inventors: Edward M. Chait, Seung-Yong Choi
  • Publication number: 20030209785
    Abstract: A semiconductor package mounted on a printed circuit board using improved-reliability solder joints is described. The semiconductor package includes a lead frame pad and lead frame lead attached to the solder joints, a semiconductor chip mounted on top of the lead frame pad, wires electrically connecting the semiconductor chip and the lead frame lead, an epoxy molding compound that exposes the lower portion surface of the lead frame pad and part of the lead frame lead, and protrusions fixed to the lower portion surface of the epoxy molding compound and positioned between the solder joints, with the protrusions supporting the semiconductor package when the epoxy molding compound is mounted on the printed circuit board.
    Type: Application
    Filed: March 4, 2003
    Publication date: November 13, 2003
    Inventors: Seung-Yong Choi, Seung-Han Paek
  • Patent number: 6574107
    Abstract: A stacked intelligent power module package is provided. The intelligent power module package of the present invention includes a power unit including a heat sink and a control unit which is separately manufactured from the power unit and is subsequently stacked on the power unit. The power unit and the control unit of the intelligent power module package are stacked in two different ways including stacking two wire-bonded leadframes of the power unit and the control unit and stacking two separate semiconductor packages of the power unit and the control unit by using locking means formed in each of the semiconductor packages after a trimming/forming process and an electrical property test are finished.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: June 3, 2003
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: O-seob Jeon, Gi-young Jeon, Seung-yong Choi, Seung-won Lim, Seung-jin Kim, Eul-bin Im, Byeong Gon Kim
  • Publication number: 20030064976
    Abstract: The present invention provides certain alpha-amino acids and derivatives thereof, such as, but not limited to, esters, amides and salts. The present invention also provides a novel method for the synthesis of alpha-amino acids and derivatives thereof.
    Type: Application
    Filed: July 24, 2002
    Publication date: April 3, 2003
    Inventors: Sekar Alla, Seung-Yong Choi, Dale Dhanoa, Elso DiFranco, Galina Krokhina, Keqiang Li, Thiagarajan Balasubramanian, Wen-Chun Zhang
  • Publication number: 20020057553
    Abstract: A stacked intelligent power module package is provided. The intelligent power module package of the present invention includes a power unit including a heat sink and a control unit which is separately manufactured from the power unit and is subsequently stacked on the power unit. The power unit and the control unit of the intelligent power module package are stacked in two different ways including stacking two wire-bonded leadframes of the power unit and the control unit and stacking two separate semiconductor packages of the power unit and the control unit by using locking means formed in each of the semiconductor packages after a trimming/forming process and an electrical property test are finished.
    Type: Application
    Filed: February 26, 2001
    Publication date: May 16, 2002
    Applicant: Fairchild Korea Semiconductor Ltd.
    Inventors: O-seob Jeon, Gi-young Jeon, Seung-yong Choi, Seung-won Lim, Seung-jin Kim, Eul-bin Im, Byeong Gon Kim