Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: A transceiver front end includes a transmit/receive (T/R) switch, a first balun, a second balun, a low noise amplifier, a power amplifier, and compensation circuitry. The T/R switch is operably coupled to an antenna for receiving inbound radio frequency (RF) signals and for transmitting outbound RF signals. The first balun includes a single ended winding and a differential winding, where the single ended winding is operably coupled to the T/R switch. The second balun includes a single ended winding and a differential winding, where the single ended winding is operably coupled to the T/R switch. The low noise amplifier is operably coupled the differential winding of the first balun. The power amplifier is operably coupled to the differential winding of the second balun. The compensation circuitry is operably coupled to the first balun to compensate for at least one of phase imbalance, amplitude imbalance, and impedance imbalance of the first balun.

Abstract: A method for packaging a radio frequency integrated circuit (RFIC) in multiple packages begins by determining a 1st position of the RFIC die in a 1st package wherein the positioning is such to minimize adverse affects of parasitic components of coupling between the radio frequency input/output section and an antenna. Once the position within the 1st package has been determined, the corresponding parasitics are measured to determine their values. The processing then continues by determining a 2nd position of the RFIC die in a 2nd package based on the values of the parasitic components. Accordingly, the 2nd position places the die within the 2nd package such that the parasitic components of coupling between the RF I/O section to the antenna within the 2nd package substantially matches the parasitic components of coupling the RFIO section to the antenna in the 1st package. Accordingly, different packages may be used with the same RFIC die, while maintaining the desired noise reduction.

Abstract: A data slicer for an FSK demodulator employs a peak and valley detector, each of which has a discharge path with selectable decay rates. The faster decay rate for the peak and valley detector outputs is selected when the difference between the current peak and valley voltages exceeds a predetermined percentage of the expected swing of the voltage input and when a packet has not been detected. When a packet is detected, a slower decay rate is selected. In this mode, the faster decay rate permits faster acquisition of packet data in the presence of DC offset, as it permits the data slicer to converge on an appropriate switching point more quickly.

Abstract: A radio frequency integrated circuit (RFIC) includes a die and a package. The die includes a radio frequency (RF) input/output (I/O) section, an RF to baseband conversion section, and a baseband processing section. The package includes a ball grid array and an antenna. The antenna is located on one edge of the package and the solder balls of the ball grid array proximal to the antenna are used to couple the RF I/O section of the die to the antenna.

Abstract: A high-speed CMOS transmit/receive antenna switch includes a first transistor, a second transistor and a parasitic compensation network. The first transistor is operably coupled to an antenna, to a transmit path, and to receive a transmit/receive (T/R) control signal. The second transistor is operably coupled to the antenna, the receive path, and to receive the T/R control signal. When the T/R control signal is in a first state, the first transistor is active and the second transistor is inactive such that the transmit path is coupled to the antenna. When the T/R control signal is in a second state, the second transistor is active and the first transistor is inactive such that the receive path is coupled to the antenna. The parasitic compensation network is coupled to compensate for adverse effects of parasitic components of the first and second transistors at operating frequencies of the transmit/receive antenna switch.

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: A high frequency peak detector includes an operational amplifier, a transistor, a capacitor, and an average to peak conversion module. A first inverting input of the operational amplifier receives a high frequency input signal, a second inverting input of the operational amplifier receives a common mode voltage of the high frequency signal, and a non-inverting input of the operational amplifier is coupled to the output of the operational amplifier. A gate of the transistor is operably coupled to the output of the operational amplifier and the source of the transistor is operably coupled to a power supply. The capacitor is operably coupled to the drain of the transistor to provide an analog signal representing an average peak to common mode value of the high frequency signal and to a circuit ground. The average to peak conversion module determines a peak value of the high frequency signal based on the analog signal and the common mode value.

Abstract: A high-speed CMOS transmit/receive antenna switch includes a first transistor, a second transistor and a parasitic compensation network. The first transistor is operably coupled to an antenna, to a transmit path, and to receive a transmit/receive (T/R) control signal. The second transistor is operably coupled to the antenna, the receive path, and to receive the T/R control signal. When the T/R control signal is in a first state, the first transistor is active and the second transistor is inactive such that the transmit path is coupled to the antenna. When the T/R control signal is in a second state, the second transistor is active and the first transistor is inactive such that the receive path is coupled to the antenna. The parasitic compensation network is coupled to compensate for adverse effects of parasitic components of the first and second transistors at operating frequencies of the transmit/receive antenna switch.

Abstract: A method for direct tuning of a radio receiver begins by providing a plurality of frequency-dependent control input signals to an input of the radio receiver.

Abstract: An integrated circuit includes an analog module, digital circuitry, and a border section. The analog module is susceptible to noise and is on a substrate of the integrated circuit. The digital circuitry generates the noise and is on the substrate. The border section is on the substrate and physically separates the analog module from the digital circuitry.

Abstract: A high output power radio frequency integrated circuit (RFIC) includes an up-conversion module, a plurality of power amplifier input stages, and a plurality of integrated circuit pads. The up-conversion module is coupled to convert a low intermediate frequency (IF) signal into a radio frequency (RF) signal. The plurality of power amplifier input stages is coupled to receive the RF signal and to produce separate RF pre-amp signals. Each of the plurality of integrated circuit pads is coupled to a corresponding one of the plurality of power amplifier input stages and to provide the separate RF pre-amp signals external to the RFIC.

Abstract: A tuned transformer balun circuit includes a transformer balun, a first tuning capacitor, a second tuning capacitor, and a third tuning capacitor. A first plate of the first tuning capacitor is operably coupled to a first node of the differential winding and a second plate of the first tuning capacitor is operably coupled to a circuit ground. A first plate of the tuning capacitor is operably coupled to a second node of the differential winding and a second plate of the second tuning capacitor is operably coupled to the circuit ground. A first plate of the third tuning capacitor is operably coupled to a first node of the single-end winding and the second plate of the third tuning capacitor is operably coupled to transceiver radio frequency signals, wherein, based on loading of the single-ended winding and the differential winding, the first, second, and third tuning capacitors resonate with the transformer balun to provide efficient energy transfer from the transmitter section to the antenna.

Abstract: Determination of a received signal strength indication in a direct conversion receiver begins by determining, at a given time, a 1st value to be the larger of the in-phase component of the received signal and the quadrature component of the received signal. The direct conversion receiver then determines a 2nd value at the given time to be the smaller of the in-phase component of the received signal and the quadrature component of the received signal. As such, at a given time, the 1st and 2nd values correspond to the greater and lesser of the in-phase component and quadrature component, respectively. Having obtained these values, the direct conversion receiver then determines the received signal strength indication based on the 1st value, the 2nd value and an offset value. The offset value provides a scaling of the RSSI value based on the range of the RSSI values.

Abstract: A method for adjusting a programmable mixer of a local oscillation module to reduce local oscillation leakage begins by determining at least one of: DC offset of an input signal of the programmable mixer and process mismatches between a first mixing stage and a second mixing stage. The method continues by determining operational characteristics mismatch between the first mixing stage and the second mixing stage based on the at least one of the DC offset and process mismatches. The method continues by generating a control signal to substantially compensate for the operational characteristics mismatch. The method continues by providing the control signal to a compensation module, wherein the compensation module modifies operational characteristics of at least one of the first and second mixing stages based on the control signal such that the operational characteristics of the first mixing stage substantially equals the operational characteristics of the second mixing stage.

Abstract: A high-speed CMOS transmit/receive antenna switch includes a first transistor, a second transistor and a parasitic compensation network. The first transistor is operably coupled to an antenna, to a transmit path, and to receive a transmit/receive (T/R) control signal. The second transistor is operably coupled to the antenna, the receive path, and to receive the T/R control signal. When the T/R control signal is in a first state, the first transistor is active and the second transistor is inactive such that the transmit path is coupled to the antenna. When the T/R control signal is in a second state, the second transistor is active and the first transistor is inactive such that the receive path is coupled to the antenna. The parasitic compensation network is coupled to compensate for adverse effects of parasitic components of the first and second transistors at operating frequencies of the transmit/receive antenna switch.

Abstract: A high gain, highly linear mixer includes an input section, mixing section, at least one tuning component, and at least one stand by current source. The input section is operably coupled to receive an input voltage signal and perform a linear transconductance thereon to produce an input current signal. The mixing section is operably coupled to mix a local oscillation with the input current to produce a mixed current signal. The tuning component is operably coupled to the mixing section and to convert the mixed current signal into a mixed voltage signal that function as the output of the mixer. The standby current source is operably coupled to the mixing section and provides a standby current to the mixing section.

Abstract: An RFIC includes a baseband processing module, a digital to analog converter, an analog to digital converter, a radio module, and a border section. The border section is fabricated on the substrate, wherein the border section physically separates the radio module from the baseband processing module, the digital to analog converter, and the analog to digital converter, wherein the border section includes noise suppression circuitry operably coupled to convert outbound baseband signals into low noise outbound baseband signals and to convert low noise inbound baseband signals into inbound baseband signals.

Abstract: A low loss transmit/receive switch includes a 1st antenna capacitive coupling circuit, a 2nd antenna capacitive coupling circuit, an antenna selection circuit, a 1st inductive coupling circuit, and a 2nd inductive coupling circuit. The 1st antenna capacitive coupling circuit is operably coupled to a 1st antenna. The 2nd antenna capacitive coupling circuit is operably coupled to a 2nd antenna. The antenna selection circuit is operably coupled to enable the 1st or the 2nd antenna in accordance with an antenna selection signal. The 1st inductive coupling circuit is operably coupled to the 1st and the 2nd antenna capacitive coupling circuits and to an output of a power amplifier. The 2nd inductive coupling circuit is operably coupled to the 1st and the 2nd antenna capacitive coupling circuits and to an input of the low noise amplifier.

Abstract: A high output power radio frequency integrated circuit includes an up conversion module, a plurality of drivers and a plurality of integrated circuit pads. The up conversion module is operably coupled to convert a low intermediate frequency (IF) signal into a radio frequency (RF) signal. The plurality of drivers are operably coupled to receive the RF signal and to produce separate RF drive signals therefrom. The plurality of integrated circuit pads are coupled to the plurality of drivers to provide the separate RF drive signals to external components of the RFIC.