Patents by Inventor Sheng Guo

Sheng Guo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080052651
    Abstract: There is provided a set of methods for generating state space models of general VLSI interconnect and transmission lines, trees and nets by closed forms with exact accuracy and low computation complexity. The state space model is built by three types of models: the branch model, the connection model and the non-connection model, that are block matrices in closed forms, arranged with topology. The main features are the topology structure, simplicity and accuracy of the closed forms of the state space models {A,B,C,D} or {A,B,C}, computation complexity of O(N) in sense of scalar multiplication times, where N is the total system order, practice of the modeling, ELO model simplification, and their optimization. For evenly distributed interconnect and transmission lines, trees and nets, the closed forms of state space model have the computation complexity of O(1), i.e., only a fixed constant of scalar multiplication times.
    Type: Application
    Filed: August 8, 2006
    Publication date: February 28, 2008
    Inventor: Sheng-Guo Wang
  • Patent number: 7251791
    Abstract: There is provided a set of methods with the exact accuracy to effectively calculate the 2n-th order state space models of RLC distributed interconnect and transmission line in closed forms in time domain and transfer functions by recursive algorithms in frequency domain, where their RLC components can be evenly distributed or variously valued. The main features include simplicity and accuracy of the said closed forms of the state space models {A,B,C,D} without involving matrix inverse and matrix multiplication operations, effectiveness and accuracy of the said recursive algorithms of the transfer functions, dramatic reduction of the calculation complexity to O(n2) for the state space models, simulation methodology, and practice of various model reductions and their optimization. For evenly distributed RLC interconnect and transmission line, the said closed form of state space model has its computation complexity of only a fixed constant, i.e., O(1).
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: July 31, 2007
    Inventor: Sheng-Guo Wang
  • Patent number: 7197898
    Abstract: There is provided robust diameter-controlled optical fiber during optical fiber drawing process and an optical fiber drawing process which comprises drawing the optical fiber from a perform therefor under tension to form the optical fiber while heating and melting the preform, wherein an outer diameter of the preform is measured (at a safe position immediately) above the furnace, an outer diameter of the optical fiber on which no coating has been provided is measured at one process position or two process positions before coating, and drawing conditions are robustly controlled based on the deviation of the measured optical fiber diameter data and the measured preform diameter data from a preselected outer diameter of the optical fiber and a preselected outer diameter of the preform.
    Type: Grant
    Filed: November 20, 2001
    Date of Patent: April 3, 2007
    Inventor: Sheng-Guo Wang
  • Patent number: 7124388
    Abstract: There is provided a set of methods with the exact accuracy to effectively calculate the n-th order state space models of RC distributed interconnect and transmission line in closed forms in time domain and transfer functions by recursive algorithms in frequency domain, where their RC components can be evenly distributed or variously valued. The main features include simplicity and accuracy of the said closed forms of the state space models {A,B,C,D} without involving matrix inverse and matrix multiplication operations, effectiveness and accuracy of the said recursive algorithms of the transfer functions, dramatic reduction of the calculation complexity to O(n) for the state space models, simulation methodology, and practice of various model reductions and their optimization. For evenly distributed RC interconnect and transmission line, the said closed form of state space model has its computation complexity of only a fixed constant, i.e., O(1).
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: October 17, 2006
    Inventor: Sheng-Guo Wang
  • Patent number: 7012796
    Abstract: An electrostatic discharge protection apparatus is described. A multi-hole conductive layer is placed between a multi-hole structure and an electronic element of an electronic device. The multi-hole electric conductive layer contacts a conductive layer on the inside surface of a case of the electronic device. It dissipates the electric charges accumulated on the multi-hole structure because of a lack of the conductive layer, and thus prevents the accumulated electric charges from discharging to damage the electronic element.
    Type: Grant
    Filed: May 21, 2003
    Date of Patent: March 14, 2006
    Assignee: Arima Computer Corporation
    Inventors: Sheng-Guo Chen, Cheng-Nan Chen
  • Publication number: 20050270120
    Abstract: A dielectric filter includes at least two dielectric resonators, a housing, and a support rod supporting the dielectric resonators and attached to the housing. The support rod may include a first end and a second end attached to the housing. A method of manufacturing a dielectric filter includes fixing dielectric resonators to a support rod and attaching each end of the support rod to a housing.
    Type: Application
    Filed: May 23, 2005
    Publication date: December 8, 2005
    Inventor: Jiunn-Sheng Guo
  • Publication number: 20050256009
    Abstract: This invention provides a laser trimming method for tuning the frequency of a spiral resonator, and for improving the characteristics of a high temperature superconductor filter comprised of high temperature superconductor spiral resonators, by tuning the individual high temperature superconductor spiral resonators. This invention also provides a method for tuning the resonance frequency of a high temperature superconductor planar coil. This invention also provides a laser ablation process for creating high temperature superconductor circuit elements.
    Type: Application
    Filed: November 18, 2004
    Publication date: November 17, 2005
    Inventors: Robby Alvarez, Calixto Estrada, Jiunn-Sheng Guo, Paul Martin, James McCambridge, Robert Rossi, Zhi-Yuan Shen
  • Publication number: 20050160387
    Abstract: There is provided a set of methods with the exact accuracy to effectively calculate the 2n-th order state space models of RLC distributed interconnect and transmission line in closed forms in time domain and transfer functions by recursive algorithms in frequency domain, where their RLC components can be evenly distributed or variously valued. The main features include simplicity and accuracy of the said closed forms of the state space models {A,B,C,D} without involving matrix inverse and matrix multiplication operations, effectiveness and accuracy of the said recursive algorithms of the transfer functions, dramatic reduction of the calculation complexity to O(n2) for the state space models, simulation methodology, and practice of various model reductions and their optimization. For evenly distributed RLC interconnect and transmission line, the said closed form of state space model has its computation complexity of only a fixed constant, i.e., O(1).
    Type: Application
    Filed: January 18, 2005
    Publication date: July 21, 2005
    Inventor: Sheng-Guo Wang
  • Publication number: 20050160382
    Abstract: There is provided a set of methods with the exact accuracy to effectively calculate the n-th order state space models of RC distributed interconnect and transmission line in closed forms in time domain and transfer functions by recursive algorithms in frequency domain, where their RC components can be evenly distributed or variously valued. The main features include simplicity and accuracy of the said closed forms of the state space models {A,B,C,D} without involving matrix inverse and matrix multiplication operations, effectiveness and accuracy of the said recursive algorithms of the transfer functions, dramatic reduction of the calculation complexity to O(n) for the state space models, simulation methodology, and practice of various model reductions and their optimization. For evenly distributed RC interconnect and transmission line, the said closed form of state space model has its computation complexity of only a fixed constant, i.e., O(l).
    Type: Application
    Filed: January 18, 2005
    Publication date: July 21, 2005
    Inventor: Sheng-Guo Wang
  • Patent number: 6918773
    Abstract: A card connector for mounting and positioning a card on a circuit board and electrically connecting the card with the circuit board is provided. The card connector comprises a guiding frame, a connector socket, an isolation film and a conductive film. The guiding frame is set over the circuit board for guiding and accommodating a card. The connector socket is set on the circuit board for electrically and structurally connecting with one end of the card. The isolation film is set on the circuit board between the guiding frame and the circuit board. The conductive film is set on the isolation film between the guiding frame and the circuit board and is electrically connected to a grounding washer on the circuit board. Based on the aforementioned card connector, electrostatic charges in the card can be transferred to the grounding circuit of the circuit board via the guiding frame and the conductive film.
    Type: Grant
    Filed: February 17, 2004
    Date of Patent: July 19, 2005
    Assignee: Arima Computer Corporation
    Inventor: Sheng-Guo Chen
  • Publication number: 20050106901
    Abstract: A card connector for mounting and positioning a card on a circuit board and electrically connecting the card with the circuit board is provided. The card connector comprises a guiding frame, a connector socket, an isolation film and a conductive film. The guiding frame is set over the circuit board for guiding and accommodating a card. The connector socket is set on the circuit board for electrically and structurally connecting with one end of the card. The isolation film is set on the circuit board between the guiding frame and the circuit board. The conductive film is set on the isolation film between the guiding frame and the circuit board and is electrically connected to a grounding washer on the circuit board. Based on the aforementioned card connector, electrostatic charges in the card can be transferred to the grounding circuit of the circuit board via the guiding frame and the conductive film.
    Type: Application
    Filed: February 17, 2004
    Publication date: May 19, 2005
    Inventor: Sheng-Guo Chen
  • Patent number: 6836397
    Abstract: An electrostatic discharge protection apparatus for a circuit board is described. The electrostatic discharge protection apparatus has a nonconductive layer and a conductive layer. The conductive layer is used to dissipate electric charges accumulated on the pointed ends of the circuit board, and thus improves the electrostatic discharge protection ability of the circuit board.
    Type: Grant
    Filed: May 21, 2003
    Date of Patent: December 28, 2004
    Assignee: Arima Computer Corporation
    Inventors: Sheng-Guo Chen, Cheng-Nan Chen
  • Patent number: 6828895
    Abstract: A disconnector assembly is provided for an arrester. A non-conductive housing has first and second opposite ends separated by an internal chamber. A first electrical terminal is connected at the first end. A second electrical terminal is connected at the second end. A capacitor assembly engages and extends between the first and second terminals in the internal chamber. The capacitor assembly includes a capacitor and a resistor electrically connected in series. A sparkgap is electrically parallel the capacitor assembly between the first and second terminals. A cartridge with an explosive charge is positioned in the internal chamber, and the cartridge is electrically parallel to the capacitor assembly and electrically in series with the spark gap.
    Type: Grant
    Filed: May 29, 2003
    Date of Patent: December 7, 2004
    Assignee: Hubbel Incorporated
    Inventors: Xingniu Huo, Dennis W. Lenk, John A. Krause, Craig S. Hunsicker, Zhuo-hua Ma, Hong-sheng Guo
  • Publication number: 20040239472
    Abstract: A disconnector assembly is provided for an arrester. A non-conductive housing has first and second opposite ends separated by an internal chamber. A first electrical terminal is connected at the first end. A second electrical terminal is connected at the second end. A capacitor assembly engages and extends between the first and second terminals in the internal chamber. The capacitor assembly includes a capacitor and a resistor electrically connected in series. A sparkgap is electrically parallel the capacitor assembly between the first and second terminals. A cartridge with an explosive charge is positioned in the internal chamber, and the cartridge is electrically parallel to the capacitor assembly and electrically in series with the spark gap.
    Type: Application
    Filed: May 29, 2003
    Publication date: December 2, 2004
    Inventors: Xingniu Huo, Dennis W. Lenk, John A. Krause, Craig S. Hunsicker, Zhuo-hua Ma, Hong-sheng Guo
  • Publication number: 20040233597
    Abstract: An electrostatic discharge protection apparatus is described. A multi-hole conductive layer is placed between a multi-hole structure and an electronic element of an electronic device. The multi-hole electric conductive layer contacts a conductive layer on the inside surface of a case of the electronic device. It dissipates the electric charges accumulated on the multi-hole structure because of a lack of the conductive layer, and thus prevents the accumulated electric charges from discharging to damage the electronic element.
    Type: Application
    Filed: May 21, 2003
    Publication date: November 25, 2004
    Applicant: ARIMA COMPUTER CORPORATION
    Inventors: Sheng-Guo Chen, Cheng-Nan Chen
  • Publication number: 20040233596
    Abstract: An electrostatic discharge protection apparatus for a circuit board is described. The electrostatic discharge protection apparatus has a nonconductive layer and a conductive layer. The conductive layer is used to dissipate electric charges accumulated on the pointed ends of the circuit board, and thus improves the electrostatic discharge protection ability of the circuit board.
    Type: Application
    Filed: May 21, 2003
    Publication date: November 25, 2004
    Applicant: ARIMA COMPUTER CORPORATION
    Inventors: Sheng-Guo Chen, Cheng-Nan Chen
  • Patent number: 6410089
    Abstract: A showerhead used for dispensing gas over a wafer in chemical vapor deposition (CVD), especially for CVD of copper in a thermal process using a precursor such as HFAC-Cu-TMVS. The patterns of holes is tailored to compensate for thermal and other effects, in particular by increasing the density of holes toward the periphery of the wafer in three or more zones. Such a variable pattern is particularly useful for liquid precursors that are atomized in a carrier gas, in which case a second perforated plate in back of the showerhead face can be eliminated, thereby reducing the flow impedance and the required pressure of the liquid-entrained gas, which tends to deposit out at higher pressures. The reduced flow impedance is particularly useful for CVD of copper.
    Type: Grant
    Filed: February 24, 2000
    Date of Patent: June 25, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Xin Sheng Guo, Keith Koai, Ling Chen, Mohan K. Bhan, Bo Zheng
  • Publication number: 20020066292
    Abstract: There is provided robust diameter-controlled optical fiber during optical fiber drawing process and an optical fiber drawing process which comprises drawing the optical fiber from a perform therefor under tension to form the optical fiber while heating and melting the preform, wherein an outer diameter of the preform is measured (at a safe position immediately) above the furnace, an outer diameter of the optical fiber on which no coating has been provided is measured at one process position or two process positions before coating, and drawing conditions are robustly controlled based on the deviation of the measured optical fiber diameter data and the measured preform diameter data from a preselected outer diameter of the optical fiber and a preselected outer diameter of the preform.
    Type: Application
    Filed: November 20, 2001
    Publication date: June 6, 2002
    Inventor: Sheng-Guo Wang
  • Patent number: 6374512
    Abstract: Method and apparatus for reducing contamination of a substrate in a substrate processing system. The apparatus has a substrate support, a gas directing shield circumscribing the substrate support and a shadow ring disposed vertically above the substrate support and gas directing shield for retaining the substrate. The gas directing shield and substrate support define an annular channel that is provided with an edge purge gas. The edge purge gas imparts a force at the edge of a substrate resting on the substrate support the lifts it off the substrate supports and against the shadow ring. The shadow ring further has a plurality of conduits extending from its upper surface to its sidewall to provide a path for the edge purge gas to vent and to impede the flow of process gases under the backside and around the edge of the substrate.
    Type: Grant
    Filed: August 1, 2000
    Date of Patent: April 23, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Xin Sheng Guo, Shin-Hung Li, Lawrence Lei
  • Patent number: 6296712
    Abstract: The invention provides a substrate support member and a purge guide for directing purge gas past the edge of a substrate and towards the outer perimeter of the chamber. The purge guide includes a plurality of holes disposed around the inner perimeter thereof to provide a purge gas passage and to prevent purge gas from interfering with the deposition chemistry on the surface of the substrate. A substrate support member is also provided having a vacuum chuck for securing a substrate to the upper surface thereof. The substrate support member preferably includes a shoulder on which the purge guide is supported during processing. The invention also provides a method for shielding an edge of a substrate by flowing a purge gas adjacent the edge of the substrate and then through a plurality of purge holes on a purge guide.
    Type: Grant
    Filed: April 6, 1998
    Date of Patent: October 2, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Xin Sheng Guo, Mohan Bhan, Justin Jones, Lawrence Lei, Russell Ellwanger, Mei Chang, Ashok Sinha, Avi Tepman