Patents by Inventor Sheng YU

Sheng YU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240006829
    Abstract: A connector is disclosed and includes a main body, a sleeving component, a conductive terminal and a signal terminal. The main body has an opening end and a sleeved end opposite to each other. An electronic device end is matched with the connector through the opening end. The sleeving component is slidably disposed on the sleeved end, and includes a conductive contact portion and a signal contact portion arranged in parallel. The conductive terminal is fixed to the main body for connecting with the conductive contact portion. The signal terminal is fixed to the main body for connecting with the signal contact portion. When the connector is detached from the electronic device end, the sleeving component is displaced relative to the main body, the signal contact portion is separated from the signal terminal, and the conductive terminal end and the conductive contact portion are maintained in an electrical connection.
    Type: Application
    Filed: February 23, 2023
    Publication date: January 4, 2024
    Inventors: Cheng-Yi Lin, Ting-Yun Lu, Yi-Chih Hsu, Sheng-Yu Wen
  • Publication number: 20240006828
    Abstract: A connector is disclosed and includes a housing base, a conductive terminal, a signal terminal and a protrusion. A sleeve of an electronic device end sleeves on the housing base through an opening end along a first direction and slides a first displacement distance, plural contact pins of the electronic device end slide into the accommodation space through the opening end, and a conductive contact pin of the electronic device end is interfered with the conductive terminal to form an electrical connection. The protrusion is elastically connected to the housing base and penetrates through the housing base. When the sleeve passes through the opening end and slides a second displacement distance greater than the first displacement distance, the protrusion is interfered with the sleeve and drives the signal terminal, so that the signal terminal pushes against a signal contact pin of the electronic device end to form an electrical connection.
    Type: Application
    Filed: January 13, 2023
    Publication date: January 4, 2024
    Inventors: Cheng-Yi Lin, Ting-Yun Lu, Yi-Chih Hsu, Sheng-Yu Wen
  • Publication number: 20230413454
    Abstract: A semiconductor device package includes a display device, an encapsulation layer disposed in direct contact with the display device, and a reinforced structure surrounded by the encapsulation layer. The reinforced structure is spaced apart from a surface of the display device. A method of manufacturing a semiconductor device package is also disclosed.
    Type: Application
    Filed: August 29, 2023
    Publication date: December 21, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ming-Hung CHEN, Yung I YEH, Chang-Lin YEH, Sheng-Yu CHEN
  • Patent number: 11827300
    Abstract: A seat for a personal transport device is provided. The seat includes a first seat body portion and a second body portion disposed on an opposite side of a midline from the first seat body portion. The midline is aligned along a longitudinal direction of the seat. The seat also includes a folding mechanism attached to the first seat body portion and the second seat body portion. The folding mechanism is configured to fold the seat along the midline to transition the seat between an unfolded configuration and a folded configuration. In one embodiment, the folding mechanism includes a spine extending underneath the seat in the longitudinal direction, a pair of plates disposed at opposite ends of the spine, a plurality of support members attached at one end to the spine and at an opposite end to the first seat body portion or the second seat body portion.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: November 28, 2023
    Assignee: Honda Motor Co., Ltd.
    Inventors: Matthew B. Staal, Jackie P. Porchay, Michael Jin Kim, Ming Hsein Lee, Ding Jong Chou, Sheng Yu Huang
  • Patent number: 11824026
    Abstract: Connector structures and methods of forming the same are provided. A method includes forming a first patterned passivation layer on a workpiece, the first patterned passivation layer having a first opening exposing a conductive feature of the workpiece. A seed layer is formed over the first patterned passivation layer and in the first opening. A patterned mask layer is formed over the seed layer, the patterned mask layer having a second opening exposing the seed layer, the second opening overlapping with the first opening. A connector is formed in the second opening. The patterned mask layer is partially removed, an unremoved portion of the patterned mask layer remaining in the first opening. The seed layer is patterned using the unremoved portion of the patterned mask layer as a mask.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: November 21, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chen-Shien Chen, Sheng-Yu Wu, Mirng-Ji Lii, Chita Chuang
  • Publication number: 20230369986
    Abstract: A hybrid power conversion circuit includes a high-side switch, a low-side switch, a transformer, a resonance tank, a first switch, a second switch, a first synchronous rectification switch, a second synchronous rectification switch, and a third switch. The resonance tank has an external inductor, an external capacitance, and an internal inductor. The first switch is connected to the external inductor. The second switch and a first capacitance form a series-connected path, and is connected to the external capacitance. The first and second synchronous rectification switches are respectively coupled to a first winding and a second winding. The third switch is connected to the second synchronous rectification switch. When an output voltage is less than a voltage interval, the hybrid power conversion circuit operates in a hybrid flyback conversion mode, and otherwise the hybrid power conversion circuit operates in a resonance conversion mode.
    Type: Application
    Filed: October 11, 2022
    Publication date: November 16, 2023
    Inventors: Sheng-Yu WEN, Cheng-Yi LIN, Ting-Yun LU
  • Patent number: 11812646
    Abstract: A display device includes a semiconductor substrate, an isolation layer, a light-emitting layer and a second electrode. The semiconductor substrate has a pixel region and a peripheral region located around the pixel region. The semiconductor substrate includes first electrodes and a driving element layer. The first electrodes are disposed in the pixel region and the first electrodes are electrically connected to the driving element layer. The isolation layer is disposed on the semiconductor substrate. The isolation layer includes a first isolation pattern disposed in the peripheral region, and the first isolation pattern has a first side surface and a second side surface opposite to the first side surface. The light-emitting layer is disposed on the isolation layer and the first electrodes, and covers the first side surface and the second side surface of the first isolation pattern. The second electrode is disposed on the light-emitting layer.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: November 7, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Yu Wu, Mirng-Ji Lii, Shang-Yun Tu, Ching-Hui Chen
  • Publication number: 20230333486
    Abstract: A method of manufacturing a semiconductor device includes dividing a number of dies along an x axis in a die matrix in each exposure field in an exposure field matrix delineated on the semiconductor substrate, wherein the x axis is parallel to one edge of a smallest rectangle enclosing the exposure field matrix. A number of dies is divided along a y axis in the die matrix, wherein the y axis is perpendicular to the x axis. Sequences SNx0, SNx1, SNx, SNxr, SNy0, SNy1, SNy, and SNyr are formed. p*(Nbx+1)-2 stepping operations are performed in a third direction and first sequence exposure/stepping/exposure operations and second sequence exposure/stepping/exposure operations are performed alternately between any two adjacent stepping operations as well as before a first stepping operation and after a last stepping operation. A distance of each stepping operation in order follows the sequence SNx.
    Type: Application
    Filed: June 7, 2023
    Publication date: October 19, 2023
    Inventors: Shinn-Sheng YU, Ru-Gun LIU, Hsu-Ting HUANG, Kenji YAMAZOE, Minfeng CHEN, Shuo-Yen CHOU, Chin-Hsiang LIN
  • Publication number: 20230323928
    Abstract: A ventilated brake disc includes first and second plates, and a plurality of connecting ribs and protruding ribs. The first and second plates are each shaped as a circular ring, and each have inner and outer surfaces. The inner surfaces of the first and second plates face each other. The first and second plates collectively form a central via and an outer periphery of the ventilated brake disc. Each connecting rib is integrally connected to the inner surfaces of the first and second plates, and elongated in shape, thereby defined with two opposite ends, which are oriented toward the central via and the outer periphery respectively. Each protruding rib protrudes integrally from the inner surface of the first or second plate, and is not connected to the other plate and located between two connecting ribs. The present invention simultaneously attains lightweight and great structural strength and heat dissipating effect.
    Type: Application
    Filed: October 7, 2022
    Publication date: October 12, 2023
    Applicant: CCYS HI-TECH INTERNATIONAL LTD.
    Inventor: SHENG-YU WANG
  • Publication number: 20230325579
    Abstract: A method includes generating a diffraction map from a plurality of target patterns, generating a favorable zone and an unfavorable zone from the diffraction map, placing a plurality of sub-resolution patterns in the favorable zone, and performing a plurality of geometric operations on the plurality of sub-resolution patterns to generate modified sub-resolution patterns. The modified sub-resolution patterns extend into the favorable zone, and are away from the unfavorable zone.
    Type: Application
    Filed: June 14, 2023
    Publication date: October 12, 2023
    Inventors: Shih-Ming Chang, Shinn-Sheng Yu, Jue-Chin Yu, Ping-Chieh Wu
  • Publication number: 20230299701
    Abstract: The present disclosure provides a DC motor driving system including a DC motor, a power supply device, a switch circuit, and a microprocessor. The power supply device provides an input electrical energy. The switch circuit receives the input electrical energy and outputs a motor electrical energy, which includes a motor power and a motor voltage, to the DC motor. The DC motor driving system switchably works in a constant-voltage mode, a first variable-voltage mode, or a second variable-voltage mode. In the constant-voltage mode, the input electrical energy remains unchanged. In the first variable-voltage mode, the microprocessor controls the power supply device to adjust the input electrical energy for increasing the motor voltage and the motor power. In the second variable-voltage mode, the microprocessor controls the power supply device to adjust the input electrical energy for decreasing the motor voltage and keeping the motor power unchanged.
    Type: Application
    Filed: June 9, 2022
    Publication date: September 21, 2023
    Inventors: Sheng-Yu Wen, Cheng-Yi Lin, Yi-Han Yang, Ting-Yun Lu
  • Patent number: 11765763
    Abstract: A method and system are provided for scheduling data transmission in a Multiple-Input Multiple-Output (MIMO) system. The MIMO system may comprise at least one MIMO transmitter and at least one MIMO receiver. Feedback from one or more receivers may be used by a transmitter to improve quality, capacity, and scheduling in MIMO communication systems. The method may include generating or receiving information pertaining to a MIMO channel metric and information pertaining to a Channel Quality Indicator (CQI) in respect of a transmitted signal; and sending a next transmission to a receiver using a MIMO mode selected in accordance with the information pertaining to the MIMO channel metric, and an adaptive coding and modulation selected in accordance with the information pertaining to the CQI.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: September 19, 2023
    Assignee: MALIKIE INNOVATIONS LIMITED
    Inventors: Ming Jia, Jianming Wu, Dong-Sheng Yu, Peiying Zhu, Wen Tong
  • Patent number: 11745921
    Abstract: A sealing cover with a two-way embedding buckle mechanism includes an upper cover member, a lower cover member, a fastener, an elastic element and a handle member. The fastener has two embedded buckle channels corresponding to each other, each includes a sliding path, a first embedding port and a second embedding port. The first and second embedding ports are formed on two ends of the sliding path respectively. The elastic element is elastically clamped between the upper and lower cover members. The handle member includes a knob handle and two support arms, and each support arm has a shaft, and each shaft selectively enters one of the first and second embedding ports and is capable of moving in each sliding path. This arrangement may improve the convenience of assembling and disassembling.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: September 5, 2023
    Assignee: FREE-FREE INDUSTRIAL CORP
    Inventors: Cheng-Yu Ou, Sheng-Yu Liu
  • Patent number: 11744024
    Abstract: A semiconductor device package includes a display device, an encapsulation layer disposed in direct contact with the display device, and a reinforced structure surrounded by the encapsulation layer. The reinforced structure is spaced apart from a surface of the display device. A method of manufacturing a semiconductor device package is also disclosed.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: August 29, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming-Hung Chen, Yung I Yeh, Chang-Lin Yeh, Sheng-Yu Chen
  • Publication number: 20230268887
    Abstract: The invention provides a radio frequency (RF) module and associated method with envelope tracking (ET) power supply in a device. The RF module may comprise a plurality of transmitters, an ET output, and an ET multiplexer. Each said transmitter may comprise an ET port and one or more RF outputs, and may be configured for providing an RF signal to one of said one or more RF outputs, and providing an ET signal, which reflects an envelope of the RF signal, to the ET port. The ET multiplexer may be coupled between said ET ports of the plurality of transmitters and the ET output, for selectively relaying one of said ET ports to the ET output.
    Type: Application
    Filed: February 18, 2022
    Publication date: August 24, 2023
    Inventors: Shi-Wen LIU, Tang-Nian LUO, Chi-Tsan CHEN, Chi-Kun CHIU, Jiann-Huang LIU, Peng-Ta HUANG, Chi-Sheng YU, Hua-Shan CHOU
  • Publication number: 20230253358
    Abstract: A package includes a first and a second package component. The first package component includes a first metal trace and a second metal trace at the surface of the first package component. The second metal trace is parallel to the first metal trace. The second metal trace includes a narrow metal trace portion having a first width, and a wide metal trace portion having a second width greater than the first width connected to the narrow metal trace portion. The second package component is over the first package component. The second package component includes a metal bump overlapping a portion of the first metal trace, and a conductive connection bonding the metal bump to the first metal trace. The conductive connection contacts a top surface and sidewalls of the first metal trace. The metal bump is neighboring the narrow metal trace portion.
    Type: Application
    Filed: April 19, 2023
    Publication date: August 10, 2023
    Inventors: Sheng-Yu Wu, Tin-Hao Kuo, Chen-Shien Chen
  • Patent number: 11714951
    Abstract: A method includes generating a diffraction map from a plurality of target patterns, generating a favorable zone and an unfavorable zone from the diffraction map, placing a plurality of sub-resolution patterns in the favorable zone, and performing a plurality of geometric operations on the plurality of sub-resolution patterns to generate modified sub-resolution patterns. The modified sub-resolution patterns extend into the favorable zone, and are away from the unfavorable zone.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: August 1, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Ming Chang, Shinn-Sheng Yu, Jue-Chin Yu, Ping-Chieh Wu
  • Patent number: 11709435
    Abstract: A method of manufacturing a semiconductor device includes dividing a number of dies along an x axis in a die matrix in each exposure field in an exposure field matrix delineated on the semiconductor substrate, wherein the x axis is parallel to one edge of a smallest rectangle enclosing the exposure field matrix. A number of dies is divided along a y axis in the die matrix, wherein the y axis is perpendicular to the x axis. Sequences SNx0, SNx1, SNx, SNxr, SNy0, SNy1, SNy, and SNyr are formed. p*(Nbx+1)?2 stepping operations are performed in a third direction and first sequence exposure/stepping/exposure operations and second sequence exposure/stepping/exposure operations are performed alternately between any two adjacent stepping operations as well as before a first stepping operation and after a last stepping operation. A distance of each stepping operation in order follows the sequence SNx.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: July 25, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shinn-Sheng Yu, Ru-Gun Liu, Hsu-Ting Huang, Kenji Yamazoe, Minfeng Chen, Shuo-Yen Chou, Chin-Hsiang Lin
  • Patent number: 11705031
    Abstract: The invention relates to a source driver and a composite level shifter. The source driver comprises a data buffer circuit, a plurality of level shifters and a plurality of driving circuits. The data buffer circuit receives and registers a plurality of pixel data during a driving period. The level shifters convert the voltage levels of the pixel data registered in the data buffer circuit during the driving period. The driving circuits generate a plurality of source signals according to the converted pixel data during driving period. The data buffer circuit may comprise a plurality of composite level shifters for converting the voltage levels of the pixel data, and latching the converted pixel data.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: July 18, 2023
    Assignee: Sitronix Technology Corp.
    Inventor: Sheng-Yu Lin
  • Patent number: D994057
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: August 1, 2023
    Inventor: Wan-Sheng Yu