Patents by Inventor Sheng-Yuan Lee

Sheng-Yuan Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110021043
    Abstract: An electric assembly includes a circuit board and an electric connector. The circuit board comprises a first surface and a second surface opposite thereto. The electric connector includes a metallic case, an insulating base, first leads and second leads. The insulating base is connected with the metallic case. The first leads are disposed on the insulating base and soldered to the first surface. The first leads includes a pair of first differential signal leads, a pair of second differential signal leads and a ground lead located between the pair of first differential signal leads and the pair of second differential signal leads. The second leads are disposed on the insulating base and soldered to the second surface. The second leads include a power lead, a second ground lead and a pair of third differential signal leads located between the power lead and the second ground lead.
    Type: Application
    Filed: January 12, 2010
    Publication date: January 27, 2011
    Applicant: VIA TECHNOLOGIES, INC.
    Inventor: Sheng-Yuan Lee
  • Publication number: 20110001223
    Abstract: A leadframe for a leadframe type package includes a chip base, and leads constituting lead lanes. One lead lane includes a pair of first differential signal leads, a pair of second differential signal leads, a pair of third differential signal leads between which and the pair of first differential signal leads is arranged the pair of second differential signal leads, a first power lead arranged between the pair of first and second differential signal leads, a second power lead arranged between the pair of second and third differential signal leads, and a third power lead between which and the second power lead is the pair of third differential signal leads. A voltage provided by the first power lead is less than a voltage provided by the second power lead, and the voltage provided by the second power lead is substantially equal to a voltage provided by the third power lead.
    Type: Application
    Filed: September 24, 2009
    Publication date: January 6, 2011
    Applicant: VIA TECHNOLOGIES, INC.
    Inventor: Sheng-Yuan Lee
  • Patent number: 7859383
    Abstract: A spiral inductor with a multi-trace structure having an insulating layer disposed on a substrate. A first spiral conductive trace with multiple turns is disposed on the insulating layer, wherein the outermost turn and the innermost turn of the first spiral conductive trace have a first end and a second end, respectively, and one of the first and second ends is connected to ground. A second spiral conductive trace with a single turn is disposed on the insulating layer and adjacent to the first spiral conductive trace, wherein the second spiral conductive trace is electrically connected to the turn that is connected to the ground and belongs to the first spiral conductive trace. The first spiral conductive trace has a relative outside and a relative inside, wherein the end of the first spiral conductive trace connected to ground and the second spiral conductive trace are located at different sides respectively.
    Type: Grant
    Filed: October 20, 2009
    Date of Patent: December 28, 2010
    Assignee: Via Technologies, Inc.
    Inventor: Sheng-Yuan Lee
  • Patent number: 7750784
    Abstract: An inductor structure includes a winding turn layer, a shielding layer, and a number of vias. The winding turn layer disposed above a substrate is formed by a number of turns connected in series and t has a first end and a second end. The first end is grounded. The shielding layer disposed between the winding turn layer and the substrate has a third end and a fourth end. At least two turns starting from the first end of the winding turn layer are projected onto the shielding layer. The vias are disposed between the winding turn layer and the shielding layer to at least electrically connect the third end and the fourth end of the shielding layer to a first turn of the winding turn layer. The first turn starts from the first end, and the winding turn layer and the shielding layer are electrically coupled in parallel.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: July 6, 2010
    Assignee: VIA Technologies, Inc.
    Inventor: Sheng-Yuan Lee
  • Patent number: 7724116
    Abstract: A symmetrical inductor. The inductor comprises first, second, third and fourth semi-circular conductive lines disposed in an insulating layer on a substrate, having first and second ends, respectively. The second semi-circular conductive line makes the first semi-circular conductive line symmetric, in which the first ends of the first and second semi-circular conductive lines are electrically connected to each other. The third semi-circular conductive line is parallel to and located outside the first semi-circular conductive line, in which the second ends of the third and second semi-circular conductive lines are electrically connected to each other. The fourth semi-circular conductive line makes the third semi-circular conductive line symmetric, in which the second ends of the fourth and first semi-circular conductive lines are electrically connected to each other.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: May 25, 2010
    Assignee: VIA Technologies, Inc.
    Inventor: Sheng-Yuan Lee
  • Patent number: 7709745
    Abstract: A circuit board includes a pad, a transmitting trace and a plating bar. The plating bar is used for forming an electroplating metallic layer on the pad, the pad and the transmitting trace are used for the signal transmission. Due to the plating bar causes a noise during the signal transmission, a dielectric layer having at least one opening is adjacent to at least one side of the plating bar to reduce the equivalent dielectric permittivity thereof and to maintain signal transmitting quality.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: May 4, 2010
    Assignee: VIA Technologies, Inc.
    Inventor: Sheng-Yuan Lee
  • Patent number: 7705704
    Abstract: An inductor structure disposed over a substrate and including a coil layer is provided. The coil layer has a plurality of coil turns electrically connected with each other. An innermost coil turn of the coil layer has a portion with a narrower width in a region with a higher magnetic flux density than that in the other region with lower magnetic flux density.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: April 27, 2010
    Assignee: Via Technologies, Inc.
    Inventors: Sheng-Yuan Lee, Hsiao-Chu Lin
  • Patent number: 7671282
    Abstract: A structure of a circuit board for improving the performance of routing traces is described as eliminating the resonant effects from the inner layers in a circuit board. For eliminating the stray capacitor effect between the planes in the circuit board, the present invention uses a method for etching an area of a power plane and the area is corresponding to a routing plane. Consequently, the routing trace can make good electric potential reference of a ground plane. Due to the reduction of the stray capacitor, the structure for improving the performance of routing traces of the invention can avoid the resonance effect and parasitic resonance in the circuit board as produced in a high-frequency situation in order to promote the quality of the circuit board.
    Type: Grant
    Filed: May 12, 2004
    Date of Patent: March 2, 2010
    Assignee: Via Technologies, Inc.
    Inventor: Sheng-Yuan Lee
  • Publication number: 20100045347
    Abstract: A power on control device and method are used at an adaptor providing a constant voltage. The power on control device includes a first voltage converting circuit, a second voltage converting circuit, a third voltage converting circuit, and a comparison module. The first voltage converting circuit receives the constant voltage and generates a reference voltage. The second voltage converting circuit receives the constant voltage and generates operating voltages. The third voltage converting circuit receives the operating voltages and generates preparatory voltages corresponding to the operating voltages according to the operating voltages. The comparison module outputs a power good signal when all the preparatory voltages are larger than the reference voltage.
    Type: Application
    Filed: August 13, 2009
    Publication date: February 25, 2010
    Applicant: ASUSTEK COMPUTER INC.
    Inventors: Sheng-Yuan Lee, Long-Tai Chen
  • Publication number: 20100039205
    Abstract: A spiral inductor with a multi-trace structure having an insulating layer disposed on a substrate. A first spiral conductive trace with multiple turns is disposed on the insulating layer, wherein the outermost turn and the innermost turn of the first spiral conductive trace have a first end and a second end, respectively, and one of the first and second ends is connected to ground. A second spiral conductive trace with a single turn is disposed on the insulating layer and adjacent to the first spiral conductive trace, wherein the second spiral conductive trace is electrically connected to the turn that is connected to the ground and belongs to the first spiral conductive trace. The first spiral conductive trace has a relative outside and a relative inside, wherein the end of the first spiral conductive trace connected to ground and the second spiral conductive trace are located at different sides respectively.
    Type: Application
    Filed: October 20, 2009
    Publication date: February 18, 2010
    Applicant: VIA TECHNOLOGIES, INC.
    Inventor: Sheng-Yuan Lee
  • Patent number: 7663463
    Abstract: An inductor structure including a coil layer and at least a gain lead is disclosed. The coil layer is disposed over a substrate and has a plurality of coil turns, wherein one of the coil turns is grounded. The gain lead is disposed under at least one of the inner side and the outer side of the grounded coil turn and is electrically connected in parallel to the grounded coil turn. The width of the gain lead is less than the width of the grounded coil turn.
    Type: Grant
    Filed: November 7, 2007
    Date of Patent: February 16, 2010
    Assignee: VIA Technologies, Inc.
    Inventors: Hsiao-Chu Lin, Sheng-Yuan Lee
  • Patent number: 7642890
    Abstract: An inductor structure including a first winding turn and a second winding turn is provided. The first winding turn is disposed above a substrate. The second winding turn is disposed between the first winding turn and the substrate. One end of the second winding turn is grounded, and the other end of the second winding turn and the first winding turn are electrically connected in series. The first winding turn and the second winding turn form a three-dimensional helix structure above the substrate. The width of the second winding turn is greater than that of the first winding turn, and furthermore, the first winding turn is projected onto the second winding turn.
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: January 5, 2010
    Assignee: VIA Technologies, Inc.
    Inventor: Sheng-Yuan Lee
  • Patent number: 7639031
    Abstract: A testing assembly for an electric package is suitable for electric testing of an electric package. The electric package has many contacts on a contact surface of the electric package. The contacts are arranged along an alignment line. The testing assembly for an electric package includes a testing board and a testing socket. The testing board has many testing pads. The testing socket is mounted on the testing board. The testing socket includes an insulating body and a plurality of pins. The insulating body has a carrying surface suitable for supporting a contact surface of the electric package. The pins passing through the insulating body are served as electric channels between the contacts and the testing pads. The pins are in contact with the contacts respectively, and the adjacent pins are arranged in a staggered way or arranged in different pitches.
    Type: Grant
    Filed: March 7, 2006
    Date of Patent: December 29, 2009
    Assignee: VIA Technologies, Inc.
    Inventor: Sheng-Yuan Lee
  • Patent number: 7633368
    Abstract: An inductor comprises first and second winding portions symmetrically arranged in an insulating layer on a substrate. Each of the first and second winding portions comprises at least two semicircular conductive traces concentrically arranged. At least one of the relatively outer semicircular conductive traces has a cross section smaller than at least one of the relatively inner semicircular conductive traces.
    Type: Grant
    Filed: June 6, 2007
    Date of Patent: December 15, 2009
    Assignee: Via Technologies, Inc.
    Inventor: Sheng-Yuan Lee
  • Patent number: 7626480
    Abstract: A spiral inductor with a multi-trace structure having an insulating layer disposed on a substrate. A first spiral conductive trace with multiple turns is disposed on the insulating layer, wherein the outermost turn and the innermost turn of the first spiral conductive trace have a first end and a second end, respectively, and one of the first and second ends is connected to ground. A second spiral conductive trace with a single turn is disposed on the insulating layer and adjacent to the first spiral conductive trace, wherein the second spiral conductive trace is electrically connected to the turn that is connected to the ground and belongs to the first spiral conductive trace. The first spiral conductive trace has a relative outside and a relative inside, wherein the end of the first spiral conductive trace connected to ground and the second spiral conductive trace are located at different sides respectively.
    Type: Grant
    Filed: July 6, 2007
    Date of Patent: December 1, 2009
    Assignee: Via Technologies, Inc.
    Inventor: Sheng-Yuan Lee
  • Patent number: 7598836
    Abstract: A multilayer winding inductor. The inductor at least includes multi-level interconnect and single-level interconnect structures. The multi-level interconnect structure includes a plurality of conductive plugs and a plurality of looped conductive traces overlapping and separated from each other. Each looped conductive trace has a gap to define first and second ends and at least two conductive plugs disposed between the neighboring looped conductive traces. The single-level interconnect structure is located over the multi-level interconnect structure, comprising an uppermost looped conductive trace and a second conductive plug. The uppermost looped conductive trace has a gap to define first and second ends, and the second conductive plug is disposed between the second end of the uppermost looped conductive trace and the first end of the looped conductive trace adjacent thereto, thereby electrically connecting the multi-level and single-level interconnect structures.
    Type: Grant
    Filed: November 13, 2006
    Date of Patent: October 6, 2009
    Assignee: Via Technologies, Inc.
    Inventor: Sheng-Yuan Lee
  • Publication number: 20090167476
    Abstract: An inductor structure disposed over a substrate and including a coil layer is provided. The coil layer has a plurality of coil turns electrically connected with each other. An innermost coil turn of the coil layer has a portion with a narrower width in a region with a higher magnetic flux density than that in the other region with lower magnetic flux density.
    Type: Application
    Filed: March 19, 2008
    Publication date: July 2, 2009
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: Sheng-Yuan Lee, Hsiao-Chu Lin
  • Publication number: 20090115562
    Abstract: A spiral inductor is provided. The spiral inductor includes a first spiral conductive trace with at least one turn, a second spiral conductive trace, and a connector. The first spiral conductive trace comprises an outer end and an inner end. The second spiral conductive trace surrounds a portion of the outermost turn of the first spiral conductive trace, and comprises a first end and a second end. The connector electrically connects to the inner end and the first end.
    Type: Application
    Filed: February 1, 2008
    Publication date: May 7, 2009
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: Sheng-Yuan Lee, Hsiao-Chu Lin
  • Publication number: 20090096567
    Abstract: An inductor structure includes a winding turn layer, a shielding layer, and a number of vias. The winding turn layer disposed above a substrate is formed by a number of turns connected in series and t has a first end and a second end. The first end is grounded. The shielding layer disposed between the winding turn layer and the substrate has a third end and a fourth end. At least two turns starting from the first end of the winding turn layer are projected onto the shielding layer. The vias are disposed between the winding turn layer and the shielding layer to at least electrically connect the third end and the fourth end of the shielding layer to a first turn of the winding turn layer. The first turn starts from the first end, and the winding turn layer and the shielding layer are electrically coupled in parallel.
    Type: Application
    Filed: December 19, 2008
    Publication date: April 16, 2009
    Applicant: VIA TECHNOLOGIES, INC.
    Inventor: Sheng-Yuan LEE
  • Publication number: 20090096566
    Abstract: A spiral inductor device is provided. The spiral inductor device comprises an insulating layer disposed on a substrate. A spiral conductive trace with multiple turns is disposed on the insulating layer, wherein the outermost turn and the innermost turn of the spiral conductive trace have a first end and a second end, respectively, and one of the first and second ends is connected to ground. A non-continuous spiral conductive trace with a single turn is disposed on the insulating layer, parallel and adjacent to the turn that belongs to the spiral conductive trace and is extended from the end of the spiral conductive trace without being connected to ground, wherein the non-continuous spiral conductive trace is connected to the ground.
    Type: Application
    Filed: February 18, 2008
    Publication date: April 16, 2009
    Applicant: VIA TECHNOLOGIES, INC.
    Inventor: Sheng-Yuan Lee