Patents by Inventor Shigetaka Kasuga

Shigetaka Kasuga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7859586
    Abstract: Provided is a light-receiving chip whose transparent protection plate has an area equal to or smaller than an area of the light-receiving chip, and which does not require a base portion for mounting. Provision of the light-receiving chip contributes to reduction in size and weight of cameras. In addition, provision of a solid-state imaging apparatus having excellent productivity contributes to reduction in price of cameras. A solid-state imaging apparatus (10) having: a solid-state imaging device (11) (a light-receiving chip) provided with a plurality of light-receiving cells arranged either one dimensionally or two dimensionally on one main surface of a base substrate; and a transparent protection plate (12) provided to cover a light-receiving area (18) (the plurality of light-receiving cells), where an area of the transparent protection plate is equal to or smaller than an area of the light-receiving chip, and a space (20) is formed between the light-receiving cells and the transparent protection plate.
    Type: Grant
    Filed: June 16, 2007
    Date of Patent: December 28, 2010
    Assignee: Panasonic Corporation
    Inventors: Takahiko Murata, Shigetaka Kasuga, Takumi Yamaguti
  • Patent number: 7808536
    Abstract: A solid-state imaging device for high-speed photography includes an imaging element area in which a plurality of pixel portions having photodetectors for photography are disposed in a matrix form. The solid-state imaging device generates image data by capturing pixel information obtained from the photodetectors for photography. The solid-state imaging device for high-speed photography further includes: a change detection element that detects a change in an amount of incident light, which is disposed in the imaging element area or at a predetermined position surrounding the imaging element area; and a controller that controls starting or stopping of capturing of pixel information obtained from the photodetectors for photography in accordance with a trigger signal based on a detection signal output from the change detection element.
    Type: Grant
    Filed: November 10, 2006
    Date of Patent: October 5, 2010
    Assignee: Panasonic Corporation
    Inventors: Takayoshi Yamada, Takumi Yamaguchi, Takahiko Murata, Shigetaka Kasuga
  • Patent number: 7791524
    Abstract: A solid-state imaging device includes: pixel circuits arranged in a matrix which perform photoelectric conversion on received light; and an AD conversion unit converting the resultant signal voltage of the photoelectric conversion. The AD conversion unit includes: a reference voltage generation unit generating plural reference voltages which are different from each other within a possible range for a signal voltage; a most significant bit conversion unit that identifies a voltage section including the signal voltage from among the voltage sections each having a corresponding one of the reference voltages as a base point and determines the identified result as the value of the most significant bit of the digital signal; and a least significant bit conversion unit that converts, into the least significant bit of the digital signal, the difference voltage between the signal voltage and the reference voltage as the base point of the identified voltage section.
    Type: Grant
    Filed: February 18, 2009
    Date of Patent: September 7, 2010
    Assignee: Panasonic Corporation
    Inventors: Shigetaka Kasuga, Yoshihisa Kato, Takahiko Murata, Takayoshi Yamada
  • Patent number: 7772536
    Abstract: Provided is a solid-state imaging device that can perform a high-speed imaging, with appropriate number of pixels maintained. A plurality of pixels are arranged in a matrix in the solid-state imaging device. Each pixel includes a plurality of signal charge holding units that hold signal charges output from a photo diode. A write target switching unit selects the signal charge holding units so that signal charges output at different time points are written to the signal charge holding units, respectively. A read target switching unit switches between signal charge holding units from which to read a signal charge.
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: August 10, 2010
    Assignee: Panasonic Corporation
    Inventors: Takayoshi Yamada, Takumi Yamaguchi, Takahiko Murata, Shigetaka Kasuga
  • Patent number: 7760260
    Abstract: A solid state imaging apparatus which includes a plurality of pixels two-dimensionally arranged in the vertical direction and the horizontal direction and every two vertically or horizontally adjacent ones of the plurality of pixels have color filters of different colors. In a predetermined period of time, charge signals received from ones of the plurality of pixels arranged in the vertical direction or the horizontal direction which include color filters of the same color (represented by circles) are sequentially output.
    Type: Grant
    Filed: January 20, 2004
    Date of Patent: July 20, 2010
    Assignee: Panasonic Corporation
    Inventors: Takahiko Murata, Takumi Yamaguti, Toshiya Fujii, Shigetaka Kasuga
  • Patent number: 7683817
    Abstract: The present invention provides a solid-state imaging device which can output a digital signal at a high speed without using a high-speed clock. The solid-state imaging device includes light receiving elements provided in an array and generating signal voltages based on light intensity of received light and AD converters each of which is provided in each of columns in the array. Each of the AD converters includes: a reference voltage generating unit (10) generating reference voltages; comparators (11a through 11c) comparing in parallel a current signal voltage which is one of signal voltages generated by the light receiving elements in the respective matrix columns with the reference voltages generated by the reference voltage generating unit; a digital signal generating circuit (23) generating a digital signal showing a result of the comparison and outputting the digital signal out of the AD converter.
    Type: Grant
    Filed: April 16, 2008
    Date of Patent: March 23, 2010
    Assignee: Panasonic Corporation
    Inventors: Takahiko Murata, Shigetaka Kasuga, Takayoshi Yamada
  • Patent number: 7671777
    Abstract: An AD converter includes an analog data storing unit, a first DA converter for converting an input digital data into a first analog reference voltage which varies within a first voltage range in a range of every possible signal voltage of the input analog data, a second DA converter for converting the input digital data into a second analog reference voltage which varies within a second voltage range in the range of every possible signal voltage of the input analog data, a first comparator for comparing the input analog data with the first reference voltage, a second comparator for comparing the input analog data with the second reference voltage and a digital data storing unit for storing a digital data corresponding to a point of time when a change of state occurs in the comparison results of each of the first and second comparators.
    Type: Grant
    Filed: July 9, 2007
    Date of Patent: March 2, 2010
    Assignee: Panasonic Corporation
    Inventors: Takayoshi Yamada, Takumi Yamaguchi, Shigetaka Kasuga, Takahiko Murata
  • Patent number: 7667171
    Abstract: In the case where a subject is captured with a high-luminance light, such as sunlight, for a background, a phenomenon that a portion of the high-luminance subject is detected as a no-signal level is prevented. The solid-state imaging device includes: a photoelectric transducer PD which converts incident light to charges; a voltage level detection circuit 50 in which pixel units 10an1 and 10bn1, each having a voltage conversion amplifying transistor Q13a which outputs a voltage by converting the charges accumulated in the photoelectric transducer PD, are arranged one-dimensionally or two-dimensionally, and which detects a pixel output voltage outputted from each of the pixel units to the common column signal line Ln; and a column signal processing circuit 80 which receives a logic output voltage of the voltage level detection circuit 50 and the pixel output voltage and which outputs a voltage to a horizontal output circuit 90.
    Type: Grant
    Filed: July 4, 2005
    Date of Patent: February 23, 2010
    Assignee: Panasonic Corporation
    Inventors: Shigetaka Kasuga, Takumi Yamaguchi, Takahiko Murata
  • Patent number: 7626622
    Abstract: A solid state image pickup device 110 is provided with: a plurality of pixel units 10 that are arranged two-dimensionally and include a photoelectric conversion unit (photodiode PD) that converts light into a charge and an amplification unit (amplifier Q13) that converts the charge into a voltage and outputs it; a plurality of noise signal removal units (noise cancellation units 40) that are provided one for each column and remove noises contained in the voltage outputted from the amplifier Q31 of the pixel unit 10 belonging to the column; and a plurality of column amplification units (column amplifiers 70) that amplify the voltage outputted from the amplifier Q13 of the pixel unit 10 and output the amplified voltage to the noise cancellation unit 40, and enables increase in sensitivity and reduction in noise with low power consumption.
    Type: Grant
    Filed: January 11, 2005
    Date of Patent: December 1, 2009
    Assignee: Panasonic Corporation
    Inventors: Shigetaka Kasuga, Takumi Yamaguchi, Takahiko Murata, Yoshiyuki Matsunaga, Ryohei Miyagawa, Atsushi Ueta
  • Patent number: 7589585
    Abstract: A noise reduction circuit outputs a signal corresponding to a voltage difference between two different signals. The noise reduction circuit includes: an amplifier circuit for amplifying the two different signals at different timings; and a voltage difference detection circuit for detecting a voltage difference between the two different signals amplified by the amplifier circuit. The noise reduction circuit accumulates, a predetermined number of times, an electric charge corresponding to the voltage difference detected by the voltage difference detection circuit and combines the accumulated electric charges to output a resultant electric charge.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: September 15, 2009
    Assignee: Panasonic Corporation
    Inventors: Takahiko Murata, Takumi Yamaguchi, Shinzo Koyama, Shigetaka Kasuga, Takayoshi Yamada
  • Publication number: 20090212985
    Abstract: A solid-state imaging device includes: pixel circuits arranged in a matrix which perform photoelectric conversion on received light; and an AD conversion unit converting the resultant signal voltage of the photoelectric conversion. The AD conversion unit includes: a reference voltage generation unit generating plural reference voltages which are different from each other within a possible range for a signal voltage; a most significant bit conversion unit that identifies a voltage section including the signal voltage from among the voltage sections each having a corresponding one of the reference voltages as a base point and determines the identified result as the value of the most significant bit of the digital signal; and a least significant bit conversion unit that converts, into the least significant bit of the digital signal, the difference voltage between the signal voltage and the reference voltage as the base point of the identified voltage section.
    Type: Application
    Filed: February 18, 2009
    Publication date: August 27, 2009
    Applicant: Panasonic Corporation
    Inventors: Shigetaka KASUGA, Yoshihisa KATO, Takahiko MURATA, Takayoshi YAMADA
  • Patent number: 7567281
    Abstract: A solid state imaging device includes an imaging area where a plurality of first pixels and a plurality of second pixels are respectively arranged in the form of a matrix, each of the first pixels and the second pixels having a photoelectric conversion portion and outputting a signal in accordance with brightness of incident light when selected; a plurality of first memories that respectively store signals of selected first pixels out of the plurality of first pixels; and a plurality of second memories that are respectively connected in parallel to the first memories and respectively store signals of selected second pixels out of the plurality of second pixels. The signals stored in the first memories and in the second memories are successively read to a horizontal signal line.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: July 28, 2009
    Assignee: Panasonic Corporation
    Inventors: Takumi Yamaguchi, Takahiko Murata, Shigetaka Kasuga, Takayoshi Yamada, Yoshiyuki Matsunaga, Ryohei Miyagawa
  • Publication number: 20090079857
    Abstract: The received-light intensity measuring device includes: a pixel circuit 1 including a photodiode (PD) that accumulates an amount of electric charges according to the intensity of received light, a floating diffusion (FD) that generates a signal voltage VCL according to an amount of retained electric charges, and a transfer switch that controls the transfer, to the FD, of the electric charges accumulated in the PD; a DAC 11 that generates a control voltage VTRAN varying in a ramp waveform and applies VTRAN to the gate of the transfer switch; a column AD conversion circuit 13 that obtains the digital value by quantizing a length of time from a first point in time set with reference to a period during which VTRAN is applied to a second point in time at which a specific fluctuation occurs in a temporal variation rate of the signal voltage VCL while VTRAN is being applied.
    Type: Application
    Filed: September 23, 2008
    Publication date: March 26, 2009
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yoshihisa KATO, Takahiko MURATA, Shigetaka KASUGA, Takayoshi YAMADA
  • Publication number: 20090059047
    Abstract: Provided is a solid-state imaging device having pixel units that are two-dimensionally arranged, and including: a photodiode that generates an optical signal charge corresponding to an intensity and an exposure time of light; a MOS transistor that transfers the optical signal charge; an accumulating unit that generates a voltage corresponding to the signal charge through the MOS transistor; a storing unit that stores a voltage corresponding to an optical signal charge in the accumulating unit; and a voltage setting unit that sets a value of a voltage in the accumulating unit to a value corresponding to the voltage in the storing unit.
    Type: Application
    Filed: August 21, 2008
    Publication date: March 5, 2009
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Takahiko MURATA, Yoshihisa KATO, Shigetaka KASUGA, Takayoshi YAMADA
  • Publication number: 20090033780
    Abstract: An object of the present invention is to provide a two-dimensional solid state imaging device which can realize speeding up of signal output. The two-dimensional solid state imaging device includes: a pixel region; a first capacitance element and a second capacitance element each of which is arranged for a different column of pixels and accumulates pixel signals of the corresponding column of pixels; a first horizontal signal line and a second horizontal signal line each of which transmits the pixel signals accumulated in a corresponding capacitance element; a common signal line connected to the horizontal signal lines; a scan timing generation unit and a switch unit which control readout of the pixel signals from the capacitance element to the horizontal signal line; and an external output timing unit and a switch unit which select the horizontal signal line and control output of the pixel signals from the selected horizontal signal line to the common signal line.
    Type: Application
    Filed: July 11, 2006
    Publication date: February 5, 2009
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Takahiko Murata, Takumi Yamaguchi, Shigetaka Kasuga, Takayoshi Yamada
  • Publication number: 20090021619
    Abstract: A solid state image pickup device 110 is provided with: a plurality of pixel units 10 that are arranged two-dimensionally and include a photoelectric conversion unit (photodiode PD) that converts light into a charge and an amplification unit (amplifier Q13) that converts the charge into a voltage and outputs it; a plurality of noise signal removal units (noise cancellation units 40) that are provided one for each column and remove noises contained in the voltage outputted from the amplifier Q31 of the pixel unit 10 belonging to the column; and a plurality of column amplification units (column amplifiers 70) that amplify the voltage outputted from the amplifier Q13 of the pixel unit 10 and output the amplified voltage to the noise cancellation unit 40, and enables increase in sensitivity and reduction in noise with low power consumption.
    Type: Application
    Filed: January 11, 2005
    Publication date: January 22, 2009
    Inventors: Shigetaka Kasuga, Takumi Yamaguchi, Takahiko Murata, Yoshiyuki Matsunaga, Ryohei Miyagawa, Atsushi Ueta
  • Publication number: 20080291305
    Abstract: In a solid state imaging device having a wide dynamic range, a pixel includes a photodiode that generates a charge in accordance with an intensity of incident light, signal generation units that generate a first voltage level in accordance with an amount of charge generated by the photodiode in an exposure period T1 and a second voltage level in accordance with an amount of charge generated by the photodiode in an exposure period T2, and signal composition units that composite the first and second voltage levels generated by the signal generation units.
    Type: Application
    Filed: April 9, 2008
    Publication date: November 27, 2008
    Inventors: Shigetaka Kasuga, Takahiko Murata, Takayoshi Yamada
  • Publication number: 20080266159
    Abstract: The present invention provides a solid-state imaging device which can output a digital signal at a high speed without using a high-speed clock. The solid-state imaging device includes light receiving elements provided in an array and generating signal voltages based on light intensity of received light and AD converters each of which is provided in each of columns in the array. Each of the AD converters includes: a reference voltage generating unit (10) generating reference voltages; comparators (11a through 11c) comparing in parallel a current signal voltage which is one of signal voltages generated by the light receiving elements in the respective matrix columns with the reference voltages generated by the reference voltage generating unit; a digital signal generating circuit (23) generating a digital signal showing a result of the comparison and outputting the digital signal out of the AD converter.
    Type: Application
    Filed: April 16, 2008
    Publication date: October 30, 2008
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takahiko Murata, Shigetaka Kasuga, Takayoshi Yamada
  • Patent number: 7423271
    Abstract: An infrared sensor includes a plurality of reference pixel units 2 arranged in a matrix pattern and series capacitor elements 14 provided in a one-to-one correspondence with the reference pixel units 2. The reference pixel units 2 each include an output line 30, a reference capacitor element 13 connected via a switching element 17 between the output line and the ground, and a plurality of infrared-detecting capacitor elements 12 connected via associated switching elements 16 between the output line 30 and the ground. Each series capacitor element 14 is connected to the associated output line 30.
    Type: Grant
    Filed: June 9, 2006
    Date of Patent: September 9, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takahiko Murata, Takumi Yamaguchi, Shigetaka Kasuga, Takayoshi Yamada
  • Publication number: 20080129851
    Abstract: A solid-state imaging device includes: a pixel unit which is composed of a plurality of pixel circuits arranged in a matrix, each pixel circuit outputting an analog signal by performing photoelectric conversion; an AD conversion circuit 15a provided for each of columns which sequentially converts a plurality of analog signals outputted from a plurality of ones of the pixel circuits in the column into a plurality of digital signals; a memory circuit 15b provided for each column which includes memories 32 and 33 and performs, in parallel, a process of storing each of the digital signals in one of the memories 32 and 33 and a process of outputting a digital signal stored in advance in the other; and data buses 17 connected to the memory circuit 15b in each column.
    Type: Application
    Filed: November 29, 2007
    Publication date: June 5, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Shigetaka KASUGA, Takumi YAMAGUCHI, Takahiko MURATA, Takayoshi YAMADA