Patents by Inventor Shigetaka Kasuga

Shigetaka Kasuga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7164113
    Abstract: The present invention provides a small, high-performance imaging device and its application to products at low cost by preventing noise superimposed on a timing pulse feed line from affecting the output of an imaging chip. The imaging device includes two chips: an imaging chip 101 including a sensor 102 and an image processing chip 106 including an image processing circuit 110. The transistors of all circuits in the imaging chip 101 are formed as either nMOS or pMOS transistors. The imaging chip 101 is stacked on the image processing chip 106.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: January 16, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuyuki Inokuma, Toshiya Fujii, Takumi Yamaguchi, Shigetaka Kasuga
  • Publication number: 20060291056
    Abstract: By making an aperture 13a to which light of an R (Red) component enters larger than other apertures (apertures 12a, 14a, and 15a), an attenuation ratio of light of the R component can be reduced when compared with the case where each aperture has a same size. Therefore, deterioration in sensitivity to the light of the R component can be suppressed, and deterioration in image quality can be reduced.
    Type: Application
    Filed: June 21, 2006
    Publication date: December 28, 2006
    Inventors: Takahiko Murata, Takumi Yamaguchi, Shigetaka Kasuga
  • Publication number: 20060278948
    Abstract: An object of the present invention is to provide a small solid-state image sensor which realizes significant improvement in sensitivity. The solid-state image sensor of the present invention includes a semiconductor substrate in which photoelectric conversion units are formed, a light-blocking film which is formed above the semiconductor substrate and has apertures formed so as to be positioned above respective photoelectric conversion units, and a high refractive index layer formed in the apertures. Here, each aperture has a smaller aperture width than a maximum wavelength in a wavelength of light in a vacuum converted from a wavelength of the light entering the photoelectric conversion unit through the apertures, and the high refractive index is made of a high refractive index material having a refractive index which allows transmission of light having the maximum wavelength through the aperture.
    Type: Application
    Filed: June 7, 2006
    Publication date: December 14, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Takumi YAMAGUCHI, Takahiko MURATA, Shigetaka KASUGA
  • Publication number: 20060268133
    Abstract: A noise reduction circuit includes a plurality of electric charge accumulating sections and a plurality of switching sections. In the noise reduction circuit, electric charge in an amount corresponding to a signal containing a noise is accumulated in each of the electric charge accumulating sections, and thereafter the switching sections are turned on to connect the electric charge accumulating sections in parallel or in series with each other, thereby outputting a signal corresponding to the average of, or the sum total of, the amounts of electric charge accumulated in the respective electric charge accumulating sections.
    Type: Application
    Filed: March 20, 2006
    Publication date: November 30, 2006
    Inventors: Takahiko Murata, Takumi Yamaguchi, Shigetaka Kasuga
  • Publication number: 20060102827
    Abstract: Provided is a solid-state imaging device which can obtain an output characteristic without preventing linearity even in a high light-intensity range, and at the same time achieve a much wider dynamic range. The solid-state imaging device 1 includes: a photo-detecting element (a photoelectric transducer PD) for transducing incident light to electric charges and accumulate the electric charges; an accumulation element (a floating de-fusion FD) for accumulating the electric charges; and a transfer circuit (a MOS transistor Q11 and a pulse generating circuit 50a) for transferring the electric charges accumulated in the photo-detecting element to the accumulation element, wherein the transfer circuit has two operation modes as follows: a whole transfer for transferring almost all of the accumulated electric charges to the accumulation element; and a partial transfer for transferring only a part of the accumulated electric charges which exceeds a predetermined amount to the accumulation element.
    Type: Application
    Filed: November 15, 2005
    Publication date: May 18, 2006
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shigetaka Kasuga, Takumi Yamaguchi, Takahiko Murata
  • Publication number: 20050103983
    Abstract: A photodetector includes a semiconductor substrate having photo-cells (1a, 1b, 1c). Each photo-cell is provided with a filter layer 20 that transmits light in a wavelength range predetermined for the photo-cell, and a photoelectric converter 17 that generates a signal charge according to an intensity of the light transmitted through the filter layer 20. Thickness (ta, tb, tc) of the filter layers 20 are corresponding to the wavelength ranges predetermined for respective photo-cells. By such a structure, it is possible to provide cost effective photodetectors that can be manufactured without managing materials for pigments and dyestuff for different colors when making color filters.
    Type: Application
    Filed: November 18, 2004
    Publication date: May 19, 2005
    Inventors: Takumi Yamaguchi, Shigetaka Kasuga, Takahiko Murata
  • Patent number: 6870401
    Abstract: The signal transmission circuit is provided, said signal transmission circuit being capable of stable operations even with a source power of low voltage and a fast operation. The signal transmission circuit comprises plural stages of circuit in each of which the pulse voltage according to the driving pulse is sequentially outputted.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: March 22, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shigetaka Kasuga, Takumi Yamaguchi, Takahiko Murata
  • Publication number: 20050046445
    Abstract: The signal transmission circuit is provided, said signal transmission circuit being capable of stable operations even with a source power of low voltage and a fast operation. The signal transmission circuit comprises plural stages of circuit in each of which the pulse voltage according to the driving pulse is sequentially outputted.
    Type: Application
    Filed: July 30, 2004
    Publication date: March 3, 2005
    Inventors: Shigetaka Kasuga, Takumi Yamaguchi, Takahiko Murata
  • Publication number: 20050024525
    Abstract: With the use of the MOS-type solid-state imaging device, it is possible, by extending the period during which the VDD voltage rises from Low level to High level, that the gate voltage of the resetting unit does not fluctuate to have a positive electric potential due to the coupling capacitance between the VDD power and the gate of the resetting unit, unlike the conventional case. Consequently, the electrons necessary for rendering the accumulation unit non-selectable do not flow from the accumulation unit to the VDD power. This prevents the level of the electric potential in the accumulation unit of non-selectable row from becoming positive. Also, the detecting unit is not switched on, which prevents the error of selecting a non-selectable row.
    Type: Application
    Filed: July 29, 2004
    Publication date: February 3, 2005
    Inventors: Takumi Yamaguchi, Takahiko Murata, Shigetaka Kasuga
  • Publication number: 20040201732
    Abstract: An imaging device chip set includes an imaging chip provided for obtaining an electric signal by photoelectric conversion of incident light, and a DSP chip provided for carrying out digital signal processing with respect to the electric signal obtained by the imaging chip. The imaging chip includes a plurality of unit pixels for generating the electric signal by the photoelectric conversion of incident light, a horizontal scanning circuit for selecting the unit pixels in a horizontal direction, and a vertical scanning circuit for selecting the unit pixels in a vertical direction. The DSP chip includes a timing generating circuit for generating timing pulses necessary for operations of the horizontal scanning circuit and the vertical scanning circuit, and a digital signal processing circuit for carrying out digital signal processing with respect to the electric signal generated by the plurality of unit pixels.
    Type: Application
    Filed: September 9, 2003
    Publication date: October 14, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO.
    Inventors: Shigetaka Kasuga, Yoshiyuki Matsunaga, Kazuyuki Inokuma
  • Publication number: 20040189845
    Abstract: A solid-state image sensing apparatus that can photograph a moving object with no distortion is a solid-state image sensing apparatus that performs photoelectric conversion of incident light comprises: a photosensitive unit in which a plurality of photoelectric conversion circuits is laid out one-dimensionally or two-dimensionally, each of said photoelectric conversion circuits corresponding to a pixel and including a photodiode that accumulates electric charge by performing the photoelectric conversion of incident light and an output circuit that outputs the accumulated electric charge as an electric signal; an electric charge simultaneous removal unit operable to simultaneously remove the accumulated electric charge in the photodiodes laid out in a predetermined region to be read out in the photosensitive unit; and an electric charge accumulation unit operable to accumulate electric charge in the photodiode laid out in the region to be read out during a predetermined time after the accumulated electric char
    Type: Application
    Filed: February 10, 2004
    Publication date: September 30, 2004
    Inventors: Shigetaka Kasuga, Takumi Yamaguchi, Takahiko Murata
  • Publication number: 20040183932
    Abstract: The solid state imaging device of this invention includes a pixel unit for outputting, as an analog signal, a voltage signal corresponding to light and an AD converter for converting the analog signal output by the pixel unit into a digital signal. Transistors used in the pixel unit and the AD converter are all N-type MOS transistors. The AD converter includes a booster circuit.
    Type: Application
    Filed: January 29, 2004
    Publication date: September 23, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventor: Shigetaka Kasuga
  • Publication number: 20040145666
    Abstract: A solid state imaging apparatus which includes a plurality of pixels two-dimensionally arranged in the vertical direction and the horizontal direction and every two vertically or horizontally adjacent ones of the plurality of pixels have color filters of different colors. In a predetermined period of time, charge signals received from ones of the plurality of pixels arranged in the vertical direction or the horizontal direction which include color filters of the same color (represented by circles) are sequentially output.
    Type: Application
    Filed: January 20, 2004
    Publication date: July 29, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD
    Inventors: Takahiko Murata, Takumi Yamaguti, Toshiya Fujii, Shigetaka Kasuga
  • Publication number: 20040141073
    Abstract: A solid-state imaging device includes: an imaging portion in which a plurality of pixels for photoelectrically converting incident light are arranged so as to form a plural kinds of pixel lines having different color arrangements; a memory in which pixel signals obtained from the pixels of at least one line in the imaging portion are stored; an output signal line into which the pixel signals stored in the memory are read out; and an output portion from which signals of the output signal line are output. Pixel signals obtained from non-adjacent pixels of a first color in one line are read out into the output signal lines sequentially, and then pixel signals obtained from non-adjacent pixels of a second color are read out into the output signal lines sequentially. Pixel signals of the same color are output sequentially, so that it is not necessary to operate color selection switch for every pixel signals at high speed. Furthermore, it is possible to suppress the mixing of adjacent colors.
    Type: Application
    Filed: January 8, 2004
    Publication date: July 22, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takumi Yamaguchi, Shigetaka Kasuga, Mitsuyoshi Mori
  • Publication number: 20040095495
    Abstract: The present invention provides a small, high-performance imaging device and its application to products at low cost by preventing noise superimposed on a timing pulse feed line from affecting the output of an imaging chip. The imaging device includes two chips: an imaging chip 101 including a sensor 102 and an image processing chip 106 including an image processing circuit 110. The transistors of all circuits in the imaging chip 101 are formed as either nMOS or pMOS transistors. The imaging chip 101 is stacked on the image processing chip 106.
    Type: Application
    Filed: September 30, 2003
    Publication date: May 20, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuyuki Inokuma, Toshiya Fujii, Takumi Yamaguchi, Shigetaka Kasuga