Patents by Inventor Shih-An Huang

Shih-An Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170093152
    Abstract: An ESD protected IC includes: at least one functional circuitry, coupled to a first voltage supply and a second voltage supply, the functional circuitry including at least one functional package ball; and at least one ESD detection circuit, coupled to the second voltage supply, the ESD detection circuit free of being coupled to the first voltage supply, and further free of being coupled to the functional package ball of the functional circuitry.
    Type: Application
    Filed: September 21, 2016
    Publication date: March 30, 2017
    Inventors: Che-Yuan Jao, Bo-Shih Huang
  • Publication number: 20170084685
    Abstract: A semiconductor device comprising a substrate is disclosed. The substrate comprises: a well of type one; a first doped region of type two, provided in the well of type one; a well of type two, adjacent to the well of type one; a first doped region of type one, doped in the well of type two; and a second doped region of type two, provided in the well of type one and the well of type two, not touching the first doped region of type two. The substrate comprises no isolating material provided in a current path formed by the first doped region of type two, the well of type one, the well of type two and the first doped region of type one.
    Type: Application
    Filed: December 1, 2016
    Publication date: March 23, 2017
    Inventors: Bo-Shih Huang, Chien-Hui Chuang, Cheng-Chou Hung
  • Publication number: 20170063358
    Abstract: A clock buffer circuit is provided. The clock buffer circuit receives an input clock signal and generates a delay clock signal. The clock buffer circuit includes an input circuit, an output circuit, a first delay path, and a second delay path. The input circuit receives the input clock signal and generates an output clock signal according to the input clock signal. The output circuit generates the delay clock signal. The first delay path is coupled between the input circuit and the output circuit. The second delay path is coupled between the input circuit and the output circuit. The input circuit selectively provides the output clock signal to a first specific delay path among the first and second delay paths according to a control signal. The output circuit receives the output clock signal which passes through the first specific delay path and outputs the delay clock signal.
    Type: Application
    Filed: August 22, 2016
    Publication date: March 2, 2017
    Inventors: Yi-Feng CHEN, Ya-Shih HUANG, Chun-Sheng HUANG, Yiwei CHEN
  • Patent number: 9581882
    Abstract: An image capturing device and an auto-focus method thereof are provided, where the method includes the following steps. An exposure time is calculated by using an optical sensing element of the first lens. Whether the exposure time exceeds a time threshold is determined. If so, a global maximum search is concurrently performed by the first lens with a first resolution and a first step size as well as by the second lens with a second resolution and a second step size, where the first resolution is higher than the second resolution, and the first step size is less than the second step size. When a focus region in which a focus position is located is obtained by using the second lens, the focus position would be searched out from the focus region by using the first lens so as to obtain a new focus image.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: February 28, 2017
    Assignee: Acer Incorporated
    Inventors: Shih-Ting Huang, Chao-Shih Huang
  • Patent number: 9564815
    Abstract: The present invention provides a flyback power converter, a secondary side control circuit, and a control method thereof. The flyback power converter converts an input voltage to an output voltage, and provides a load current to a load circuit. The flyback power converter includes: a transformer circuit, a power switch circuit, a switch current sense circuit, a primary side control circuit, and a secondary side control circuit. The secondary side control circuit adaptively adjusts a frequency of a zero of a compensator gain function and/or a mid-frequency gain of the compensator gain function according to the load current, such that a number of poles of a system open loop gain function of the flyback power converter is at most more than a number of zeroes of the system open loop gain function by one under a crossover frequency.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: February 7, 2017
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Chun-Shih Huang, Chang-Yu Wu, Pei-Yuan Chen
  • Publication number: 20170026103
    Abstract: A multi-antenna system is provided. The multi-antenna system includes a first antenna, a second antenna, a tunable circuit, and a frequency-divisional circuit. The first antenna is utilized to implement signals of a first frequency band. The second antenna is utilized to implement signals of a second frequency band. The second antenna is different from the first antenna, and frequencies of the second frequency band are greater than frequencies of the first frequency band. The tunable circuit is utilized to switch the signals of the first frequency band. The frequency-divisional circuit is utilized to suppress harmonics caused by the tunable circuit.
    Type: Application
    Filed: June 16, 2016
    Publication date: January 26, 2017
    Inventors: Shao-Yu HUANG, Chung-Yu HUNG, Shih-Huang YEH
  • Patent number: 9543377
    Abstract: A semiconductor device comprising a substrate is disclosed. The substrate comprises: a well of type one; a first doped region of type two, provided in the well of type one; a well of type two, adjacent to the well of type one; and a first doped region of type one, doped in the well of type two. The substrate comprises no isolating material provided in a current path formed by the first doped region of type two, the well of type one, the well of type two and the first doped region of type one.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: January 10, 2017
    Assignee: MEDIATEK INC.
    Inventors: Bo-Shih Huang, Chien-Hui Chuang, Cheng-Chou Hung
  • Publication number: 20160372468
    Abstract: The invention provides a semiconductor device. The semiconductor device includes a fin field effect transistor (finFET) array including finFET units. Each of the finFET units includes a substrate having a fin along a first direction. A first metal strip pattern and a second metal strip pattern are formed on the fin, extending along a second direction that is different from the first direction. The first and second metal strip patterns are conformally formed on opposite sidewalls and a top surface of the fin, respectively. A first contact and a second contact are formed on the fin. The first and second metal strip patterns are disposed between the first and second contacts. A first dummy contact is formed on the fin, sandwiched between the first and second metal strip patterns.
    Type: Application
    Filed: May 25, 2015
    Publication date: December 22, 2016
    Inventors: Chang-Tzu WANG, Bo-Shih HUANG
  • Publication number: 20160360310
    Abstract: A piezoelectric ceramic speaker includes a conductive plate and a round piezoelectric ceramic sheet. The conductive plate has notches and sound delivering holes. The round piezoelectric ceramic plate is stacked on a central region of the conductive plate. The notches are opened on a periphery region of the conductive plate and partly extended toward the central region. The notches are equiangularly arranged on the conductive plate with respect to the center of the conductive plate. Accordingly, auxiliary fixtures can pass through the notches to position the conductive plate. Hence, the conductive plate can be positioned by the fixtures during manufacturing processes. Consequently, the piezoelectric ceramic speaker can be mass produced with good yield rates. Additionally, since the round piezoelectric ceramic plate and the conductive plate are coaxially arranged, a dual-band earphone having the piezoelectric ceramic speaker can provide a better sound resolution performance.
    Type: Application
    Filed: August 24, 2015
    Publication date: December 8, 2016
    Inventors: Ying-Shih Huang, To-Teng HUANG
  • Patent number: 9510992
    Abstract: A rehabilitation device with pace pattern projecting function and seat structure and a control method thereof are provided. The rehabilitation device includes a body with a moving module, a projection device, a first sensor and a control system. The projection device projects pace patterns on a walking plane. The first sensor detects a walking situation of a user on the walking plane. Based on the walking situation detected by the first sensor, the control system adjusts a distance between the rehabilitation device and the user by controlling the moving module and adjusts a position of the pace patterns on the walking plane by controlling the projection device. Moreover, a movable seat mechanism is also disposed on the rear of the rehabilitation device. The user can sit down on the movable seat mechanism and towards the front of the rehabilitation device to rest moderately.
    Type: Grant
    Filed: November 28, 2014
    Date of Patent: December 6, 2016
    Assignee: National Taiwan University
    Inventors: Li-Chen Fu, Cheng-Hsien Lin, Chung-Dial Lim, Chia-Ming Wang, Shih-Huang Tseng
  • Publication number: 20160346662
    Abstract: A protective frame of a mask includes: a first frame unit integrally formed as one piece, and including a first protective part for protecting a portion of a face of a user, and a first connecting part integrally connected to the first protective part; and a second frame unit integrally formed as one piece, and including a second protective part for protecting another portion of the face of the user, and a second connecting part integrally connected to the second protective part. The first connecting part is connected to the second connecting part, and the first frame unit and the second frame unit are connected together to constitute the protective frame.
    Type: Application
    Filed: May 27, 2015
    Publication date: December 1, 2016
    Inventor: Shih-Huang HSU
  • Patent number: 9502260
    Abstract: The present invention provides a method for forming a semiconductor structure, including: firstly, providing a substrate, a fin structure being disposed on the substrate, a gate structure crossing over the fin structure, and a first hard mask being disposed on the top surface of the gate structure. Next, a dielectric layer is formed, covering the substrate, the fin structure and the gate structure. Afterwards, a second hard mask is formed on the top surface of the first hard mask, where the width of the second hard mask is larger than the width of the first hard mask, a bottom surface of the second hard mask and a top surface of the first hard mask are on the same level. An etching process is then performed to remove parts of the dielectric and parts of the fin structure.
    Type: Grant
    Filed: January 19, 2015
    Date of Patent: November 22, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shih-An Huang, Kun-Hsien Lee
  • Publication number: 20160323053
    Abstract: An antenna system includes an antenna, a first frequency dividing circuit, a second frequency dividing circuit, and a plurality of matching circuits. The first frequency dividing circuit is coupled to the antenna. The matching circuits are coupled to the first frequency dividing circuit. The second frequency dividing circuit is coupled to the matching circuits. The matching circuits are configured to process different frequency signals, respectively.
    Type: Application
    Filed: November 10, 2015
    Publication date: November 3, 2016
    Inventors: Ting-Wei KANG, Shih-Huang YEH
  • Publication number: 20160316292
    Abstract: The earphone with inverse sound waves includes an earphone housing, a high frequency driver, and a low frequency driver. The earphone housing includes an inner space, a sound output portion, and a reflecting portion. The reflecting portion receives a passive diaphragm. The high frequency driver produces high frequency sound waves and has a sound output direction toward the sound output opening. The low frequency driver is mounted in the inner space of the earphone housing by a mounting brace. The low frequency driver is located between the high frequency driver and the passive diaphragm. A sound transmitting portion is formed between the mounting brace and the earphone housing. The low frequency driver produces low frequency sound waves and has a sound output direction toward the passive diaphragm. The passive diaphragm reflects the low frequency sound waves to the sound output opening via the sound transmitting portion.
    Type: Application
    Filed: July 10, 2015
    Publication date: October 27, 2016
    Inventors: Ying-Shih Huang, To-Teng Huang
  • Patent number: 9449680
    Abstract: A write assist circuit capable of writing data to a memory cell with a bit line and a bit line bar is provided. The write assist circuit includes a clamping circuit, and first and second sense amplifiers. The clamping circuit is coupled to first and second nodes to prevent the voltage of the first and second nodes from being lower than a data-retention voltage. The first and second nodes are supplied with first and second voltage sources. The first and second sense amplifier are utilized to detect the voltage of the bit line or the bit line bar, amplify the voltage and pull down the voltage of one of the first or second node according to the data while the voltage of the other one of the first or second node is kept at a power supply voltage level.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: September 20, 2016
    Assignee: MEDIATEK INC.
    Inventor: Shih-Huang Huang
  • Publication number: 20160246160
    Abstract: An image capturing device and an auto-focus method thereof are provided, where the method includes the following steps. An exposure time is calculated by using an optical sensing element of the first lens. Whether the exposure time exceeds a time threshold is determined. If so, a global maximum search is concurrently performed by the first lens with a first resolution and a first step size as well as by the second lens with a second resolution and a second step size, where the first resolution is higher than the second resolution, and the first step size is less than the second step size. When a focus region in which a focus position is located is obtained by using the second lens, the focus position would be searched out from the focus region by using the first lens so as to obtain a new focus image.
    Type: Application
    Filed: June 12, 2015
    Publication date: August 25, 2016
    Inventors: Shih-Ting Huang, Chao-Shih Huang
  • Patent number: 9417752
    Abstract: A pattern adjusting method of a touch panel and an electronic device are provided. The pattern adjusting method is used for determining a sensor pattern of a plurality of touch sensors on a touch panel and includes the following steps. Panel information of the touch panel is collected. An original layout result of the touch sensors is generated according to the panel information and a predefined sensor information, wherein the predefined sensor information includes an original sensor pattern. A non-covering area of the touch sensors on the touch panel is obtained by analyzing the original layout result. At least one extending area is generated by extending a covering area of the original sensor pattern to the non-covering area in order to obtain a final sensor pattern having at least one extending area.
    Type: Grant
    Filed: November 4, 2014
    Date of Patent: August 16, 2016
    Assignee: Acer Incorporated
    Inventors: Hsing-Lung Chung, Chao-Shih Huang, Jian-Wei Lee
  • Publication number: 20160211881
    Abstract: A wireless communication device is used for performing wireless communication via at least one of a plurality of antennas. The antennas include a first antenna and a second antenna. The first antenna includes at least one first controllable component. The wireless communication device has at least one communication system and a control circuit. The at least one communication system is used to perform the wireless communication via at least one of the plurality of antennas. The control circuit is used to set the at least one first controllable component according to a first setting when the first antenna and the second antenna are active, and set the at least one first controllable component according to a second setting when the first antenna is inactive and the second antenna is active, where the second setting is different from the first setting.
    Type: Application
    Filed: July 24, 2015
    Publication date: July 21, 2016
    Inventors: Ting-Wei Kang, Shih-Huang Yeh
  • Publication number: 20160196868
    Abstract: A write assist circuit capable of writing data to a memory cell with a bit line and a bit line bar is provided. The write assist circuit includes a clamping circuit, and first and second sense amplifiers. The clamping circuit is coupled to first and second nodes to prevent the voltage of the first and second nodes from being lower than a data-retention voltage. The first and second nodes are supplied with first and second voltage sources. The first and second sense amplifier are utilized to detect the voltage of the bit line or the bit line bar, amplify the voltage and pull down the voltage of one of the first or second node according to the data while the voltage of the other one of the first or second node is kept at a power supply voltage level.
    Type: Application
    Filed: April 21, 2015
    Publication date: July 7, 2016
    Inventor: Shih-Huang HUANG
  • Publication number: 20160189970
    Abstract: The present invention provides a method for forming a semiconductor structure, including: firstly, providing a substrate, a fin structure being disposed on the substrate, a gate structure crossing over the fin structure, and a first hard mask being disposed on the top surface of the gate structure. Next, a dielectric layer is formed, covering the substrate, the fin structure and the gate structure. Afterwards, a second hard mask is formed on the top surface of the first hard mask, where the width of the second hard mask is larger than the width of the first hard mask, a bottom surface of the second hard mask and a top surface of the first hard mask are on the same level. An etching process is then performed to remove parts of the dielectric and parts of the fin structure.
    Type: Application
    Filed: January 19, 2015
    Publication date: June 30, 2016
    Inventors: Shih-An Huang, Kun-Hsien Lee