Abstract: A method for inspecting the strips of a touch panel is disclosed. The method includes providing a first signal to a first driven first strip of a plurality of first strips and generating a plurality of continuous first differences according to signals on a plurality of second strips; providing the first signal to the first driven first strip and a second driven first strip of the plurality of first strips and generating a plurality of continuous second differences according to the signals on the plurality of second strips; and determining if there is a broken second strip between the first and second driven first strips based on the continuous first and second differences. Herein, the plurality of first and second strips intersect each other on the touch panel to form a plurality of intersecting regions.

Abstract: A method for forming a metal-oxide-semiconductor (MOS) device includes at least steps of forming a pair of trenches in a substrate at both sides of a gate structure, filling the trenches with a silicon germanium layer by a selective epitaxy growth process, forming a cap layer on the silicon germanium layer by a selective growth process, and forming a pair of source/drain regions by performing an ion implantation process. Hence, the undesirable effects caused by ion implantation can be mitigated.

Abstract: A method for making a semiconductor MOS device is provided. A gate structure is formed on a substrate. A source and a drain are formed in the substrate on both sides of the gate structure. The substrate is then subjected to a pre-amorphization implant (PAI) process. A transitional stress layer is then formed on the substrate. Thereafter, a laser anneal with a first temperature is performed. After the laser anneal, a rapid thermal process is performed with a second temperature that is lower than the first temperature. Subsequently, the transitional stress layer is removed.

Abstract: A composite light-permitting panel structure includes a light-permitting substrate unit, a light-permitting printing unit and a light-permitting protruding unit. The light-permitting substrate unit includes at least one light-permitting body, and the light-permitting body has a top surface and a bottom surface. The light-permitting indicating unit includes a plurality of light-permitting printed indicators formed on the bottom surface of the light-permitting body. The light-permitting protruding unit includes a plurality of light-permitting protruding member members and at least one light-permitting frame member integrally formed on the top surface of the light-permitting body. The light-permitting protruding member members are selectively surrounded by the light-permitting frame. Thus, when the user touches and presses the top surface of the light-permitting body, the design of the light-permitting protruding members and/or the light-permitting frame can generate and provide 3D touch feeling for the user.

Abstract: A method of manufacturing a CMOS device includes providing a substrate having a first region and a second region; forming a first gate structure and a second gate structure, each of the gate structures comprising a sacrificial layer and a hard mask layer; forming a patterned first protecting layer covering the first region and a first spacer on sidewalls of the second gate structure; performing an etching process to form first recesses in the substrate; performing a SEG process to form epitaxial silicon layers in each first recess; forming a patterned second protecting layer covering the second region; and performing a dry etching process with the patterned second protecting layer serving as an etching mask to etch back the patterned first protecting layer to form a second spacer on sidewalls of the first gate structure and to thin down the hard mask layer on the first gate structure.

Abstract: A method of fabricating a MOS transistor is disclosed. The method includes the steps of: providing a semiconductor substrate; forming at least a gate on the semiconductor substrate; forming a protective layer on the semiconductor substrate, and the protective layer covering the surface of the gate; forming at least a recess within the semiconductor substrate adjacent to the gate; forming an epitaxial layer in the recess, wherein the top surface of the epitaxial layer is above the surface of the semiconductor substrate; and forming a spacer on the sidewall of the gate and on a portion of the epitaxial layer, wherein a contact surface of the epitaxial layer and the spacer is above the surface of the semiconductor substrate.

Abstract: An electroluminescent device includes a first electrode layer, a phosphor layer on the first electrode layer, a layer with permanent accumulated charges on the phosphor layer, and a second electrode layer on the layer with permanent accumulated charges. By the addition of the layer with permanent accumulated charges, an external driving voltage applied to the luminescent device can be reduced.

Abstract: A method for making a semiconductor MOS device is provided. A gate structure is formed on a substrate. A source and a drain are formed in the substrate on both sides of the gate structure. The substrate is then subjected to a pre-amorphization implant (PAI) process. A transitional stress layer is then formed on the substrate. Thereafter, a laser anneal with a first temperature is performed. After the laser anneal, a rapid thermal process is performed with a second temperature that is lower than the first temperature. Subsequently, the transitional stress layer is removed.

Abstract: A semiconductor circuit structure includes a substrate and an interconnect structure. The interconnect structure is disposed on the substrate and includes a plurality of circuit patterns and at least one closed loop pattern. The closed loop pattern is in a same layer with the circuit patterns, surrounds between the circuit patterns and is insulated from the circuit patterns. The closed loop pattern can protect the circuit patterns from being damaged by stresses, for improving a mechanical strength of the semiconductor circuit structure.

Abstract: A panel display and a method for manufacturing the same are provided. The panel display includes a frame, an elastic pad, and a display panel. The frame has a supporting tray and a side wall which perpendicularly extends from the end of the supporting tray. A groove is formed on the supporting tray adjacent to the foot of the side wall. One end of the elastic pad is located within the groove while the other end leans on the side wall before the display panel is configured with the frame. When entering the display panel into the frame, the edge of the display panel compels the elastic pad to bend and form a bottom portion and a side portion. The bottom portion is accommodated in the groove while the side portion is compressed by the edge of the display panel and lies on the side wall.

Abstract: A method of fabricating a MOS transistor is disclosed. The method includes the steps of: providing a semiconductor substrate; forming at least a gate on the semiconductor substrate; forming a protective layer on the semiconductor substrate, and the protective layer covering the surface of the gate; forming at least a recess within the semiconductor substrate adjacent to the gate; forming an epitaxial layer in the recess, wherein the top surface of the epitaxial layer is above the surface of the semiconductor substrate; and forming a spacer on the sidewall of the gate and on a portion of the epitaxial layer, wherein a contact surface of the epitaxial layer and the spacer is above the surface of the semiconductor substrate.

Abstract: The present invention provides a method for fabricating a metal oxide semiconductor transistor. First, a semiconductor substrate is provided and at least a gate is formed on the semiconductor substrate. A protective layer is then formed on the semiconductor substrate and the gate. Subsequently, at least a recess is formed in the semiconductor substrate adjacent to the gate, and then an epitaxial layer is formed in the recess. A lightly doped region is formed in the semiconductor substrate adjacent to the gate. Finally, a spacer is formed on the sidewall of the gate.

Abstract: A method for manufacturing CMOS transistors includes an etching back process alternatively performed after the gate structure formation, the lightly doped drain formation, source/drain implantation, or SEG process to etch a hard mask layer covering and protecting a first type gate structure, and to reduce thickness deviation between the hard masks covering the first type gate structure and a second type gate structure. Therefore the damage to spacers, STIs, and the profile of the gate structures due to the thickness deviation is prevented.

Abstract: The present invention provides a method for forming a metal-oxide-semiconductor (MOS) device. The method includes at least the steps of forming a silicon germanium layer by the selective epitaxy growth process and forming a cap layer on the silicon germanium layer by the selective growth process. Hence, the undesirable effects caused by ion implantation can be mitigated.

Abstract: A multi-contact points sensible touch panel has a substrate module, multiple infrared (IR) transmitter and multiple IR receivers to provide IR signal being transmitted along different directions. The first transmission direction is orthogonal to the second transmission direction. The third transmission direction intersects the first transmission direction with a first nonzero oblique angle, and also intersects the second transmission direction with a second nonzero oblique angle. When multiple contact points occur on the touch panel, coordinate of each contact points is correctly determined by sensing a position where the IR signals of different directions intersect together.

Abstract: A method of manufacturing a MOS transistor, in which, a tri-layer photo resist layer is used to form a patterned hard mask layer having a sound shape and a small size, and the patterned hard mask layer is used to form a gate. Thereafter, by forming and defining a cap layer, a recess is formed through etching in the substrate. The patterned hard mask is removed after epitaxial layers are formed in the recesses. Accordingly, a conventional poly bump issue and an STI oxide loss issue leading to contact bridge can be avoided.

Abstract: The present invention provides a method for forming a metal-oxide-semiconductor (MOS) device and the structure thereof. The method includes at least the steps of forming a silicon germanium layer by the first selective epitaxy growth process and forming a cap layer on the silicon germanium layer by the second selective epitaxy growth process. Hence, the undesirable effects caused by ion implantation can be mitigated.

Abstract: A method for manufacturing a metal-oxide semiconductor (MOS) transistor includes providing a substrate having at least a gate structure and a shallow trench isolation (STI) formed thereon, performing a first etching process to form recesses in the substrate respectively at two sides of the gate structure, performing a selective epitaxial growth (SEG) process to form epitaxial silicon layers in the recesses respectively, accordingly a seam is formed in between the epitaxial silicon layer and the STI, forming a dielectric layer in the seam, and performing a self-aligned silicide (salicide) process.

Abstract: A metal-oxide semiconductor (MOS) transistor includes a gate structure positioned in an active area defined in a substrate, a recessed source/drain, and an asymmetric shallow trench isolation (STI) for electrically isolating the active areas. A surface of the asymmetric STI and the substrate is coplanar.

Abstract: An electroluminescent device includes a first electrode layer, a phosphor layer on the first electrode layer, a layer with permanent accumulated charges on the phosphor layer, and a second electrode layer on the layer with permanent accumulated charges. By the addition of the layer with permanent accumulated charges, an external driving voltage applied to the luminescent device can be reduced.