Patents by Inventor Shih-Chung Chen

Shih-Chung Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210134972
    Abstract: Metal gate stacks and integrated methods of forming metal gate stacks are disclosed. Some embodiment comprise MoN as a PMOS work function material. Some embodiments comprise TiSiN as a high-? capping layer. Some embodiments provide improved PMOS bandedge performance. Some embodiments provide improved PMOS bandedge performance with reduced EOT penalty.
    Type: Application
    Filed: November 4, 2020
    Publication date: May 6, 2021
    Inventors: Yixiong Yang, Jacqueline S. Wrench, Srinivas Gandikota, Yongjing Lin, Steven C.H. Hung, Shih Chung Chen, Haoyan Sha, Chi-Chou Lin
  • Publication number: 20210098581
    Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-K dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), titanium oxide (TiO), tantalum oxide (TaO), and titanium aluminum carbide (TiAlC).
    Type: Application
    Filed: September 28, 2020
    Publication date: April 1, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Yongjing Lin, Karla M. Bernal Ramos, Shih Chung Chen, Yixiong Yang, Lin Dong, Steven C.H. Hung, Srinivas Gandikota
  • Publication number: 20210060727
    Abstract: A polishing pad conditioning apparatus includes a base, a fiber, and a polymer protruding from a surface of the base and encompassing the fiber.
    Type: Application
    Filed: July 6, 2020
    Publication date: March 4, 2021
    Inventors: Cheng-Ping Chen, Shih-Chung Chen, Sheng-Tai Peng, Hung-Lin Chen
  • Publication number: 20200411373
    Abstract: Methods of forming semiconductor device with fluorine-incorporated metal nitride films are described. A substrate surface is exposed to a metal fluoride precursor to form a metal-fluorine species on the substrate surface. The substrate surface is exposed to a nitriding agent to react with the metal-fluorine species to form a fluorine-incorporated metal nitride film.
    Type: Application
    Filed: June 28, 2020
    Publication date: December 31, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Yixiong Yang, Srinivas Gandikota, Steven C.H. Hung, Jacqueline S. Wrench, Yongjing Lin, Susmit Singha Roy, Wei V. Tang, Shih Chung Chen
  • Patent number: 10872763
    Abstract: Processing methods may be performed to produce semiconductor structures that may include a high-k dielectric material. The methods may include delivering a nitrogen-containing precursor or an oxygen-containing precursor to a substrate contained in a semiconductor processing chamber. The methods may include forming reactive ligands on an exposed surface of the substrate with the nitrogen-containing precursor or the oxygen-containing precursor. The methods may also include forming a high-k dielectric material overlying the substrate.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: December 22, 2020
    Assignee: Applied Materials, Inc.
    Inventors: David Chu, Steven C. Hung, Malcolm J. Bevan, Charles Chu, Tatsuya E. Sato, Shih-Chung Chen, Patricia M. Liu, Johanes Swenberg
  • Publication number: 20200388621
    Abstract: Memory devices and methods of forming memory devices are described. The memory devices comprise two work-function metal layers, where one work-function layer has a lower work-function than the other work-function layer. The low work-function layer may reduce gate-induced drain leakage current losses. Methods of forming memory devices are also described.
    Type: Application
    Filed: August 25, 2020
    Publication date: December 10, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Sung-Kwan Kang, Gill Yong Lee, Sang Ho Yu, Shih Chung Chen, Jeffrey W. Anthis
  • Publication number: 20200373318
    Abstract: Methods of forming memory structures are discussed. Specifically, methods of forming 3D NAND devices are discussed. Some embodiments form memory structures with a metal nitride barrier layer, an ?-tungsten layer, and a bulk metal material. The barrier layer comprises a TiXN or TaXN material, where X comprises a metal selected from one or more of aluminum (Al), silicon (Si), tungsten (W), lanthanum (La), yttrium (Yt), strontium (Sr), or magnesium (Mg).
    Type: Application
    Filed: May 18, 2020
    Publication date: November 26, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Jacqueline S. Wrench, Yixiong Yang, Yong Wu, Wei V. Tang, Srinivas Gandikota, Yongjing Lin, Karla M. Barnal Ramos, Shih Chung Chen
  • Publication number: 20200373404
    Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-? dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium lanthanum nitride (TiLaN), titanium yttrium nitride (TiYN), titanium strontium nitride (TiSrN), titanium magnesium nitriride (TiMgN, titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), hafnium carbide (HfC), hafnium nitride (HfN), hafnium oxynitride (HfON), hafnium oxycarbide (HfOC), hafnium carbide aluminum (HfCAl), hafnium aluminum nitride (HfAlN), or hafnium carbonitride (HfCN).
    Type: Application
    Filed: May 18, 2020
    Publication date: November 26, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Yongjing Lin, Karla M. Bernal Ramos, Luping Li, Shih Chung Chen, Jacqueline S. Wrench, Yixiong Yang, Steven C.H. Hung, Srinivas Gandikota, Naomi Yoshida, Lin Dong
  • Publication number: 20200350157
    Abstract: Processing methods may be performed to produce semiconductor structures that may include a high-k dielectric material. The methods may include delivering a nitrogen-containing precursor or an oxygen-containing precursor to a substrate contained in a semiconductor processing chamber. The methods may include forming reactive ligands on an exposed surface of the substrate with the nitrogen-containing precursor or the oxygen-containing precursor. The methods may also include forming a high-k dielectric material overlying the substrate.
    Type: Application
    Filed: May 3, 2019
    Publication date: November 5, 2020
    Applicant: Applied Materials, Inc.
    Inventors: David Chu, Steven C. Hung, Malcolm J. Bevan, Charles Chu, Tatsuya E. Sato, Shih-Chung Chen, Patricia M. Liu, Johanes Swenberg
  • Patent number: 10790287
    Abstract: Memory devices and methods of forming memory devices are described. The memory devices comprise two work-function metal layers, where one work-function layer has a lower work-function than the other work-function layer. The low work-function layer may reduce gate-induced drain leakage current losses. Methods of forming memory devices are also described.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: September 29, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Sung-Kwan Kang, Gill Yong Lee, Sang Ho Yu, Shih Chung Chen, Jeffrey W. Anthis
  • Patent number: 10745535
    Abstract: A sponge for oil-water separation, which is prepared by reacting a polyol blend with a polyisocyanate and graphene, in the presence of a catalyst, a foaming agent and a foam stabilizer. The polyol blend includes: a first polyol component having a hydroxyl number of 33 to 60 mg KOH/g and an oxyethylene content of 50 to 80 mol %; a second polyol component having a hydroxyl number of 80 to 300 mg KOH/g and having an oxyethylene content of 50 to 80 mol %; a graft polyol component having a hydroxyl number of 20 to 40 mg KOH/g; a tetrafunctional polyol component having a hydroxyl number of 350 to 650 mg KOH/g; and glycerol.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: August 18, 2020
    Assignee: Chen Chi Hsiang Industry Limited
    Inventors: Yu-Hsiang Liu, Shih-Chung Chen
  • Publication number: 20200176247
    Abstract: Methods and apparatus for forming a semiconductor structure with a scaled effective oxide thickness is disclosed. In embodiments, a method includes depositing amorphous silicon capping layer having a first surface atop a first surface of a titanium nitride (TiN) layer, wherein the titanium nitride layer is atop a first surface of a high-k dielectric layer disposed within a film stack; contacting the first surface of the amorphous silicon capping layer with a nitrogen containing gas; and annealing the film stack.
    Type: Application
    Filed: December 1, 2019
    Publication date: June 4, 2020
    Inventors: LUPING LI, SHIH CHUNG CHEN, KAZUYA DAITO, LIN DONG, ZHEBO CHEN, YIXIONG YANG, STEVEN HUNG
  • Publication number: 20200176451
    Abstract: Memory devices and methods of forming memory devices are described. The memory devices comprise two work-function metal layers, where one work-function layer has a lower work-function than the other work-function layer. The low work-function layer may reduce gate-induced drain leakage current losses. Methods of forming memory devices are also described.
    Type: Application
    Filed: November 29, 2018
    Publication date: June 4, 2020
    Inventors: Sung-Kwan Kang, Gill Yong Lee, Sang Ho Yu, Shih Chung Chen, Jeffrey W. Anthis
  • Publication number: 20200164482
    Abstract: Described herein are multi-layered windows for use in chemical-mechanical planarization (CMP) systems and CMP processes. The multi-layered windows of the present disclosure include a transparent structural layer and a hydrophilic surfactant applied to at least a portion of at least one surface of the transparent structural layer. Such multi-layered windows may be in the polishing pad, the platen, or both.
    Type: Application
    Filed: September 3, 2019
    Publication date: May 28, 2020
    Inventors: Shih-Chung Chen, Yi-Shao Lin, Sheng-Tai Peng, Ya-Jen Sheuh, Hung-Lin Chen, Ren-Dou Lee
  • Publication number: 20200164481
    Abstract: The present disclosure provides a chemical mechanical polishing system having a unitary platen. The platen includes one or more recesses within the platen to house various components for the polishing/planarization process. In one embodiment, the platen includes a first recess and a second recess. The first recess is located under the second recess. An end point detector is placed in the first recess and a detector cover may be placed in the second recess. A sealing mean is provided in a space between the end point detector and the detector cover to prevent any external or foreign materials from coming in contact with the end point detector. A fastener used for fastening the detector cover to the platen also provides addition protection to prevent foreign materials from coming in contact with components received in the recesses.
    Type: Application
    Filed: November 1, 2019
    Publication date: May 28, 2020
    Inventors: Tsung-Lung Lai, Cheng-Ping Chen, Shih-Chung Chen, Sheng-Tai Peng, Rong-Long Hung
  • Patent number: 10665450
    Abstract: Methods and apparatus for forming a semiconductor structure, including depositing a doping stack having a first surface atop a high-k dielectric layer, wherein the doping stack includes at least one first metal layer having a first surface, at least one second metal layer comprising a first aluminum dopant and a first surface, wherein the second metal layer is atop the first surface of the first metal layer, and at least one third metal layer atop the first surface of the second metal layer; depositing an anneal layer atop the first surface of the doping stack; annealing the structure to diffuse at least the first aluminum dopant into the high-k dielectric layer; removing the anneal layer; and depositing at least one work function layer atop the first surface of the doping stack.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: May 26, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Yixiong Yang, Paul F. Ma, Wei V. Tang, Wenyu Zhang, Shih Chung Chen, Chen Han Lin, Chi-Chou Lin, Yi Xu, Yu Lei, Naomi Yoshida, Lin Dong, Siddarth Krishnan
  • Publication number: 20200111885
    Abstract: Methods and apparatus for forming a semiconductor structure such as an NMOS gate electrode are described. Methods may include depositing a first capping layer having a first surface atop a first surface of a high-k dielectric layer; and depositing at least one metal layer having a first surface atop the first surface of the first capping layer, wherein the at least one metal layer includes titanium aluminum silicide material. Some methods include removing an oxide layer from the first surface of the first capping layer by contacting the first capping layer with metal chloride in an amount sufficient to remove an oxide layer. Some methods for depositing a titanium aluminum silicide material are performed by an atomic layer deposition process performed at a temperature of 350 to 400 degrees Celsius.
    Type: Application
    Filed: October 7, 2019
    Publication date: April 9, 2020
    Inventors: YONGJING LIN, SHIH CHUNG CHEN, NAOMI YOSHIDA, LIN DONG, LIQI WU, RONGJUN WANG, STEVEN HUNG, KARLA BERNAL RAMOS, YIXIONG YANG, WEI TANG, SANG-HO YU
  • Patent number: 10608097
    Abstract: Film stacks and methods of forming film stacks including a high-k dielectric layer on a substrate, a high-k capping layer on the high-k dielectric layer, an n-metal layer on the high-k capping layer and an n-metal capping layer on the n-metal layer. The n-metal layer having an aluminum rich interface adjacent the high-k capping layer.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: March 31, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Paul F. Ma, Seshadri Ganguli, Shih Chung Chen, Rajesh Sathiyanarayanan, Atashi Basu, Lin Dong, Naomi Yoshida, Sang Ho Yu, Liqi Wu
  • Publication number: 20200071825
    Abstract: Methods of depositing a metal carbide film by exposing a substrate surface to a halide precursor and an aluminum reactant are described. The halide precursor comprises a compound of general formula (I) MXyRn, wherein M is a metal, X is a halogen selected from Cl, Br, F or I, y is from 1 to 6, R is selected from alkyl, CO, and cyclopentadienyl, and n is from 0 to 6. The aluminum reactant comprises a compound of general formula (II) Al(CH2AR1R2R3)3, wherein A is C, Si, or Ge, each of R1, R2, and R3 is independently alkyl or comprises substantially no ?-hydrogen.
    Type: Application
    Filed: August 26, 2019
    Publication date: March 5, 2020
    Inventors: Lakmal C. Kalutarage, Jeffrey W. Anthis, Mark Saly, David Thompson, Yongjing Lin, Shih Chung Chen
  • Publication number: 20190300672
    Abstract: A sponge for oil-water separation, which is prepared by reacting a polyol blend with a polyisocyanate and graphene, in the presence of a catalyst, a foaming agent and a foam stabilizer. The polyol blend includes: a first polyol component having a hydroxyl number of 33 to 60 mg KOH/g and an oxyethylene content of 50 to 80 mol %; a second polyol component having a hydroxyl number of 80 to 300 mg KOH/g and having an oxyethylene content of 50 to 80 mol %; a graft polyol component having a hydroxyl number of 20 to 40 mg KOH/g; a tetrafunctional polyol component having a hydroxyl number of 350 to 650 mg KOH/g; and glycerol.
    Type: Application
    Filed: July 19, 2018
    Publication date: October 3, 2019
    Inventors: Yu-Hsiang Liu, Shih-Chung Chen