Patents by Inventor Shih-Hao Liu

Shih-Hao Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090284081
    Abstract: A power discharge control system for eliminating residual voltage of electronic components in an electronic device, is proposed, which includes a control IC for outputting first electrical signals of a first level and a second level respectively corresponding to power on and power off of the electronic device; a power supply for receiving the first electrical signal, and providing or terminating operation power to the electronic component accordingly, and delaying outputting of a second electrical signal equivalent to the first electrical signal level; a logic judgment module connected to the control IC and the power supply for receiving the first and the second electrical signals for executing logic operation process, when at least one of the first and the second electrical signals is at the first level, a third electrical signal of a third level is outputted, when both the first and the second electrical signals are at the second level, a third electrical signal of a fourth level is outputted; and at least
    Type: Application
    Filed: July 28, 2008
    Publication date: November 19, 2009
    Applicant: Inventec Corporation
    Inventors: Lan Huang, Shih-Hao Liu
  • Patent number: 7615946
    Abstract: A fan speed control device includes a management selection module, a first and a second buffers, a resistor, a transistor, and a switch. Depending upon whether a motherboard supports a system of a baseboard management control or not, the fan speed control device selectively uses an indicative signal of a serial input and output interface or an indicative signal of the baseboard management control to indicate a power-on status. At the power-on moment, the fan speed control device controls the fan to operate at its minimum speed, so that a system crash due to a power output shortage of a power supply can be avoided. As the system enters stable operation, the fan speed is controlled by a pulse width modulation signal.
    Type: Grant
    Filed: January 17, 2008
    Date of Patent: November 10, 2009
    Assignee: Inventec Corporation
    Inventors: Jie-guang Zhang, Shih-Hao Liu
  • Patent number: 7616039
    Abstract: A memory reset apparatus including a first inverse circuit, a logic circuit, and a plurality of second inverse circuits is provided. The first inverse circuit receives a control signal generated by a north bridge and generates a first signal, in which the control signal controls reset of a plurality of memories. The logic circuit performs a logic operation of the first signal and an indicating signal and generates a second signal, in which the indicating signal indicates each component of a computer system completely powered on. The plurality of second inverse circuits is respectively coupled between the logic circuit and the memories. The second inverse circuits inverse the second signal and respectively generate a plurality of reset signals to the memories, so as to reset the memories.
    Type: Grant
    Filed: January 8, 2008
    Date of Patent: November 10, 2009
    Assignee: Inventec Corporation
    Inventors: Lan Huang, Shih-Hao Liu
  • Publication number: 20090230937
    Abstract: A power factor correction circuit including a boost converter, a first capacitor, a first resistor, and a boost control unit is provided. The boost control unit includes a signal generator and a frequency controller. The boost converter transforms a rectified voltage to a correction voltage according to a pulse width modulation (PWM) signal. The first capacitor and the first resistor are coupled between an input terminal and a ground terminal of the boost converter. The boost control unit is adapted to generate the PWM signal, and adjust a duty cycle and a frequency of the PWM signal according to a current flowing through the first resistance, the rectified voltage and the correction voltage. Wherein, the signal generator is adapted to generate a ramp signal and adjust a slope of the ramp signal according to a charging current. The frequency controller adjusts the charging current according to the rectified voltage.
    Type: Application
    Filed: April 28, 2008
    Publication date: September 17, 2009
    Applicant: INVENTEC CORPORATION
    Inventors: Chun-Hua Xia, Shih-Hao Liu
  • Publication number: 20090234999
    Abstract: An apparatus for resolving conflicts happened between two I2C slave devices with the same addressed address is provided. The apparatus is composed by all cheap electronic devices, so as to achieve a purpose of lowering a cost for design. In addition, in the apparatus for resolving conflicts happened between two I2C slave devices with the same addressed address of the invention, all the I2C slave devices are addressed by an I2C master device to perform the data transmission subsequently before a basic input/output system (BIOS) completes a power-on self-test (POST), but all the I2C slave devices are addressed by a system chip (for example, a baseboard management controller (BMC)) to perform the data transmission subsequently after the BIOS completes the POST. Therefore, the purpose of performing the data transmission for all the I2C slave devices on real time is achieved.
    Type: Application
    Filed: December 9, 2008
    Publication date: September 17, 2009
    Applicant: Inventec Corporation
    Inventors: LI-HONG HUANG, Shih-Hao Liu
  • Publication number: 20090231886
    Abstract: A power supply and a bootstrap circuit thereof are provided. The bootstrap circuit includes a transistor, a first capacitor, a first impedance and a regulator circuit. The collector and the emitter of the transistor respectively serve as the input terminal and the output terminal of the bootstrap circuit. A terminal of the first capacitor is coupled to the collector of the transistor. A terminal of the first impedance is coupled to another terminal of the first capacitor. The regulator circuit is coupled to another terminal of the first impedance and the base of the transistor for clamping the voltage of the above-mentioned base at a predetermined voltage level.
    Type: Application
    Filed: April 11, 2008
    Publication date: September 17, 2009
    Applicant: INVENTEC CORPORATION
    Inventors: Chun-Hua Xia, Shih-Hao Liu
  • Publication number: 20090222609
    Abstract: An apparatus for automatically regulating a system ID of a motherboard of a server and a server having the same are provided. Under a condition that when a rack server is applied to different server systems, the rack server requires different riser cards, while a tower server does not require any riser card, whenever a corresponding riser card or a device card is inserted into the slot of the motherboard of the server, the present invention can automatically regulate a system ID of a motherboard of a server by designing the motherboard of the server compatible with a plurality of server systems as retained at a same status, i.e., retaining the any status configured on the motherboard unchanged.
    Type: Application
    Filed: March 20, 2008
    Publication date: September 3, 2009
    Applicant: INVENTEC CORPORATION
    Inventors: Hai-Yi Ji, Shih-Hao Liu
  • Publication number: 20090172234
    Abstract: An apparatus and a method for identifying a system style are provided. The apparatus includes a motherboard and a peripheral backplane. The motherboard is suitable for assembling other backplanes. The peripheral backplane is coupled to the motherboard not only through a signal-data interface but also through an inter-integrated circuit (I2C) bus or a system management (SM) bus. The method includes following steps. First, an identification information is stored on the peripheral backplane. Next, the motherboard reads the identification information from the peripheral backplane through the I2C bus or the SM bus. The motherboard then identifies the system style according to the identification information and is then configured accordingly. Thereby, the motherboard needs not to be configured manually and can be directly applied in different chassis systems supported by the motherboard.
    Type: Application
    Filed: April 7, 2008
    Publication date: July 2, 2009
    Applicant: INVENTEC CORPORATION
    Inventors: Hai-Yi Ji, Shih-Hao Liu
  • Publication number: 20090161471
    Abstract: A power supply device is provided according to the present invention. The power supply device is applicable to electronic device, which has a non-volatile memory and a power supply circuit that provides power to the non-volatile memory. The power supply device includes: a power consuming unit for providing the non-volatile memory with a power release path; a control unit electrically connected to the power supply circuit, the non-volatile memory, and the power consuming unit, has and having a first connection end, a switching end, and a second connection end for being selectively electrically connected to the first connection end or the second connection end via the switching end.
    Type: Application
    Filed: December 21, 2007
    Publication date: June 25, 2009
    Applicant: Inventec Corporation
    Inventors: Hai-yi Ji, Shih-Hao Liu
  • Publication number: 20090154088
    Abstract: A storage device backplane and an identification circuit for identifying using situations of the storage device backplane are provided. The storage device backplane possesses a first connection interface and a second connection interface, for being used as a first backplane supporting a motherboard, or a second backplane cascaded to the first backplane, or a first backplane supporting a daughterboard of the motherboard. The first and second backplanes possess the same storage device backplane structure. If the storage device backplane is used as the first backplane, a first connection interface of the first backplane is coupled to the motherboard or the daughterboard thereof; if the storage device backplane is used as the second backplane, a first connection interface of the second backplane is coupled to a second connection interface of the first backplane. The identification circuit identifies using situations of the storage device backplane and display corresponding correct indicator number.
    Type: Application
    Filed: February 4, 2008
    Publication date: June 18, 2009
    Applicant: Inventec Corporation
    Inventors: Lan Huang, Shih-Hao Liu
  • Publication number: 20090153112
    Abstract: A linear step-down voltage regulator is provided. The linear step-down voltage regulator is grounded with a ground terminal. The ground terminal is electrically connected to a digital ground terminal of a switching circuit. The linear step-down voltage regulator includes a pass element, a voltage dividing resistor, an error amplifier, a metal oxide semiconductor (MOS) transistor, and a low-pass filter. The employment of the low-pass filter effectively adjusts and restricts the switching noise to pass therethrough, so as to decrease the output of the switching noise and thus eliminating the problems due to the noise.
    Type: Application
    Filed: January 29, 2008
    Publication date: June 18, 2009
    Applicant: INVENTEC CORPORATION
    Inventors: Chun-Hua Xia, Shih-Hao Liu
  • Publication number: 20090146627
    Abstract: A voltage regulating circuit including an error signal generator, a comparator, a switch unit, a low-pass filter and a modulating unit is provided. The error signal generator respectively receives a reference voltage signal and a feedback signal, and generates an error signal. The comparator respectively receives the error signal and a comparing signal, and generates a pulse width modulation signal. The switch unit regulates an input voltage signal to generate an output voltage signal according the pulse width modulation signal. The low-pass filter filters out the high frequency of the output signal and produces the feedback signal. The modulating unit is coupled to the low-pass filter and the error signal generator for regulating a transient voltage of the output voltage signal.
    Type: Application
    Filed: January 17, 2008
    Publication date: June 11, 2009
    Applicant: Inventec Corporation
    Inventors: Chun-Hua Xia, Xiao-Ru Wu, Li Zeng, Da-Wei Hu, Shih-Hao Liu
  • Publication number: 20090134857
    Abstract: The present invention provides an apparatus for adjusting a working frequency of a VRD. The apparatus includes a current detecting circuit, a variable resistance module, and a controller. The current detecting circuit is adapted for determining an output load state of the VRD by detecting a value of a current outputting from the VRD, and outputting a control signal for adjusting the working frequency of the VRD according to the output load state of the VRD. The variable resistance module is coupled to the VRD, and is adapted for providing an external resistor to the VRD. The controller is coupled to the current detecting circuit, and is adapted for receiving the control signal, and adjusting a resistance of the variable resistance module, so as to adjust the working frequency of the VRD.
    Type: Application
    Filed: January 22, 2008
    Publication date: May 28, 2009
    Applicant: INVENTEC CORPORATION
    Inventors: Li Zeng, Shih-Hao Liu
  • Publication number: 20090128220
    Abstract: An isolation circuit is provided. The isolation circuit is coupled between a master circuit and a slave circuit for isolating or conducting an inter integrated circuit (I2C) signal. While the master circuit has electricity and the slave circuit does not, the isolation circuit isolates the master circuit to prevent the I2C signal being transmitted to the slave circuit. While the master circuit and the slave circuit have electricity, the isolation circuit conducts the master circuit to transmit the I2C signal to the slave circuit. The present invention solves the signal isolation problem between the master and slave circuits, and also improves the operational stability of an I2C bus.
    Type: Application
    Filed: December 20, 2007
    Publication date: May 21, 2009
    Applicant: INVENTEC CORPORATION
    Inventors: Ni-li Chen, Shih-Hao Liu
  • Publication number: 20090128222
    Abstract: The invention provides an apparatus for adjusting a working frequency of a VRD by detecting temperature. The apparatus includes a temperature control module, a load module and a controller. The temperature control module is used for detecting a temperature of a CPU, and judging an output load state of the VRD according to the detected temperature of the CPU, so as to output a control signal according the output load state. The load module is connected to the VRD, and is used for providing an external resistance to the VRD. The controller is respectively coupled to the load module and the temperature control module, and is used for receiving the control signal and adjusting a resistance of the load module according to the received control signal, so as to adjust a working frequency of the VRD. A power consumption of the VRD may be reduced based on the present invention.
    Type: Application
    Filed: January 18, 2008
    Publication date: May 21, 2009
    Applicant: INVENTEC CORPORATION
    Inventors: Li Zeng, Shih-Hao Liu
  • Publication number: 20090125731
    Abstract: A core voltage controlling apparatus suitable for a center processing unit (CPU) is provided. The apparatus includes a level shifting unit, a time-delay unit and a logic unit. An input terminal of the level shifting unit receives and shifts a first voltage signal, and an output terminal generates a second voltage signal, in which the first voltage signal indicates a power-on stable state, and the second voltage signal indicates a magnitude of the core voltage. The time-delay unit delays the second voltage signal to generate a third voltage signal. The logic unit is coupled to the time-delay unit for performing a logic operation on the third voltage and a fourth voltage signal transmitted by a power supply, and generating a fifth voltage signal for controlling a core voltage generator whether to provide the core voltage to the CPU or not, in which the fourth voltage signal indicates a power state.
    Type: Application
    Filed: December 19, 2007
    Publication date: May 14, 2009
    Applicant: Inventec Corporation
    Inventors: Lan Huang, Shih-Hao Liu
  • Publication number: 20090119439
    Abstract: A structure compatible with I2C bus and system management (SM) bus is provided. The structure includes a first device having an I2C bus interface, a second device having a SM bus interface, and a timing buffering apparatus connected between the I2C bus interface and the SM bus interface. The timing buffering apparatus provides a time delay when the first device sends data to the second device so as to meet the requirement of the second device to data holding time.
    Type: Application
    Filed: January 16, 2008
    Publication date: May 7, 2009
    Applicant: INVENTEC CORPORATION
    Inventors: Xiao-bing Zou, Shih-Hao Liu
  • Publication number: 20090115470
    Abstract: A memory reset apparatus including a first inverse circuit, a logic circuit, and a plurality of second inverse circuits is provided. The first inverse circuit receives a control signal generated by a north bridge and generates a first signal, in which the control signal controls reset of a plurality of memories. The logic circuit performs a logic operation of the first signal and an indicating signal and generates a second signal, in which the indicating signal indicates each component of a computer system completely powered on. The plurality of second inverse circuits is respectively coupled between the logic circuit and the memories. The second inverse circuits inverse the second signal and respectively generate a plurality of reset signals to the memories, so as to reset the memories.
    Type: Application
    Filed: January 8, 2008
    Publication date: May 7, 2009
    Applicant: INVENTEC CORPORATION
    Inventors: Lan Huang, Shih-Hao Liu
  • Publication number: 20090116823
    Abstract: A fan speed control device includes a management selection module, a first and a second buffers, a resistor, a transistor, and a switch. Depending upon whether a motherboard supports a system of a baseboard management control or not, the fan speed control device selectively uses an indicative signal of a serial input and output interface or an indicative signal of the baseboard management control to indicate a power-on status. At the power-on moment, the fan speed control device controls the fan to operate at its minimum speed, so that a system crash due to a power output shortage of a power supply can be avoided. As the system enters stable operation, the fan speed is controlled by a pulse width modulation signal.
    Type: Application
    Filed: January 17, 2008
    Publication date: May 7, 2009
    Applicant: INVENTEC CORPORATION
    Inventors: Jie-guang Zhang, Shih-Hao Liu
  • Publication number: 20090085539
    Abstract: A feedback and comparison apparatus applicable to a DC-DC voltage converter is provided. The feedback and comparison apparatus includes a comparator and a voltage feedback circuit. The voltage feedback circuit includes a first voltage dividing component and a second voltage dividing component. The comparator compares a feedback voltage with a first reference voltage, and outputs a control signal to the DC-DC voltage converter according to the comparing result. One end of the first voltage dividing component is coupled to an output voltage output by the DC-DC voltage converter and the other end of the first voltage dividing component is coupled to one end of the second voltage dividing component, for providing the feedback voltage. The other end of the second voltage dividing component is coupled to a second reference voltage. The present invention is applicable to a situation that the output voltage is smaller than the reference voltage.
    Type: Application
    Filed: December 20, 2007
    Publication date: April 2, 2009
    Applicant: INVENTEC CORPORATION
    Inventors: Chun-Hua Xia, Shih-Hao Liu