Abstract: A topical formulation comprising (a) a therapeutically effective amount of tofacitinib; (b) at least one solvent; and (c) optionally one or more other pharmaceutically acceptable excipients is provided. Also provided is a method for treating and/or preventing autoimmune diseases in a subject administering said topical formulation.

Abstract: Methods for forming a dielectric isolation region between two active regions are disclosed herein. A mandrel is formed on a substrate, then etched to form a trench. Spacers are formed on the sidewalls of the mandrel. The mandrel is removed, and the substrate is etched to form fins extending in a first direction in the two active regions, and of fins extending in a second direction. A mask is formed that exposes the substrate between the fins extending in the second direction. The substrate is etched to form a trench. The trench is filled with a dielectric material up to the top of the fins to form the dielectric isolation region. The methods provide better depth control during etching between the two active regions, and also permit the trench to extend deeper into the substrate due to reduced depth/width ratios during the etching steps.

Abstract: A ceiling fan infrared detection and control system has a wall-mounted controller, a ceiling fan controller, and a motor. The wall-mounted controller has an infrared sensor that is arranged outwardly and horizontally. The wall-mounted controller is pivotally equipped with a lens outside the infrared sensor for detecting infrared rays of a human body within a detection range. The control unit can output a wireless signal to the ceiling fan controller to control the motor according to the infrared detection result. The ceiling fan infrared detection and control system uses the technical feature that the lens is rotatable relative to the wall-mounted controller, so that the detection range can be moved synchronously along with the lens. The detection range has directivity and the function of adjusting the detection position, which can avoid false detection of a pet below the height of the detection range.

Abstract: A flow meter includes a meter body and a pressure sensor. The meter body has a liquid impact surface, a sensing surface opposite to the liquid impact surface, and a mounting hole extending from the sensing surface toward the liquid impact surface. The mounting hole is a blind hole. The pressure sensor is mounted in the mounting hole, and has a resistance value that can be measured and that can be changed correspondingly with a change in liquid pressure caused by a change in flow rate. A device for producing an active hydroxyl free radical solution is also disclosed.

Abstract: A semiconductor device according to the present disclosure includes a bottom dielectric feature on a substrate, a plurality of channel members directly over the bottom dielectric feature, a gate structure wrapping around each of the plurality of channel members, two first epitaxial features sandwiching the bottom dielectric feature along a first direction, and two second epitaxial features sandwiching the plurality of channel members along the first direction.

Abstract: A semiconductor device includes a semiconductor substrate, an interconnection layer and an inductor pattern. The interconnection layer is disposed on the semiconductor substrate. The inductor pattern is electrically connected to the interconnection layer. The inductor pattern includes a first conductive line joined with a first terminal, a second conductive line joined with a second terminal, and a plurality of conductive coils. The conductive coils are joining the first conductive line to the second conductive line, and includes an outer coil joined with the first conductive line, an inner coil joined with the second conductive line and the outer coil. The second conductive line is spaced apart from a first side of the inner coil in a first direction by distance Y, the second terminal is spaced apart from a second side of the inner coil in a second direction by distance X1, wherein X1>1.25Y.

Abstract: A semiconductor structure includes an epitaxial region having a front side and a backside. The semiconductor structure includes an amorphous layer formed over the backside of the epitaxial region, wherein the amorphous layer includes silicon. The semiconductor structure includes a first silicide layer formed over the amorphous layer. The semiconductor structure includes a first metal contact formed over the first silicide layer.

Abstract: A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.

Abstract: This document describes methods and systems for a hybrid white balance, HWB, mode (114), which is a hybrid of automatic and manual WB modes, in a camera system (104) of an electronic device (102). The HWB mode may provide options for a user to select a WB setting, via a camera user interface (118) in a live-preview mode (110), along a continuous WB-adjustment range. In this way, the user's desired color can be applied with respect to images or video captured by the camera system. The camera UI includes a manual WB control (112) to manually adjust the white balance. A WB module (108) determines target WB gains corresponding to the manual WB control relative to an initial automatic WB decision for a current frame displayed in the live-preview mode of the camera application. In aspects, a look-up-table correlating to the manual WB control is used to compute the target WB gains.

Abstract: A CMOS data clearing circuit is provided. The CMOS data clearing circuit is configured to clear CMOS data of a main board of an electronic device. The electronic device includes a control chip and a pin header. The CMOS data clearing circuit includes a controller and a connection port. The controller generates a pulse signal and an operation signal. The connection port has an input pin and an output pin. The output pin is coupled to a first pin of the pin header. The connection port connects the input pin to the output pin in response to the operation signal, so as to transmit the pulse signal to the first pin of the pin header via the output pin. The control chip clears the CMOS data of the main board according to the pulse signal received by the first pin.

Abstract: A three-dimensional (3D) integrated circuit (IC) is provided. In some embodiments, the 3D IC comprises a first IC die comprising a first substrate, a first interconnect structure disposed over the first substrate, and a first through substrate via (TSV) disposed through the first substrate. The 3D IC further comprises a second IC die comprising a second substrate, a second interconnect structure disposed over the second substrate, and a second TSV disposed through the second substrate. The 3D IC further comprises a bonding structure arranged between back sides of the first IC die and the second IC die opposite to corresponding interconnect structures and bonding the first IC die and the second IC die. The bonding structure comprises conductive features disposed between and electrically connecting the first TSV and the second TSV.

Abstract: A semiconductor device according to the present disclosure includes a bottom dielectric feature on a substrate, a plurality of channel members directly over the bottom dielectric feature, a gate structure wrapping around each of the plurality of channel members, two first epitaxial features sandwiching the bottom dielectric feature along a first direction, and two second epitaxial features sandwiching the plurality of channel members along the first direction.

Abstract: A semiconductor device is provided, which includes a semiconductor stack and a first contact structure. The semiconductor stack includes an active layer and has a first surface and a second surface. The first contact structure is located on the first surface and includes a first semiconductor layer, a first metal element-containing structure and a first p-type or n-type layer. The first metal element-containing structure includes a first metal element. The first p-type or n-type layer physically contacts the first semiconductor layer and the first metal element-containing structure. The first p-type or n-type layer includes an oxygen element (O) and a second metal element and has a thickness less than or equal to 20 nm, and the first semiconductor layer includes a phosphide compound or an arsenide compound.

Abstract: A charging device includes a liquid cooled cable, a charging gun, a charging station, a station connector and a communicating pipe. The liquid cooled cable has a gun end and a station end. The liquid cooled cable includes a first insulating tube, a second insulating tube, a tape, a filler and a sheath. The first insulating tube has a first channel. The second insulating tube has a second channel and a braided copper mesh. The charging gun is connected to the gun end of the liquid cooled cable. The charging gun includes a gun connector and a first liquid return channel. The station connector includes a second liquid return channel and a connection part. One end of the second liquid return channel communicates to the second channel. The connection part is connected to the station end of the liquid cooled cable.

Abstract: In a method of manufacturing a photo mask for lithography, circuit pattern data are acquired. A pattern density, which is a total pattern area per predetermined area, is calculated from the circuit pattern data. Dummy pattern data for areas having pattern density less than a threshold density are generated. Mask drawing data is generated from the circuit pattern data and the dummy pattern data. By using an electron beam from an electron beam lithography apparatus, patterns are drawn according to the mask drawing data on a resist layer formed on a mask blank substrate. The drawn resist layer is developed using a developing solution. Dummy patterns included in the dummy pattern data are not printed as a photo mask pattern when the resist layer is exposed with the electron beam and is developed.

Abstract: The disclosure relates to methods for determining an endometrial status using a sample, for example, an endometrial biopsy, from a woman, comprising: (a) performing an assay on the endometrial sample from the woman to determine a microRNA (miRNA) expression profile of the endometrial sample, wherein the miRNA expression profile comprises expression levels of a plurality of miRNAs, for example, 167 miRNAs having the sequences of SEQ ID NOs:1-167, respectively; and (b) analyzing the miRNA expression profile to obtain a receptivity predictive score using, for example, a computer-based algorithm. Aspects of the disclosure further relate to kits suitable for performing the methods, as well as uses of the kits for diagnostic and therapeutic purposes.

Abstract: The present disclosure provides an optical module. The optical module includes an optical component disposed in or on a carrier and configured to receive a first light. The optical component is further configured to transmit a second light to a first portion of the carrier and transmit a third light to a second portion of the carrier.

Abstract: Video processing methods and apparatuses in a video encoding or decoding system. A method receives input data associated with a current block in a current picture, determines if the current block is an out-of-bounds node, wherein the out-of-bounds node is a coding tree node of the current picture with a block region across a current picture boundary, and determines whether the current block is larger than a predefined size. The method further determines an inferred splitting type if the current block is an out-of-bounds node and the current block is larger than the predefined size and applies the inferred splitting type to split the current block into child blocks if the current block is an out-of-bounds node and the current block is larger than the predefined size, and then adaptively splitting each child block into one or more leaf blocks.

Abstract: A device includes a semiconductor substrate, a fin structure on the semiconductor substrate, a gate structure on the fin structure, and a pair of source/drain features on both sides of the gate structure. The gate structure includes an interfacial layer on the fin structure, a gate dielectric layer on the interfacial layer, and a gate electrode layer of a conductive material on and directly contacting the gate dielectric layer. The gate dielectric layer includes nitrogen element.

Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin on a substrate, a second fin on the substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes an insulating liner and a fill material on the insulating liner. The insulating liner abuts a first sidewall of the first fin and a second sidewall of the second fin. The insulating liner includes a material with a band gap greater than 5 eV.