Patents by Inventor Shih-Ping Hsu
Shih-Ping Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140118951Abstract: A heat-dissipating interposer includes an insulating base, a plurality of conductive pillars and a thermal conducting frame. The insulating base includes a first surface and an opposite second surface. The conductive pillars are arranged on the insulating base. The conductive pillars protrude from the second surface. The height of the conductive pillars relative to the second surface is greater than the thickness of the insulating base. The thermal conducting frame is placed on the second surface and receives a heat-generating component. The interposer can be used in a package on package structure.Type: ApplicationFiled: October 28, 2013Publication date: May 1, 2014Applicant: ZHEN DING TECHNOLOGY CO., LTD.Inventor: SHIH-PING HSU
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Patent number: 8709940Abstract: A circuit board structure and a method for fabricating the same are proposed. The structure includes an insulating protective layer having a plurality of openings in which conductive vias are formed, a patterned circuit layer formed on the surface of the insulating protective layer and electrically connected to the conductive vias in the openings of the insulating protective layer, and a dielectric layer formed on the insulating protective layer and on the surface of the patterned circuit layer, wherein a plurality of openings are formed in the dielectric layer to thereby expose parts of the patterned circuit layer. Accordingly, the present invention reduces the thickness of a circuit board, which reduces package size, improves product performance, and conforms to the developmental trend toward smaller electronic devices.Type: GrantFiled: March 11, 2011Date of Patent: April 29, 2014Assignee: Unimicron Technology Corp.Inventors: Shing-Ru Wang, Hsien-Shou Wang, Shih-Ping Hsu
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Patent number: 8711572Abstract: A circuit board having a semiconductor chip embedded therein includes: a core board having opposing first and second surfaces and a through-hole; a semiconductor chip received in the through-hole and having a first active surface and an opposing second active surface, wherein first electrode pads comprising signal pads, power pads, and ground pads are provided on the first active surface; a first dielectric layer provided on the first surface of the core board and the first active surface of the semiconductor chip and configured to fill a gap between the through-hole and the semiconductor chip so as to secure the semiconductor chip in position to the through-hole; and a first circuit layer disposed in the first dielectric layer so as to be flush with the first dielectric layer, provided with first conductive vias disposed in the first dielectric layer, and electrically connected to the first electrode pads.Type: GrantFiled: July 17, 2012Date of Patent: April 29, 2014Assignee: Unimicron Technology Corp.Inventor: Shih-Ping Hsu
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Publication number: 20140085833Abstract: A chip packaging substrate includes a dielectric layer, a first inner wiring layer embedded in the dielectric layer, an outer wiring layer, and many conductive connection points. The outer wiring layer is formed at one side of the dielectric layer, and is electrically connected to the first inner wiring layer through many first conductive vias in the dielectric layer. The conductive connection points are formed at the other side of the dielectric layer, and are electrically connected to the first inner wiring layer through many second conductive vias in the dielectric layer.Type: ApplicationFiled: September 17, 2013Publication date: March 27, 2014Applicant: ZHEN DING TECHNOLOGY CO., LTD.Inventors: SHIH-PING HSU, E-TUNG CHOU, CHIH-JEN HSIAO
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Publication number: 20140078706Abstract: A packaging substrate includes a supporting sheet, a copper foil, a number of connecting pads, a number of solder balls, a resin layer, a wiring layer and a solder mask layer. The copper foil is attached on a surface of the supporting sheet through an adhesive sheet. The connecting pads are formed on the copper foil. The solder balls are formed on the connecting pads. The resin layer infills the gaps between the solder balls. The wiring layer is formed on the resin layer and the solder balls. Terminal portions of the solder balls facing away from the connecting pads are electrically connected to the wiring layer. The solder mask layer is formed on the wiring layer. The solder mask layer defines a number of openings exposing portions of the wiring layer. The portions of the wiring layer exposed through the openings serve as contact pads.Type: ApplicationFiled: August 21, 2013Publication date: March 20, 2014Applicant: ZHEN DING TECHNOLOGY CO., LTD.Inventors: CHU-CHIN HU, SHIH-PING HSU, E-TUNG CHOU, CHIH-JEN HSIAO
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Publication number: 20140061903Abstract: A method for manufacturing a package on package structure includes the steps of: providing a connection substrate comprising a main body and electrically conductive posts, the main body comprising a first surface and an opposite second surface, each electrically conductive post passing through the first and second surfaces, and each end of the two ends of the electrically conductive post protruding from the main body; arranging a first package device on a side of the first surface of the connection substrate, arranging a package adhesive on a side of the second surface of the connection substrate, thereby obtaining a semi-finished package on package structure; and arranging a second package device on a side of the package adhesive furthest from the first package device, thereby obtaining a package on package structure.Type: ApplicationFiled: February 26, 2013Publication date: March 6, 2014Applicants: Zhen Ding Technology Co., Ltd., HongQiSheng Precision Electronics (QinHuangDao) Co.,Ltd.Inventors: CHIEN-CHIH CHEN, HONG-XIA SHI, SHIH-PING HSU
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Publication number: 20140035138Abstract: A package structure having an embedded semiconductor component, includes: a chip having an active surface with electrode pads and an inactive surface opposite to the active surface; a first insulating protection layer having a chip mounting area for the chip to be mounted thereon via the active surface thereof; a plurality of connection columns disposed in the first insulating protection layer at positions corresponding to the electrode pads and electrically connected to the electrode pads via solder bumps; an encapsulant formed on one surface of the first insulating protection layer having the chip mounted thereon for encapsulating the chip; and a built-up structure formed on the other surface of the first insulating protection layer and the connection columns. Due to the bending resistance of the encapuslant, the warpage of the built-up structure is prevented.Type: ApplicationFiled: October 4, 2013Publication date: February 6, 2014Applicant: UNIMICRON TECHNOLOGY CORPORATIONInventors: Shih-Ping Hsu, I-Ta Tsai
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Publication number: 20140036465Abstract: A packaging substrate includes a copper foil substrate, a sputtering copper layer, a dielectric layer, a plurality of electrically conductive connection points, and an electrically conductive pattern layer. The sputtering copper layer is formed on the copper foil substrate. The electrically conductive connection points are formed on a surface of the sputtering copper layer, which is away from the copper foil substrate. The dielectric layer is sandwiched between the electrically conductive pattern layer and the sputtering copper layer. A plurality of first blind via are formed in the first dielectric layer. The electrically conductive pattern layer includes a plurality of electrically conductive traces and a plurality of connection pads. Each electrically conductive connection point is electrically connected to the electrically conductive trace by the first blind via.Type: ApplicationFiled: April 16, 2013Publication date: February 6, 2014Applicant: Zhen Ding Technology Co., Ltd.Inventors: CHU-CHIN HU, SHIH-PING HSU, E-TUNG CHOU
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Patent number: 8633587Abstract: Disclosed is a package structure including a semiconductor chip disposed in a core board having a first surface and an opposite second surface. The package structure further includes a plurality of first and second electrode pads disposed on an active surface and an opposite inactive surface of the semiconductor chip respectively, the semiconductor chip having a plurality of through-silicon vias for electrically connecting the first and second electrode pads. As a result, the semiconductor chip is electrically connected to the two sides of the package structure via the through-silicon vias instead of conductive through holes, so as to enhance electrical quality and prevent the inactive surface of the semiconductor chip from occupying wiring layout space of the second surface of the core board to thereby increase wiring layout density and enhance electrical performance.Type: GrantFiled: September 23, 2011Date of Patent: January 21, 2014Assignee: Unimicron Technology CorporationInventor: Shih-Ping Hsu
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Publication number: 20140000950Abstract: A method for manufacturing a multi-layer circuit board includes steps of: providing three copper clad laminates; forming trace layers in each copper clad laminate by selectively removing portions of copper layer of each copper clad laminate to obtain three first circuit substrates; laminating a dielectric layer on two of the first circuit substrates to obtain two second circuit substrates; forming a metal bump on the trace layer he other one of the three first circuit substrate to obtain a third circuit substrate; stacking and laminating the third circuit substrate between the two second circuit substrate to obtain a multi-layer circuit board.Type: ApplicationFiled: June 24, 2013Publication date: January 2, 2014Inventors: CHE-WEI HSU, SHIH-PING HSU
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Publication number: 20130341073Abstract: A packaging substrate includes an insulating layer, a wiring layer and a solder mask. The insulating layer and the solder mask being arranged on two opposite sides of the wiring layer. The insulating layer defines a via hole. The wiring layer covers the via hole. The wiring layer includes a pad area. Two sides of the pad area are respectively exposed outside from the solder mask and in the via hole.Type: ApplicationFiled: April 17, 2013Publication date: December 26, 2013Applicant: ZHEN DING TECHNOLOGY CO., LTD.Inventors: CHE-WEI HSU, SHIH-PING HSU
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Patent number: 8610006Abstract: A lid for a micro-electro-mechanical device and a method for fabricating the same are provided. The lid includes a board with opposite first and second surfaces and a first conductor layer. The first surface has a first metal layer thereon. The first metal layer and the board have a recess formed therein. The recess has a bottom surface and a side surface adjacent thereto. The first conductor layer is formed on the first metal layer and the bottom and side surfaces of the recess. The shielding effect of the side surface of the board is enhanced because of the recess integral to the board, the homogeneous bottom and side surfaces of the recess, and the first conductor layer covering the first metal layer, the bottom and side surfaces of the recess.Type: GrantFiled: October 23, 2009Date of Patent: December 17, 2013Assignee: Unimicron Technology CorporationInventors: Shih-Ping Hsu, Kun-Chen Tsai, Micallaef Ivan
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Publication number: 20130318785Abstract: A method for manufacturing an IC substrate includes following steps: providing a roll of double-sided flexible copper clad laminate; converting the roll of double sided flexible copper clad laminate into a roll of double sided flexible wiring board in a roll to roll manner; cutting the roll of double-sided flexible wiring board into a plurality of separate sheets of double sided flexible wiring board; forming first and second rigid insulating layers on the first and second wiring layers of each sheet of double sided flexible wiring board; forming third and fourth wiring layers on the first and second rigid insulating layers, and electrically connecting the first and third wiring layers, and electrically connecting the fourth and second wiring layers, thereby obtaining a sheet of substrate having a plurality of IC substrate units; and cutting the sheet of substrate into separate IC substrate units.Type: ApplicationFiled: May 10, 2013Publication date: December 5, 2013Applicant: ZHEN DING TECHNOLOGY CO., LTD.Inventors: CHE-WEI HSU, SHIH-PING HSU
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Publication number: 20130313002Abstract: A method for manufacturing a multilayer printed circuit board includes the step as follows: providing a glass wiring substrate, the glass wiring substrate comprising a first electrically conductive pattern, a glass base, and a second electrically conductive pattern, the second electrically conductive pattern comprising a plurality of first solder pads; laminating a first lamination substrate onto the glass wiring substrate, the first lamination substrate comprising a first base layer and a first electrically conductive material layer on the first base layer, such that the first base layer is sandwiched between the first electrically conductive pattern and the first electrically conductive material layer; patterning the first electrically conductive material layer to form a third electrically conductive pattern, and electrically connecting the third electrically conductive pattern to the first electrically conductive pattern, and forming a first solder mask on the glass wiring substrate, thereby obtaining a muType: ApplicationFiled: August 1, 2012Publication date: November 28, 2013Applicant: ZHEN DING TECHNOLOGY CO., LTD.Inventor: SHIH-PING HSU
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Patent number: 8580608Abstract: A package structure having an embedded semiconductor component, includes: a chip having an active surface with electrode pads and an inactive surface opposite to the active surface; a first insulating protection layer having a chip mounting area for the chip to be mounted thereon via the active surface thereof; a plurality of connection columns disposed in the first insulating protection layer at positions corresponding to the electrode pads and electrically connected to the electrode pads via solder bumps; an encapsulant formed on one surface of the first insulating protection layer having the chip mounted thereon for encapsulating the chip; and a built-up structure formed on the other surface of the first insulating protection layer and the connection columns. Due to the bending resistance of the encapuslant, the warpage of the built-up structure is prevented.Type: GrantFiled: April 18, 2013Date of Patent: November 12, 2013Assignee: Unimicron Technology CorporationInventors: Shih-Ping Hsu, I-Ta Tsai
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Patent number: 8531021Abstract: A package stack device includes a first package structure having a plurality of first metal posts and a first electronic element disposed on a surface thereof, a second package structure having a plurality of second metal posts and a second electronic element disposed on opposite surfaces thereof, and an encapsulant formed between the first and second package structures for encapsulating the first electronic element. By connecting the first and second metal posts, the second package structure is stacked on the first package structure with the support of the metal posts and the encapsulant filling the gap therebetween so as to prevent warpage of the substrate.Type: GrantFiled: June 15, 2011Date of Patent: September 10, 2013Assignee: Unimicron Technology CorporationInventors: Chu-Chin Hu, Shih-Ping Hsu, Yi-Ju Chen
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Publication number: 20130230947Abstract: A package structure having an embedded semiconductor component, includes: a chip having an active surface with electrode pads and an inactive surface opposite to the active surface; a first insulating protection layer having a chip mounting area for the chip to be mounted thereon via the active surface thereof; a plurality of connection columns disposed in the first insulating protection layer at positions corresponding to the electrode pads and electrically connected to the electrode pads via solder bumps; an encapsulant formed on one surface of the first insulating protection layer having the chip mounted thereon for encapsulating the chip; and a built-up structure formed on the other surface of the first insulating protection layer and the connection columns. Due to the bending resistance of the encapsulant, the warpage of the built-up structure is prevented.Type: ApplicationFiled: April 18, 2013Publication date: September 5, 2013Applicant: UNIMICRON TECHNOLOGY CORPORATIONInventors: Shih-Ping Hsu, I-Ta Tsai
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Patent number: 8436463Abstract: A packaging substrate structure with an electronic component embedded therein and a fabricating method thereof are disclosed. The packaging substrate structure comprises a core plate; a first built-up structure disposed on a surface of the core plate and comprising a first dielectric layer and a first circuit layer disposed on the first dielectric layer; a second built-up structure disposed on the first built-up structure, wherein a cavity is disposed in the second built-up structure to expose the first built-up structure; an electronic component disposed in the cavity, wherein the electronic component has an active surface having a plurality of electrode pads and an inactive surface facing the first built-up structure; and a solder mask disposed on the surfaces of the second built-up structure and the electronic component, and having a plurality of first openings to expose the electrode pads of the electronic component.Type: GrantFiled: August 28, 2008Date of Patent: May 7, 2013Assignee: Unimicron Technology Corp.Inventor: Shih-Ping Hsu
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Patent number: 8399778Abstract: A circuit board structure and a fabrication method thereof are disclosed. The circuit board structure includes a carrying board having a first and an opposite second surface and having at least one through cavity formed therein; a semiconductor chip disposed in the through cavity of the carrying board; an adhesive material filling the gap between the through cavity of the carrying board and the semiconductor chip to fix the semiconductor chip in the through cavity; and a reinforcing layer disposed on the second surface of the carrying board and the inactive surface of the semiconductor chip, thereby increasing the strength of the carrying board as well as the reliability of the circuit board.Type: GrantFiled: March 13, 2008Date of Patent: March 19, 2013Assignee: Unimicron Technology Corp.Inventor: Shih-Ping Hsu
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Publication number: 20120281375Abstract: A circuit board having a semiconductor chip embedded therein includes: a core board having opposing first and second surfaces and a through-hole; a semiconductor chip received in the through-hole and having a first active surface and an opposing second active surface, wherein first electrode pads comprising signal pads, power pads, and ground pads are provided on the first active surface; a first dielectric layer provided on the first surface of the core board and the first active surface of the semiconductor chip and configured to fill a gap between the through-hole and the semiconductor chip so as to secure the semiconductor chip in position to the through-hole; and a first circuit layer disposed in the first dielectric layer so as to be flush with the first dielectric layer, provided with first conductive vias disposed in the first dielectric layer, and electrically connected to the first electrode pads.Type: ApplicationFiled: July 17, 2012Publication date: November 8, 2012Applicant: PHOENIX PRECISION TECHNOLOGY CORPORATIONInventor: Shih-Ping Hsu