Patents by Inventor Shih-Ping Hsu

Shih-Ping Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160163677
    Abstract: A package apparatus includes a first package module, a second package module and multiple conductive elements. The first package module includes a first molding compound layer, a first conductive pillar layer disposed in the first molding compound layer, a first internal component, and a first protection layer. The first internal component electrically connects to the first conductive pillar layer and disposed in the first molding compound layer. The first protection layer is disposed on the first molding compound layer and the first conductive pillar layer. The second package module includes a second molding compound layer, a second conductive pillar layer disposed in the second molding compound layer, and a second internal component. The second internal component electrically connects to the second conductive pillar layer and disposed in the second molding compound layer. The conductive elements are disposed between the first and the second conductive pillar layers.
    Type: Application
    Filed: December 8, 2014
    Publication date: June 9, 2016
    Inventors: CHU-CHIN HU, SHIH-PING HSU, E-TUNG CHOU
  • Publication number: 20160165722
    Abstract: A method of fabricating an interposer substrate is provided, including: providing a carrier having a first wiring layer and a plurality of conductive pillars disposed on the first wiring layer; forming a first insulating layer on the carrier, with the first conductive pillars being exposed from the first insulating layer; forming on the first conductive pillars a second wiring layer that is electrically connected to the first conductive pillars; forming a plurality of second conductive pillars on the second wiring layer; forming on the first insulating layer a second insulating layer that covers the second wiring layer and the second conductive pillars, with terminal surfaces of the second conductive pillars being exposed from the second insulating layer; and removing the carrier. The first conductive pillars have terminal surfaces in geometric shapes, except for a circle. Therefore, the interposer substrate can have a layout on demands, and can be designed at a designer's will.
    Type: Application
    Filed: January 22, 2015
    Publication date: June 9, 2016
    Inventors: Che-Wei Hsu, Shih-Ping Hsu
  • Patent number: 9357647
    Abstract: A packaging substrate includes a supporting sheet, a copper foil, a number of connecting pads, a number of solder balls, a resin layer, a wiring layer and a solder mask layer. The copper foil is attached on a surface of the supporting sheet through an adhesive sheet. The connecting pads are formed on the copper foil. The solder balls are formed on the connecting pads. The resin layer infills the gaps between the solder balls. The wiring layer is formed on the resin layer and the solder balls. Terminal portions of the solder balls facing away from the connecting pads are electrically connected to the wiring layer. The solder mask layer is formed on the wiring layer. The solder mask layer defines a number of openings exposing portions of the wiring layer. The portions of the wiring layer exposed through the openings serve as contact pads.
    Type: Grant
    Filed: August 21, 2013
    Date of Patent: May 31, 2016
    Assignee: Zhen Ding Technology Co., Ltd.
    Inventors: Chu-Chin Hu, Shih-Ping Hsu, E-Tung Chou, Chih-Jen Hsiao
  • Publication number: 20160135295
    Abstract: A multi-layer circuit board includes a plurality of circuit substrates, a plurality of dielectric layers, and a plurality of metal bumps. Each circuit substrate includes two first trace layers and an insulating layer between the two trace layers. Each electric layer is laminated between two neighboring circuit substrates. At latest one metal bump is arranged between each two neighboring circuit substrates. Each metal bump passes through one dielectric layer. Two opposite ends of each metal bump are connected with the trace layer of the circuit substrate to be electrically connected to the two neighbor circuit substrates.
    Type: Application
    Filed: December 31, 2015
    Publication date: May 12, 2016
    Inventors: CHE-WEI HSU, SHIH-PING HSU
  • Publication number: 20160135299
    Abstract: A method of fabricating a package structure is provided, including forming a plurality of openings by removing a portion of the material on one side of a conductive layer, forming an insulating material as an insulating layer in the openings, removing a portion of the material on the other side of the conductive layer to serve as a wiring layer, disposing an electronic component on the wiring layer, and forming an encapsulating layer to cover the electronic component, thereby allowing the single wiring layer to be connected to the electronic component on one side and connected to solder balls on the other side thereof to shorten the signal transmission path. The present invention further provides a package structure thus fabricated.
    Type: Application
    Filed: July 16, 2015
    Publication date: May 12, 2016
    Inventors: Shih-Ping Hsu, Chin-Wen Liu, Tang-I Wu, Shu-Wei Hu
  • Patent number: 9338900
    Abstract: A method of fabricating an interposer substrate is provided, including: providing a carrier having a first wiring layer and a plurality of conductive pillars disposed on the first wiring layer; forming a first insulating layer on the carrier, with the conductive pillars being exposed from the first insulating layer; forming a second wiring layer on the first insulating layer and the conductive pillars; disposing a plurality of external connection pillars on the second wiring layer; forming a second insulating layer on the first insulating layer, with the external connection pillars being exposed from the second insulating layer; forming at least a trench on the second insulating layer; and removing the carrier. Through the formation of the interposer substrate, which does not have a core layer, on the carrier, a via process is omitted. Therefore, the method is simple, and the interposer substrate thus fabricated has a low cost. The present invention further provides the interposer substrate.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: May 10, 2016
    Assignee: Phoenix Pioneer Technology Co., Ltd.
    Inventors: Pao-Hung Chou, Shih-Ping Hsu, Che-Wei Hsu
  • Publication number: 20160118327
    Abstract: This disclosure provides a package substrate, a flip-chip package circuit and their fabrication method. The package substrate includes: a first wiring layer having a first metal wire and a first dielectric material layer filling the remaining part of the first wiring layer except for the first metal wire; a conductive pillar layer formed on the first wiring layer and including a metal pillar connected to the first metal wire, a molding compound layer with a protrusion part surrounding the metal pillar, and a second dielectric material layer formed on the molding compound layer; a second wiring layer formed on the conductive pillar layer and including a second metal wire connected to the metal pillar; and a protection layer formed on the second wiring layer.
    Type: Application
    Filed: October 23, 2014
    Publication date: April 28, 2016
    Inventors: CHE-WEI HSU, SHIH-PING HSU
  • Publication number: 20160104652
    Abstract: A method for fabricating a package structure is provided, which includes the steps of: forming a wiring layer on a carrier by electroplating; disposing at least one electronic component on the wiring layer; forming on the carrier an insulating layer that encapsulates the wiring layer and the electronic component; and removing the carrier. With the single wiring layer having one surface electrically connected the at least one electronic component and the other surface electrically connected to a plurality of conductive elements, the package structure has a signal transmission path that is shortened.
    Type: Application
    Filed: April 13, 2015
    Publication date: April 14, 2016
    Inventors: Shih-Ping Hsu, Chih-Wen Liu, Tang-I Wu, Shu-Wei Hu
  • Publication number: 20160073516
    Abstract: A method of fabricating an interposer substrate is provided, including: providing a carrier having a first wiring layer and a plurality of conductive pillars disposed on the first wiring layer; forming a first insulating layer on the carrier, with the conductive pillars being exposed from the first insulating layer; forming a second wiring layer on the first insulating layer and the conductive pillars; disposing a plurality of external connection pillars on the second wiring layer; forming a second insulating layer on the first insulating layer, with the external connection pillars being exposed from the second insulating layer; forming at least a trench on the second insulating layer; and removing the carrier. Through the formation of the interposer substrate, which does not have a core layer, on the carrier, a via process is omitted. Therefore, the method is simple, and the interposer substrate thus fabricated has a low cost. The present invention further provides the interposer substrate.
    Type: Application
    Filed: November 14, 2014
    Publication date: March 10, 2016
    Inventors: Pao-Hung CHOU, Shih-Ping HSU, Che-Wei HSU
  • Publication number: 20160064317
    Abstract: A method of manufacturing an interposer substrate, including providing a carrier having a first circuit layer formed thereon, forming a plurality of conductive pillars on the first circuit layer, forming a first insulating layer on the carrier, with the conductive pillars being exposed from the first insulating layer, forming on the conductive pillars a second circuit layer that is electrically connected to the conductive pillars, forming a second insulating layer on the second surface of the first insulating layer and the second circuit layer, exposing a portion of a surface of the second circuit layer from the second insulating layer, and removing the carrier. The invention further provides the interposer substrate as described above.
    Type: Application
    Filed: November 19, 2014
    Publication date: March 3, 2016
    Inventors: Che-Wei HSU, Shih-Ping HSU, Chih-Wen LIU
  • Patent number: 9271388
    Abstract: A heat-dissipating interposer includes an insulating base, a plurality of conductive pillars and a thermal conducting frame. The insulating base includes a first surface and an opposite second surface. The conductive pillars are arranged on the insulating base. The conductive pillars protrude from the second surface. The height of the conductive pillars relative to the second surface is greater than the thickness of the insulating base. The thermal conducting frame is placed on the second surface and receives a heat-generating component. The interposer can be used in a package on package structure.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: February 23, 2016
    Assignee: Zhen Ding Technology Co., Ltd.
    Inventor: Shih-Ping Hsu
  • Patent number: 9265146
    Abstract: A method for manufacturing a multi-layer circuit board includes steps of: providing three copper clad laminates; forming trace layers in each copper clad laminate by selectively removing portions of copper layer of each copper clad laminate to obtain three first circuit substrates; laminating a dielectric layer on two of the first circuit substrates to obtain two second circuit substrates; forming a metal bump on the trace layer he other one of the three first circuit substrate to obtain a third circuit substrate; stacking and laminating the third circuit substrate between the two second circuit substrate to obtain a multi-layer circuit board.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: February 16, 2016
    Assignee: Zhen Ding Technology Co., Ltd.
    Inventors: Che-Wei Hsu, Shih-Ping Hsu
  • Publication number: 20160043025
    Abstract: This disclosure provides a package substrate and its fabrication method. The package substrate includes: a carrier; a first wiring layer formed on the carrier; a conductive pillar layer having a plurality of metal pillars on the first wiring layer; a molding compound layer formed on the first wiring layer, covering all the first wiring layer and the metal pillars, and exposing one end face of each metal pillar; a second wiring layer formed on the molding compound layer and the exposed end faces of the metal pillars; and a protection layer formed on the second wiring layer.
    Type: Application
    Filed: August 5, 2014
    Publication date: February 11, 2016
    Inventors: CHIN-YAO HSU, SHIH-PING HSU
  • Patent number: 9232665
    Abstract: A packaging substrate includes: a dielectric layer unit having top and bottom surfaces; a positioning pad embedded in the bottom surface of the dielectric layer unit; at least a passive element having a plurality of electrode pads disposed on upper and lower surfaces thereof, the passive element being embedded in the dielectric layer unit and corresponding to the positioning pad; a first circuit layer disposed on the top surface of the dielectric layer unit, the first circuit layer having first conductive vias electrically connected to the electrode pads disposed on the upper surface of the passive element; and a second circuit layer disposed on the bottom surface of the dielectric layer unit, the second circuit layer having second conductive vias electrically connected to the electrode pads disposed on the lower surface of the passive element. Through the embedding of the passive element, the overall structure may have a reduced height.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: January 5, 2016
    Assignee: Unimicron Technology Corporation
    Inventors: Shih-Ping Hsu, Zhao-Chong Zeng
  • Publication number: 20150382469
    Abstract: A package apparatus comprises a first wiring layer, a first conductive pillar layer, a first molding compound layer, a second wiring layer, and a protection layer. The first wiring layer has a first surface and a second surface that are arranged opposite to each other. The first conductive pillar layer is disposed on the second surface of the first wiring layer, whereas the first conductive pillar layer is a non-circular conductive pillar layer. The first molding compound layer is disposed within a specific portion of the first wiring layer and the first conductive pillar layer. The second wiring layer is disposed on the first molding compound layer and one end of the first conductive pillar layer. The protection layer is disposed on the first molding compound layer and the second wiring layer.
    Type: Application
    Filed: September 22, 2014
    Publication date: December 31, 2015
    Inventors: Chu-Chin HU, Shih-Ping HSU, E-Tung CHOU
  • Publication number: 20150364408
    Abstract: This disclosure provides a package substrate, a flip-chip package circuit, and their fabrication methods. The package substrate includes: a first wiring layer having a first dielectric material layer and a first metal wire protruding from the first dielectric material layer; a conductive pillar layer formed on the first wiring layer and including a molding compound layer, a second dielectric material layer formed on the molding compound layer, and a metal pillar connected to the first metal wire; a second wiring layer formed on the conductive pillar layer and including a second metal wire connected to the metal pillar; and a protection layer formed on the second wiring layer.
    Type: Application
    Filed: October 22, 2014
    Publication date: December 17, 2015
    Inventors: CHE-WEI HSU, SHIH-PING HSU
  • Publication number: 20150366064
    Abstract: A package apparatus comprises a first conductive wiring layer, a first conductive pillar layer, a dielectric material layer, a second conductive wiring layer, a second conductive pillar layer, and a first molding compound layer. The first conductive wiring layer has a first surface and a second surface opposite to the first surface. The first conductive pillar layer is disposed on the first surface of the first conductive wiring layer, wherein the first conductive wiring layer and the first conductive pillar layer are disposed inside the dielectric material layer. The second conductive wiring layer is disposed on the first conductive pillar layer and the dielectric material layer. The second conductive pillar layer is disposed on the second conductive wiring layer, wherein the second conductive wiring layer and the second conductive pillar layer are disposed inside the first molding compound layer.
    Type: Application
    Filed: September 30, 2014
    Publication date: December 17, 2015
    Inventors: CHE-WEI HSU, Shih-Ping Hsu
  • Publication number: 20150364435
    Abstract: A package method comprises the steps of: providing a metal carrier having a first surface and a second surface opposite to the first surface; forming a first wiring layer on the second surface of the metal carrier; forming a first conductive pillar layer on the first wiring layer; forming a dielectric material layer covering the first wiring layer, the first conductive pillar layer and the second surface of the metal carrier; exposing one end of the first conductive pillar layer; forming a second wiring layer on the exposed end of the first conductive pillar layer; forming a solder resist layer on the dielectric material layer and the second wiring layer; removing the metal carrier.
    Type: Application
    Filed: July 17, 2014
    Publication date: December 17, 2015
    Inventors: CHE-WEI HSU, SHIH-PING HSU
  • Patent number: 9214437
    Abstract: A package method comprises the steps of: providing a metal carrier having a first surface and a second surface opposite to the first surface; forming a first wiring layer on the second surface of the metal carrier; forming a first conductive pillar layer on the first wiring layer; forming a dielectric material layer covering the first wiring layer, the first conductive pillar layer and the second surface of the metal carrier; exposing one end of the first conductive pillar layer; forming a second wiring layer on the exposed end of the first conductive pillar layer; forming a solder resist layer on the dielectric material layer and the second wiring layer; removing the metal carrier.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: December 15, 2015
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Che-Wei Hsu, Shih-Ping Hsu
  • Publication number: 20150359096
    Abstract: A method of manufacturing a package structure is provided, including forming a first wiring layer on a carrier board, forming up plurality of first conductors on the first wiring layer, forming a first insulating layer that encapsulates the first wiring layer and the first conductors, forming a second wiring layer on the first insulating layer, forming a plurality of second conductors on the second wiring layer, forming a second insulating layer that encapsulates the second wiring layer and the second conductors, and forming at least an opening on the second insulating layer for at least one electronic component to be disposed therein. Since the first and second insulating layers are formed before the opening, there is no need of stacking or laminating a substrate that already has an opening, and the electronic component will not be laminated and make a displacement. Therefore, the package structure thus manufactured has a high yield rate. The present invention further provides the package structure.
    Type: Application
    Filed: December 3, 2014
    Publication date: December 10, 2015
    Inventors: Shih-Ping HSU, Chao-Chung TSENG