Patents by Inventor Shih-Ping Hsu

Shih-Ping Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9589935
    Abstract: A package apparatus includes a first package module, a second package module and multiple conductive elements. The first package module includes a first molding compound layer, a first conductive pillar layer disposed in the first molding compound layer, a first internal component, and a first protection layer. The first internal component electrically connects to the first conductive pillar layer and disposed in the first molding compound layer. The first protection layer is disposed on the first molding compound layer and the first conductive pillar layer. The second package module includes a second molding compound layer, a second conductive pillar layer disposed in the second molding compound layer, and a second internal component. The second internal component electrically connects to the second conductive pillar layer and disposed in the second molding compound layer. The conductive elements are disposed between the first and the second conductive pillar layers.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: March 7, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Chu-Chin Hu, Shih-Ping Hsu, E-Tung Chou
  • Patent number: 9583436
    Abstract: A package apparatus comprises a first conductive wiring layer, a first conductive pillar layer, a first conductive glue layer, an internal component, a second conductive pillar layer, a first molding compound layer and a second conductive wiring layer. The first conductive pillar layer is disposed on the first conductive wiring layer. The first conductive glue layer is disposed on the first conductive wiring layer. The internal component has a first electrode layer and a second electrode layer, wherein the first electrode layer is disposed and electrical connected to the first conductive glue layer. The second conductive pillar layer is disposed on the second electrode layer. Wherein the first conductive wiring layer, the first conductive pillar layer, the first conductive glue layer, the internal component and the second conductive pillar layer are disposed inside the first molding compound layer.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: February 28, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Chao-Tsung Tseng, Shih-Ping Hsu, Chin-Ming Liu, Che-Wei Hsu
  • Publication number: 20170047278
    Abstract: This disclosure provides a package substrate and its fabrication method. The package substrate comprises: a first dielectric material layer have an opening; a first conductive unit including a first part in the opening of the first dielectric material layer and a second part on the first dielectric material layer; and a second dielectric material layer covering the first conductive unit and the first dielectric material layer; wherein a height of the first conductive unit is larger than a thickness of the first dielectric material layer; wherein a cross-section of the second part is larger than that of the first part in the first conductive unit.
    Type: Application
    Filed: August 3, 2016
    Publication date: February 16, 2017
    Inventors: CHUN-HSIEN YU, Shih-Ping Hsu, Pao-Hung Chou, Chi-Feng Peng
  • Publication number: 20170034908
    Abstract: A packaging substrate includes a first dielectric layer, a first wiring layer, a first conductive pillar layer, a second dielectric layer, a second wiring layer, an electrical pad layer, and a third dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface, plural openings, and a wall surface that faces at least one of the openings. The first wiring layer is located on the first surface and the wall surface. A portion of the first wiring layer on an edge of the wall surface adjacent to the second surface extends in a direction away from the wall surface. The first conductive pillar layer is located on a portion of the first wiring layer. The second dielectric layer is located on the first surface, the first wiring layer, and in the openings.
    Type: Application
    Filed: January 20, 2016
    Publication date: February 2, 2017
    Inventors: Che-Wei Hsu, Shih-Ping Hsu, Pao-Hung Chou
  • Publication number: 20170019995
    Abstract: A substrate structure and a manufacturing method thereof are provided. The substrate structure comprises a dielectric material layer, a conductive wiring layer, a metal core layer, and a conductive pillar layer. The conductive wiring layer is disposed on a surface of the dielectric material layer. The metal core layer having a metal part is disposed inside the dielectric material layer. The conductive pillar layer is disposed inside the dielectric material layer and between the metal core layer and the conductive wiring layer. The metal part has a first side and a second side opposite the first side. One of the first side and the second side is electrically connected to the conductive pillar layer. A width of the first side is different from a width of the second side.
    Type: Application
    Filed: July 11, 2016
    Publication date: January 19, 2017
    Inventors: Shih-Ping Hsu, Che-Wei Hsu, Chin-Ming Liu, Chih-Kuai Yang
  • Patent number: 9548234
    Abstract: This disclosure provides a package substrate, a flip-chip package circuit and their fabrication method. The package substrate includes: a first wiring layer having a first metal wire and a first dielectric material layer filling the remaining part of the first wiring layer except for the first metal wire; a conductive pillar layer formed on the first wiring layer and including a metal pillar connected to the first metal wire, a molding compound layer with a protrusion part surrounding the metal pillar, and a second dielectric material layer formed on the molding compound layer; a second wiring layer formed on the conductive pillar layer and including a second metal wire connected to the metal pillar; and a protection layer formed on the second wiring layer.
    Type: Grant
    Filed: October 23, 2014
    Date of Patent: January 17, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Che-Wei Hsu, Shih-Ping Hsu
  • Patent number: 9536864
    Abstract: This disclosure provides a package structure and its fabrication method. The package structure includes: a protective insulation layer; a wiring layer including at least one metal wire and disposed on the protective insulation layer; and a first package unit disposed on the wiring layer and including a plurality of metal pillars, a first integrated-circuit chip and a first molding compound layer; wherein the plural metal pillars are located in a pillar region and electrically connected to the at least one metal wire, the first integrated-circuit chip is located in a device region and electrically connected to the at least one metal wire, and the first molding compound layer filling up the remaining part of the first package unit.
    Type: Grant
    Filed: July 29, 2014
    Date of Patent: January 3, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventor: Shih-Ping Hsu
  • Patent number: 9484224
    Abstract: A circuit board structure and a fabrication method thereof are disclosed. The circuit board structure includes a carrying board having a first and an opposite second surface and having at least one through cavity formed therein; a semiconductor chip disposed in the through cavity of the carrying board; an adhesive material filling the gap between the through cavity of the carrying board and the semiconductor chip to fix the semiconductor chip in the through cavity; and a reinforcing layer disposed on the second surface of the carrying board and the inactive surface of the semiconductor chip, thereby increasing the strength of the carrying board as well as the reliability of the circuit board.
    Type: Grant
    Filed: February 11, 2013
    Date of Patent: November 1, 2016
    Assignee: Unimicron Technology Corp.
    Inventor: Shih-Ping Hsu
  • Publication number: 20160268326
    Abstract: A substrate structure is provided, including a first insulating layer, a first circuit layer embedded in and bonded to the first insulating layer; a plurality of first conductive posts formed in the first insulating layer and electrically connected to the first circuit layer, a second circuit layer formed on the first insulating layer and electrically connected to the first circuit layer through the first conductive posts, a plurality of second conductive posts and a plurality of conductive bumps formed on the second circuit layer, and a second insulating layer formed on the first insulating layer and encapsulating the second circuit layer, the second conductive posts and the conductive bumps. The second insulating layer has a cavity exposing the conductive bumps. When the substrate structure is applied to a camera lens, a sensor element can be disposed in the cavity to reduce the thickness of the overall packaging module.
    Type: Application
    Filed: March 7, 2016
    Publication date: September 15, 2016
    Inventors: Chun-Hsien Yu, Chu-Chin Hu, Shih-Ping Hsu
  • Publication number: 20160260655
    Abstract: This disclosure provides a package substrate, a package structure including the same and their fabrication methods. The package substrate comprises: a first wiring layer having a first metal wire and a first dielectric material layer surrounding the first metal wire; a conductive pillar layer formed on the first wiring layer and including a first metal pillar connected to the first metal wire and a molding compound layer surrounding the first metal pillar; a flexible material layer formed on the conductive pillar layer and including a first opening formed on the first metal pillar and exposing the first metal pillar; and a second wiring layer formed on the conductive pillar layer and including a second metal wire connected to the first metal pillar through the first opening, a second metal pillar formed on the second metal wire, and a protective layer surrounding the second metal wire and the second metal pillar.
    Type: Application
    Filed: February 26, 2016
    Publication date: September 8, 2016
    Inventors: CHUN-HSIEN YU, SHIH-PING HSU
  • Publication number: 20160240514
    Abstract: This disclosure provides a package structure and its fabrication method. The package structure includes: a protective insulation layer; a wiring layer including at least one metal wire and disposed on the protective insulation layer; and a first package unit disposed on the wiring layer and including a plurality of metal pillars, a first integrated-circuit chip and a first molding compound layer; wherein the plural metal pillars are located in a pillar region and electrically connected to the at least one metal wire, the first integrated-circuit chip is located in a device region and electrically connected to the at least one metal wire, and the first molding compound layer filling up the remaining part of the first package unit.
    Type: Application
    Filed: April 25, 2016
    Publication date: August 18, 2016
    Inventor: SHIH-PING HSU
  • Publication number: 20160212852
    Abstract: An electronic package is provided, which includes: an insulating layer; an electronic element embedded in the insulating layer and having a sensing area exposed from the insulating layer; and a circuit layer formed on the insulating layer and electrically connected to the electronic element, thereby reducing the thickness of the overall package structure.
    Type: Application
    Filed: January 8, 2016
    Publication date: July 21, 2016
    Inventors: Chu-Chin Hu, Shih-Ping Hsu
  • Publication number: 20160212851
    Abstract: An electronic package is provided, which includes: an insulator; an electronic element embedded in the insulator and having a sensing area exposed from the insulator; and a conductive structure disposed on the insulator and electrically connected to the electronic element, thereby reducing the thickness of the overall structure.
    Type: Application
    Filed: January 8, 2016
    Publication date: July 21, 2016
    Inventors: Chu-Chin Hu, Shih-Ping Hsu
  • Publication number: 20160211204
    Abstract: An electronic package is provided. The electronic package includes an insulator having a recessed portion formed therein; an electronic element embedded in the recessed portion and having a sensing region exposed from the insulator; and a conductive structure disposed on the insulator and electrically connected with the electronic element. The overall thickness of the electronic package is reduced by embedding the electronic element which is embedded in the recessed portion.
    Type: Application
    Filed: January 8, 2016
    Publication date: July 21, 2016
    Inventors: Chu-Chin Hu, Shih-Ping Hsu
  • Publication number: 20160190059
    Abstract: A package apparatus comprises a first conductive wiring layer, a first conductive pillar layer, a first conductive glue layer, an internal component, a second conductive pillar layer, a first molding compound layer and a second conductive wiring layer. The first conductive pillar layer is disposed on the first conductive wiring layer. The first conductive glue layer is disposed on the first conductive wiring layer. The internal component has a first electrode layer and a second electrode layer, wherein the first electrode layer is disposed and electrical connected to the first conductive glue layer. The second conductive pillar layer is disposed on the second electrode layer. Wherein the first conductive wiring layer, the first conductive pillar layer, the first conductive glue layer, the internal component and the second conductive pillar layer are disposed inside the first molding compound layer.
    Type: Application
    Filed: May 29, 2015
    Publication date: June 30, 2016
    Inventors: CHAO-TSUNG TSENG, Shih-Ping Hsu, Chin-Ming Liu, Che-Wei Hsu
  • Publication number: 20160181193
    Abstract: A package structure and a method of fabricating the same are provided. The method includes forming a first wiring layer on a carrier board, forming a plurality of first conductors on the first wiring layer, encapsulating the first wiring layer and the first conductors with a first insulating layer, forming a second wiring layer on the first insulating layer, forming a plurality of second conductors on the second wiring layer, encapsulating the second wiring layer and the second conductors with a second insulating layer, and forming at least one opening in the second insulating layer. The at least one opening extends to a second surface of the first insulating layer, such that at least one electronic component can be disposed in the at least one opening. With forming two insulating layers first followed by forming the at least one opening, there is no need to stack or laminate the substrate that already has an opening, and the electronic component is free of displacement due to any compression.
    Type: Application
    Filed: December 9, 2015
    Publication date: June 23, 2016
    Inventors: Shih-Ping Hsu, Chao-Chung Tseng
  • Patent number: 9370105
    Abstract: A package apparatus comprises a first conductive wiring layer, a first conductive pillar layer, a dielectric material layer, a second conductive wiring layer, a second conductive pillar layer, and a first molding compound layer. The first conductive wiring layer has a first surface and a second surface opposite to the first surface. The first conductive pillar layer is disposed on the first surface of the first conductive wiring layer, wherein the first conductive wiring layer and the first conductive pillar layer are disposed inside the dielectric material layer. The second conductive wiring layer is disposed on the first conductive pillar layer and the dielectric material layer. The second conductive pillar layer is disposed on the second conductive wiring layer, wherein the second conductive wiring layer and the second conductive pillar layer are disposed inside the first molding compound layer.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: June 14, 2016
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Che-Wei Hsu, Shih-Ping Hsu
  • Publication number: 20160163626
    Abstract: The invention provides an interposer substrate and a method of fabricating the same. The method includes: etching a carrier to form a recessed groove thereon; filling a dielectric material in the recessed groove to form a first dielectric material layer, or forming a patterned first dielectric material layer on the carrier; forming a first wiring layer, a first conductive block and a second dielectric material layer on the carrier and the first dielectric material layer sequentially, with the first wiring layer and the first conductive block embedded in the second dielectric material layer; and forming a second wiring layer and a second conductive block on the second dielectric material layer. A coreless interposer substrate having fine pitches is thus fabricated.
    Type: Application
    Filed: May 7, 2015
    Publication date: June 9, 2016
    Inventors: Pao-Hung Chou, Shih-Ping Hsu
  • Publication number: 20160163629
    Abstract: A method of fabricating a package structure is provided, including forming a plurality of conductive pillars on a conductive layer, forming an insulating layer on the conductive layer and the conductive pillars, removing a portion of the conductive layer to allow the remaining portion of the conductive layer to serve as a wiring layer, disposing at least one electronic component on the wiring layer, and forming on the wiring layer and insulation layer an encapsulating layer to encapsulate the electronic component. Therefore, as there is already a wiring layer the wiring layer is capable of being integrated with the electronic component for allowing the conductive pillars to be bonded with solder balls to thereby shorten the signal transmission path. The present invention further provides a package structure thus fabricated.
    Type: Application
    Filed: July 16, 2015
    Publication date: June 9, 2016
    Inventors: Shih-Ping Hsu, Tang-I Wu
  • Publication number: 20160163627
    Abstract: An interposer substrate includes a first insulating layer having opposite first and second surfaces; a first wiring layer formed in the first insulating layer, with a surface of the first wiring layer exposed from the first surface; first conductive pillars formed in the first insulating layer; a second wiring layer formed on the second surface; second conductive pillars formed on the second wiring layer; a second insulating layer formed on the second surface and covering the second conductive pillars and the second wiring layer, with end surfaces of the second conductive pillars exposed from the second insulating layer; and immersion tin layers formed on the first wiring layer and the end surfaces of second conductive pillars. The immersion tin layers are used as surface processing layers to be applied to products having ball pads that need to be exposed extensively. A method for fabricating the interposer substrate is also provided.
    Type: Application
    Filed: December 3, 2015
    Publication date: June 9, 2016
    Inventors: Che-Wei Hsu, Shih-Ping Hsu