Patents by Inventor Shih-Ping Hsu

Shih-Ping Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9741646
    Abstract: This disclosure provides a package substrate and its fabrication method. The package substrate includes: a carrier; a first wiring layer formed on the carrier; a conductive pillar layer having a plurality of metal pillars on the first wiring layer; a molding compound layer formed on the first wiring layer, covering all the first wiring layer and the metal pillars, and exposing one end face of each metal pillar; a second wiring layer formed on the molding compound layer and the exposed end faces of the metal pillars; and a protection layer formed on the second wiring layer.
    Type: Grant
    Filed: August 5, 2014
    Date of Patent: August 22, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Chin-Yao Hsu, Shih-Ping Hsu
  • Patent number: 9730328
    Abstract: A printed circuit board with embedded component includes a double-sided printed circuit board, an electronic component, a plurality of conductive paste blocks, an insulating layer and a wiring layer near the first wiring layer, an insulating layer and a wiring layer near the second wiring layer. The double-sided printed circuit board comprising a first wiring layer, a base, and a second wiring layer. The first wiring layer and the second wiring layer are arranged on opposite sides of the base. The second wiring layer includes a plurality of electrical contact pads. The base defines a number of conductive vias. Each electrical contact pad is aligned with and electrically connected to one corresponding conductive via. The conductive paste blocks are electrically connecting to the conductive vias. The electronic component is electrically connected to the conductive paste blocks. The two insulating layers cover the electronic component and the second wiring layer.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: August 8, 2017
    Assignees: Qi Ding Technology Qinhuangdao Co., Ltd., Zhen Ding Technology Co., Ltd.
    Inventor: Shih-Ping Hsu
  • Publication number: 20170207173
    Abstract: This disclosure provides a package substrate which includes: a first conductive layer having a first conductive area and a second conductive area; a package unit layer disposed on the first conductive layer and including a first circuit device having a first terminal connected to the first conductive area and a second terminal connected to the second conductive area, a first conductive pillar connected to the first conductive area, and an encapsulant material; and a second conductive layer disposed on the package unit layer and having a first metal wire connected to the first conductive pillar.
    Type: Application
    Filed: December 21, 2016
    Publication date: July 20, 2017
    Inventors: SHIH-PING HSU, Chih-Kuai Yang
  • Patent number: 9711445
    Abstract: This disclosure provides a package substrate, a package structure including the same and their fabrication methods. The package substrate comprises: a first wiring layer having a first metal wire and a first dielectric material layer surrounding the first metal wire; a conductive pillar layer formed on the first wiring layer and including a first metal pillar connected to the first metal wire and a molding compound layer surrounding the first metal pillar; a flexible material layer formed on the conductive pillar layer and including a first opening formed on the first metal pillar and exposing the first metal pillar; and a second wiring layer formed on the conductive pillar layer and including a second metal wire connected to the first metal pillar through the first opening, a second metal pillar formed on the second metal wire, and a protective layer surrounding the second metal wire and the second metal pillar.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: July 18, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Chun-Hsien Yu, Shih-Ping Hsu
  • Publication number: 20170198406
    Abstract: This disclosure provides a package substrate fabrication method including: providing a carrier; forming a first dielectric layer on the carrier while enabling the first dielectric layer to be patterned including an opening; forming a first conducting unit on the carrier while enabling the first conducting unit to fill up the opening, a height of the first conducting unit at the opening larger than a thickness of the first dielectric layer, and a width of the first conducting unit larger than a width of the opening; forming a second dielectric layer on the first conducting unit; forming a second conducting unit on the second dielectric layer; forming a third dielectric layer on the second conducting unit; removing the carrier and the first dielectric layer while enabling the part of the first conducting unit in the opening to be removed; and forming a fourth dielectric layer to cover the first conducting unit.
    Type: Application
    Filed: December 8, 2016
    Publication date: July 13, 2017
    Inventors: CHUN-HSIEN YU, SHIH-PING HSU, PAO-HUNG CHOU
  • Publication number: 20170194262
    Abstract: This disclosure provides a package substrate and its fabrication method. The package substrate comprises: a first wiring layer including at least one first metal wire; a conductive connecting unit including a first connecting unit and a second connecting unit on the first wiring layer; a circuit chip having at least one connection terminal and disposed on the first connecting unit; a molding compound layer covering the wiring layer, the conductive connecting unit and the circuit chip; and a second wiring layer including at least one second metal wire and connected to the second connecting unit; wherein the first connecting unit is configured for connecting one of the at least one connection terminal with one of the at least one first metal wire.
    Type: Application
    Filed: December 28, 2016
    Publication date: July 6, 2017
    Inventors: CHU-CHIN HU, Shih-Ping Hsu, Chin-Ming Liu
  • Publication number: 20170162492
    Abstract: The present invention discloses an IC Carrier of a semiconductor package and its manufacturing method. The IC Carrier of the semiconductor package includes a dielectric layer and a patterned conductor layer. The dielectric layer has at least one opening groove. The patterned conductor layer is embedded in the dielectric layer, wherein a part of the patterned conductor layer is as a conductive pillar, which has two exposed ends, and a part of the patterned conductor layer is as a conductive wire, which only has one exposed end.
    Type: Application
    Filed: July 11, 2016
    Publication date: June 8, 2017
    Inventors: Shih-Ping Hsu, Chao-Tsung Tseng
  • Patent number: 9613894
    Abstract: An electronic package is provided. The electronic package includes an insulator having a recessed portion formed therein; an electronic element embedded in the recessed portion and having a sensing region exposed from the insulator; and a conductive structure disposed on the insulator and electrically connected with the electronic element. The overall thickness of the electronic package is reduced by embedding the electronic element which is embedded in the recessed portion.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: April 4, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Chu-Chin Hu, Shih-Ping Hsu
  • Patent number: 9601402
    Abstract: A package apparatus comprises a first wiring layer, a metal layer, a conductive pillar layer, a passive component, a first molding compound layer, a second wiring layer, and a protection layer. The first wiring layer has a first surface and a second surface opposite to each other. The metal layer is disposed on the first surface of the first wiring layer. The conductive pillar layer is disposed on the second surface of the first wiring layer. The passive component is disposed on the second surface of the first wiring layer. The first molding compound layer is disposed within a part of the zone of the first wiring layer and the conductive pillar layer. The second wiring layer is disposed on the first molding compound layer and one end of the conductive pillar layer. The protection layer is disposed on the first molding compound layer and the second wiring layer.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: March 21, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: E-Tung Chou, Chu-Chin Hu, Shih-Ping Hsu
  • Patent number: 9589935
    Abstract: A package apparatus includes a first package module, a second package module and multiple conductive elements. The first package module includes a first molding compound layer, a first conductive pillar layer disposed in the first molding compound layer, a first internal component, and a first protection layer. The first internal component electrically connects to the first conductive pillar layer and disposed in the first molding compound layer. The first protection layer is disposed on the first molding compound layer and the first conductive pillar layer. The second package module includes a second molding compound layer, a second conductive pillar layer disposed in the second molding compound layer, and a second internal component. The second internal component electrically connects to the second conductive pillar layer and disposed in the second molding compound layer. The conductive elements are disposed between the first and the second conductive pillar layers.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: March 7, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Chu-Chin Hu, Shih-Ping Hsu, E-Tung Chou
  • Patent number: 9583436
    Abstract: A package apparatus comprises a first conductive wiring layer, a first conductive pillar layer, a first conductive glue layer, an internal component, a second conductive pillar layer, a first molding compound layer and a second conductive wiring layer. The first conductive pillar layer is disposed on the first conductive wiring layer. The first conductive glue layer is disposed on the first conductive wiring layer. The internal component has a first electrode layer and a second electrode layer, wherein the first electrode layer is disposed and electrical connected to the first conductive glue layer. The second conductive pillar layer is disposed on the second electrode layer. Wherein the first conductive wiring layer, the first conductive pillar layer, the first conductive glue layer, the internal component and the second conductive pillar layer are disposed inside the first molding compound layer.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: February 28, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Chao-Tsung Tseng, Shih-Ping Hsu, Chin-Ming Liu, Che-Wei Hsu
  • Publication number: 20170047278
    Abstract: This disclosure provides a package substrate and its fabrication method. The package substrate comprises: a first dielectric material layer have an opening; a first conductive unit including a first part in the opening of the first dielectric material layer and a second part on the first dielectric material layer; and a second dielectric material layer covering the first conductive unit and the first dielectric material layer; wherein a height of the first conductive unit is larger than a thickness of the first dielectric material layer; wherein a cross-section of the second part is larger than that of the first part in the first conductive unit.
    Type: Application
    Filed: August 3, 2016
    Publication date: February 16, 2017
    Inventors: CHUN-HSIEN YU, Shih-Ping Hsu, Pao-Hung Chou, Chi-Feng Peng
  • Publication number: 20170034908
    Abstract: A packaging substrate includes a first dielectric layer, a first wiring layer, a first conductive pillar layer, a second dielectric layer, a second wiring layer, an electrical pad layer, and a third dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface, plural openings, and a wall surface that faces at least one of the openings. The first wiring layer is located on the first surface and the wall surface. A portion of the first wiring layer on an edge of the wall surface adjacent to the second surface extends in a direction away from the wall surface. The first conductive pillar layer is located on a portion of the first wiring layer. The second dielectric layer is located on the first surface, the first wiring layer, and in the openings.
    Type: Application
    Filed: January 20, 2016
    Publication date: February 2, 2017
    Inventors: Che-Wei Hsu, Shih-Ping Hsu, Pao-Hung Chou
  • Publication number: 20170019995
    Abstract: A substrate structure and a manufacturing method thereof are provided. The substrate structure comprises a dielectric material layer, a conductive wiring layer, a metal core layer, and a conductive pillar layer. The conductive wiring layer is disposed on a surface of the dielectric material layer. The metal core layer having a metal part is disposed inside the dielectric material layer. The conductive pillar layer is disposed inside the dielectric material layer and between the metal core layer and the conductive wiring layer. The metal part has a first side and a second side opposite the first side. One of the first side and the second side is electrically connected to the conductive pillar layer. A width of the first side is different from a width of the second side.
    Type: Application
    Filed: July 11, 2016
    Publication date: January 19, 2017
    Inventors: Shih-Ping Hsu, Che-Wei Hsu, Chin-Ming Liu, Chih-Kuai Yang
  • Patent number: 9548234
    Abstract: This disclosure provides a package substrate, a flip-chip package circuit and their fabrication method. The package substrate includes: a first wiring layer having a first metal wire and a first dielectric material layer filling the remaining part of the first wiring layer except for the first metal wire; a conductive pillar layer formed on the first wiring layer and including a metal pillar connected to the first metal wire, a molding compound layer with a protrusion part surrounding the metal pillar, and a second dielectric material layer formed on the molding compound layer; a second wiring layer formed on the conductive pillar layer and including a second metal wire connected to the metal pillar; and a protection layer formed on the second wiring layer.
    Type: Grant
    Filed: October 23, 2014
    Date of Patent: January 17, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Che-Wei Hsu, Shih-Ping Hsu
  • Patent number: 9536864
    Abstract: This disclosure provides a package structure and its fabrication method. The package structure includes: a protective insulation layer; a wiring layer including at least one metal wire and disposed on the protective insulation layer; and a first package unit disposed on the wiring layer and including a plurality of metal pillars, a first integrated-circuit chip and a first molding compound layer; wherein the plural metal pillars are located in a pillar region and electrically connected to the at least one metal wire, the first integrated-circuit chip is located in a device region and electrically connected to the at least one metal wire, and the first molding compound layer filling up the remaining part of the first package unit.
    Type: Grant
    Filed: July 29, 2014
    Date of Patent: January 3, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventor: Shih-Ping Hsu
  • Patent number: 9484224
    Abstract: A circuit board structure and a fabrication method thereof are disclosed. The circuit board structure includes a carrying board having a first and an opposite second surface and having at least one through cavity formed therein; a semiconductor chip disposed in the through cavity of the carrying board; an adhesive material filling the gap between the through cavity of the carrying board and the semiconductor chip to fix the semiconductor chip in the through cavity; and a reinforcing layer disposed on the second surface of the carrying board and the inactive surface of the semiconductor chip, thereby increasing the strength of the carrying board as well as the reliability of the circuit board.
    Type: Grant
    Filed: February 11, 2013
    Date of Patent: November 1, 2016
    Assignee: Unimicron Technology Corp.
    Inventor: Shih-Ping Hsu
  • Publication number: 20160268326
    Abstract: A substrate structure is provided, including a first insulating layer, a first circuit layer embedded in and bonded to the first insulating layer; a plurality of first conductive posts formed in the first insulating layer and electrically connected to the first circuit layer, a second circuit layer formed on the first insulating layer and electrically connected to the first circuit layer through the first conductive posts, a plurality of second conductive posts and a plurality of conductive bumps formed on the second circuit layer, and a second insulating layer formed on the first insulating layer and encapsulating the second circuit layer, the second conductive posts and the conductive bumps. The second insulating layer has a cavity exposing the conductive bumps. When the substrate structure is applied to a camera lens, a sensor element can be disposed in the cavity to reduce the thickness of the overall packaging module.
    Type: Application
    Filed: March 7, 2016
    Publication date: September 15, 2016
    Inventors: Chun-Hsien Yu, Chu-Chin Hu, Shih-Ping Hsu
  • Publication number: 20160260655
    Abstract: This disclosure provides a package substrate, a package structure including the same and their fabrication methods. The package substrate comprises: a first wiring layer having a first metal wire and a first dielectric material layer surrounding the first metal wire; a conductive pillar layer formed on the first wiring layer and including a first metal pillar connected to the first metal wire and a molding compound layer surrounding the first metal pillar; a flexible material layer formed on the conductive pillar layer and including a first opening formed on the first metal pillar and exposing the first metal pillar; and a second wiring layer formed on the conductive pillar layer and including a second metal wire connected to the first metal pillar through the first opening, a second metal pillar formed on the second metal wire, and a protective layer surrounding the second metal wire and the second metal pillar.
    Type: Application
    Filed: February 26, 2016
    Publication date: September 8, 2016
    Inventors: CHUN-HSIEN YU, SHIH-PING HSU
  • Publication number: 20160240514
    Abstract: This disclosure provides a package structure and its fabrication method. The package structure includes: a protective insulation layer; a wiring layer including at least one metal wire and disposed on the protective insulation layer; and a first package unit disposed on the wiring layer and including a plurality of metal pillars, a first integrated-circuit chip and a first molding compound layer; wherein the plural metal pillars are located in a pillar region and electrically connected to the at least one metal wire, the first integrated-circuit chip is located in a device region and electrically connected to the at least one metal wire, and the first molding compound layer filling up the remaining part of the first package unit.
    Type: Application
    Filed: April 25, 2016
    Publication date: August 18, 2016
    Inventor: SHIH-PING HSU