Patents by Inventor Shih Wang

Shih Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230041753
    Abstract: Semiconductor devices and methods of manufacture are described herein. A method includes forming an opening through an interlayer dielectric (ILD) layer to expose a contact etch stop layer (CESL) disposed over a conductive feature in a metallization layer. The opening is formed using photo sensitive materials, lithographic techniques, and a dry etch process that stops on the CESL. Once the CESL is exposed, a CESL breakthrough process is performed to extend the opening through the CESL and expose the conductive feature. The CESL breakthrough process is a flexible process with a high selectivity of the CESL to ILD layer. Once the CESL breakthrough process has been performed, a conductive fill material may be deposited to fill or overfill the opening and is then planarized with the ILD layer to form a contact plug over the conductive feature in an intermediate step of forming a semiconductor device.
    Type: Application
    Filed: October 19, 2022
    Publication date: February 9, 2023
    Inventors: Yu-Shih Wang, Po-Nan Yeh, U-Ting Chiu, Chun-Neng Lin, Chia-Cheng Chen, Liang-Yin Chen, Ming-Hsi Yeh, Kuo-Bin Huang
  • Publication number: 20230025296
    Abstract: Methods for preparing a void-free protective coating are disclosed herein. The void-free protective coating is used on a dielectric window having a central hole, which is used in a plasma treatment tool. A first protective coating layer is applied to the window, leaving an uncoated annular retreat area around the central hole. The first protective coating layer is polished to produce a flat surface and fill in any voids on the window. A second protective coating layer is then applied upon the flat surface of the first protective coating layer to obtain the void-free coating. This increases process uptime and service lifetime of the dielectric window and the plasma treatment tool.
    Type: Application
    Filed: February 8, 2022
    Publication date: January 26, 2023
    Inventors: Shih-Tsung Chen, Tsung-Cheng Ho, Chien-Yu Wang, Yen-Shih Wang, Jiun-Rong Pai, Yeh-Chieh Wang
  • Patent number: 11557512
    Abstract: In one exemplary aspect, a method comprises providing a semiconductor structure having a substrate, one or more first dielectric layers over the substrate, a first metal plug in the one or more first dielectric layers, and one or more second dielectric layers over the one or more first dielectric layers and the first metal plug. The method further comprises etching a via hole into the one or more second dielectric layers to expose the first metal plug, etching a top surface of the first metal plug to create a recess thereon, and applying a metal corrosion protectant comprising a metal corrosion inhibitor to the top surface of the first metal plug.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: January 17, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu Shih Wang, Shian Wei Mao, Ming-Hsi Yeh, Kuo-Bin Huang
  • Publication number: 20220410004
    Abstract: A game summary may be produced using an event log of in-game events and corresponding game content based on game data associated with a gameplay session(s). The event log may include metadata that indicates times of in-game events and associations between in-game events and game content items that capture the in-game events. A user may interact with in-game events with temporal context, allowing for more informed selections and a better understanding of the gameplay session. Using the event log, a game summary may provide such features as a timeline to convey relative timing of in-game events, a list of in-game events, a map of a virtual environment of the game that is temporally annotated based on in-game events, game status information, and statistical and performance information. A game summary may show trends over time and/or game sessions and convey information for selected sets of players, such as teams.
    Type: Application
    Filed: June 28, 2021
    Publication date: December 29, 2022
    Inventors: James Lewis van Welzen, Glenn R. Cochran, Jean Wang, Po-Shih Wang, Jeffrey David Weintraub, Toshant Sharma, Shyam Raikar
  • Patent number: 11532446
    Abstract: A button structure of an input device, including a circuit board, a dome element, and a trigger, is provided. The dome element is disposed on the circuit board, and is electrically conductive and elastic. The trigger is disposed at a center of the dome element, and is electrically insulative and flexible. The trigger has a conductive layer facing the circuit board. The dome element is configured to be pressed to drive the conductive layer of the trigger to abut against a trigger circuit of the circuit board to generate a trigger signal.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: December 20, 2022
    Assignee: Acer Incorporated
    Inventors: Yu-Shih Wang, Chih-Chun Liu, Cheng-Nan Ling, Wen-Chieh Tai
  • Publication number: 20220392803
    Abstract: A method of forming a semiconductor device includes: forming a semiconductor feature over a substrate, the semiconductor feature includes a conductive region; forming a dielectric layer over the semiconductor feature; patterning the dielectric layer to form a contact opening exposing a top surface of the conductive region; forming a monolayer over the dielectric layer, the top surface of the conductive region remaining exposed; and depositing a conductive material in the contact opening.
    Type: Application
    Filed: August 9, 2022
    Publication date: December 8, 2022
    Inventors: U-Ting Chiu, Po-Nan Yeh, Yu-Shih Wang, Chun-Neng Lin, Ming-Hsi Yeh
  • Publication number: 20220382955
    Abstract: Net-based checking of a circuit design includes obtaining a circuit design comprising a plurality of polygons. Further, a shape of a first polygon of the plurality of polygons, and a shape of a second polygon of the plurality of polygons is determined. The shape of the first polygon differs from a shape of the second polygon. Violations within the circuit design are detected based on a comparison of the first polygon with the second polygon.
    Type: Application
    Filed: May 31, 2022
    Publication date: December 1, 2022
    Inventors: Chao-Min WANG, Ru-Lin YANG, Cheng-Lin LEE, Yuan-Wen WANG, Hung-Shih WANG
  • Publication number: 20220375868
    Abstract: A semiconductor device includes a gate electrode, a source/drain structure, a lower contact contacting either of the gate electrode or the source/drain structure, and an upper contact disposed in an opening formed in an interlayer dielectric (ILD) layer and in direct contact with the lower contact. The upper contact is in direct contact with the ILD layer without an interposing conductive barrier layer, and the upper contact includes ruthenium.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 24, 2022
    Inventors: Cheng-Wei CHANG, Chia-Hung CHU, Kao-Feng LIN, Hsu-Kai CHANG, Shuen-Shin LIANG, Sung-Li WANG, Yi-Ying LIU, Po-Nan YEH, Yu Shih WANG, U-Ting CHIU, Chun-Neng LIN, Ming-Hsi YEH
  • Publication number: 20220375748
    Abstract: A method of forming a structure having a coating layer includes the following steps: providing a substrate; coating a fluid on the surface of the substrate, where the fluid includes a carrier and a plurality of silicon-containing nanoparticles; and performing a heating process to remove the carrier and convert the silicon-containing nanoparticles into a silicon-containing layer, a silicide layer, or a stack layer including the silicide layer and the silicon-containing layer.
    Type: Application
    Filed: May 24, 2021
    Publication date: November 24, 2022
    Inventors: CHUAN-PU LIU, YIN-WEI CHENG, SHIH-AN WANG, BO-LIANG PENG, CHUN-HUNG CHEN, JUN-HAN HUANG, YI-CHANG LI
  • Publication number: 20220367258
    Abstract: In an embodiment, a device includes: a semiconductor substrate; a first inter-layer dielectric (ILD) over the semiconductor substrate; a first conductive feature extending through the first ILD; a first etch stop layer over the first conductive feature and the first ILD, the first etch stop layer being a first dielectric material; a second ILD over the first etch stop layer; a contact having a first portion extending through the second ILD and a second portion extending through the first etch stop layer, the contact being physically and electrically coupled to the first conductive feature; and a first protective layer surrounding the second portion of the contact, the first portion of the contact being free from the first protective layer, the first protective layer being a second dielectric material, the second dielectric material being different from the first dielectric material.
    Type: Application
    Filed: July 26, 2022
    Publication date: November 17, 2022
    Inventors: Po-Nan Yeh, Yu-Shih Wang, Ming-Hsi Yeh
  • Publication number: 20220367254
    Abstract: Semiconductor devices and methods of manufacture are described herein. A method includes forming an opening through an interlayer dielectric (ILD) layer to expose a contact etch stop layer (CESL) disposed over a conductive feature in a metallization layer. The opening is formed using photo sensitive materials, lithographic techniques, and a dry etch process that stops on the CESL. Once the CESL is exposed, a CESL breakthrough process is performed to extend the opening through the CESL and expose the conductive feature. The CESL breakthrough process is a flexible process with a high selectivity of the CESL to ILD layer. Once the CESL breakthrough process has been performed, a conductive fill material may be deposited to fill or overfill the opening and is then planarized with the ILD layer to form a contact plug over the conductive feature in an intermediate step of forming a semiconductor device.
    Type: Application
    Filed: July 22, 2022
    Publication date: November 17, 2022
    Inventors: Yu-Shih Wang, Po-Nan Yeh, U-Ting Chiu, Chun-Neng Lin, Chia-Cheng Chen, Liang-Yin Chen, Ming-Hsi Yeh, Kuo-Bin Huang
  • Publication number: 20220359235
    Abstract: A method for processing a substrate is provided. The method includes the following operations: placing a substrate over a first injector in a substrate processing apparatus, the substrate having a front surface and a back surface opposite to the front surface, and the front surface having a plurality of concentric regions; adjusting a temperature of each of the plurality of concentric regions by controlling at least one of a flow rate and a temperature associated with a fluid dispensing from the first injector; and rotating the substrate by a spin base disposed below the substrate, the substrate is rotated with respect to a center axis perpendicular to the front surface thereof when adjusting the temperature. The spin base includes a ring opening for rotating relative to the first injector, and the first injector is displaced from a projection of a center of the substrate from a top view perspective.
    Type: Application
    Filed: July 21, 2022
    Publication date: November 10, 2022
    Inventors: PO-YUAN WANG, TZU ANG CHIANG, JIAN-JOU LIAN, YU SHIH WANG, CHUN-NENG LIN, MING-HSI YEH
  • Patent number: 11488857
    Abstract: Semiconductor devices and methods of manufacture are described herein. A method includes forming an opening through an interlayer dielectric (ILD) layer to expose a contact etch stop layer (CESL) disposed over a conductive feature in a metallization layer. The opening is formed using photo sensitive materials, lithographic techniques, and a dry etch process that stops on the CESL. Once the CESL is exposed, a CESL breakthrough process is performed to extend the opening through the CESL and expose the conductive feature. The CESL breakthrough process is a flexible process with a high selectivity of the CESL to ILD layer. Once the CESL breakthrough process has been performed, a conductive fill material may be deposited to fill or overfill the opening and is then planarized with the ILD layer to form a contact plug over the conductive feature in an intermediate step of forming a semiconductor device.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: November 1, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Shih Wang, Po-Nan Yeh, U-Ting Chiu, Chun-Neng Lin, Chia-Cheng Chen, Liang-Yin Chen, Ming-Hsi Yeh, Kuo-Bin Huang
  • Patent number: 11488859
    Abstract: In an embodiment, a device includes: a semiconductor substrate; a first inter-layer dielectric (ILD) over the semiconductor substrate; a first conductive feature extending through the first ILD; a first etch stop layer over the first conductive feature and the first ILD, the first etch stop layer being a first dielectric material; a second ILD over the first etch stop layer; a contact having a first portion extending through the second ILD and a second portion extending through the first etch stop layer, the contact being physically and electrically coupled to the first conductive feature; and a first protective layer surrounding the second portion of the contact, the first portion of the contact being free from the first protective layer, the first protective layer being a second dielectric material, the second dielectric material being different from the first dielectric material.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: November 1, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Po-Nan Yeh, Yu Shih Wang, Ming-Hsi Yeh
  • Publication number: 20220342451
    Abstract: A portable electronic device including a main display and at least one external display detachable relative to one side of the main display is provided. The external display includes a body, a slider slidably disposed in the body, at least one latch pivoted to the body, and at least one elastic member connected between the slider and the body. The latch has a driving column and a tenon portion opposite to each other, and the driving column is movably connected to the slider, such that when the slider slides relative to the body, the latch is driven to pivot relative to the body, and the tenon portion is rotated out of the body or hidden in body. The tenon portion that is rotated out of the body is inserted into the main display, so that the external display is combined to the main display.
    Type: Application
    Filed: March 4, 2022
    Publication date: October 27, 2022
    Applicant: Acer Incorporated
    Inventors: Yu-Shih Wang, Yi-Ta Huang, Chih-Chun Liu, Cheng-Nan Ling, Wen-Chieh Tai
  • Publication number: 20220285209
    Abstract: A method of forming a semiconductor device includes: forming a semiconductor feature over a substrate, the semiconductor feature includes a conductive region; forming a dielectric layer over the semiconductor feature; patterning the dielectric layer to form a contact opening exposing a top surface of the conductive region; forming a monolayer over the dielectric layer, the top surface of the conductive region remaining exposed; and depositing a conductive material in the contact opening.
    Type: Application
    Filed: March 5, 2021
    Publication date: September 8, 2022
    Inventors: U-Ting Chiu, Po-Nan Yeh, Yu-Shih Wang, Chun-Neng Lin, Ming-Hsi Yeh
  • Patent number: 11424185
    Abstract: A semiconductor device includes a gate electrode, a source/drain structure, a lower contact contacting either of the gate electrode or the source/drain structure, and an upper contact disposed in an opening formed in an interlayer dielectric (ILD) layer and in direct contact with the lower contact. The upper contact is in direct contact with the ILD layer without an interposing conductive barrier layer, and the upper contact includes ruthenium.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: August 23, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Wei Chang, Chia-Hung Chu, Kao-Feng Lin, Hsu-Kai Chang, Shuen-Shin Liang, Sung-Li Wang, Yi-Ying Liu, Po-Nan Yeh, Yu Shih Wang, U-Ting Chiu, Chun-Neng Lin, Ming-Hsi Yeh
  • Publication number: 20220236766
    Abstract: An electronic device assembly is provided, including an electronic device body and a detachable lens module. The electronic device body has a housing and a first joining unit, wherein the first joining unit is disposed on the housing. The detachable lens module is detachably assembled onto the housing and has a second joining unit, wherein the first joining unit is joined to the second joining unit to electrically connect the detachable lens module to the electronic device body.
    Type: Application
    Filed: April 12, 2022
    Publication date: July 28, 2022
    Applicant: Acer Incorporated
    Inventors: Yu-Shih Wang, Yi-Ta Huang, Chih-Chun Liu, Cheng-Nan Ling, Wen-Chieh Tai, Chi-Hung Lai, Wu-Chen Lee, Pin-Chueh Lin, Chih-Wei Liao, Ting-Wen Pai, Wen-Chieh Chen
  • Patent number: 11398391
    Abstract: A substrate processing apparatus is provided. The substrate processing apparatus includes a plurality of holding members and at least a first injector. The plurality of holding members are configured to hold a substrate. The substrate includes a front surface and a back surface opposite to the front surface. The first injector is below the holding members and is configured to face the back surface of the substrate. The first injector is displaced from a projection of a center of the substrate from a top view perspective. A method for processing a substrate is also provided.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: July 26, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Po-Yuan Wang, Tzu Ang Chiang, Jian-Jou Lian, Yu Shih Wang, Chun-Neng Lin, Ming-Hsi Yeh
  • Publication number: 20220206600
    Abstract: A touch pad structure includes a touch module, a first bracket, a second bracket, and a plurality of linkage rods. The touch module is disposed on the first bracket. The second bracket is surrounding the first bracket and the touch module. A plurality of outer edges of the first bracket faces to a plurality of inner edges of the second bracket respectively. Each of the linkage rods is pivotally connected the outer edge and the inner edge facing to each other, so that the touch module is moved together with the first bracket and relative to the second bracket when the touch module is pressed or released, and the linkage rods have synchronized seesaw motion.
    Type: Application
    Filed: March 21, 2022
    Publication date: June 30, 2022
    Applicant: Acer Incorporated
    Inventors: Yu-Shih Wang, Wen-Chieh Tai, Cheng-Nan Ling, Chih-Chun Liu