Abstract: An electronic device may include a display such as a light-emitting diode display. The electronic device may be a head-mounted device that provides a virtual reality or augmented reality environment to a user. To reduce artifacts in the display, a display may be operable in both a normal scanning mode and a partial scanning mode. In the normal scanning mode, every row of the display may be enabled to emit light in each frame. In the partial scanning mode, only a subset of the rows of the display may be enabled to emit light in each frame. The display may have a higher refresh rate in the partial scanning mode than in the normal scanning mode. To ensure uniform transistor stress across the display, the scanning driver for the display may scan the disabled rows in the partial scanning mode even though the rows will not be used to emit light.

Abstract: To minimize the width of a non-light-emitting border region around an opening in the active area, data lines may be stacked in the border region. Data line portions may be formed using three metal layers in three different planes within the border region. A metal layer that forms a positive power signal distribution path in the active area may serve as a data line portion in the border region. A metal layer may be added in the border region to serve as a data line portion in the border region. Data line signals may also be provided to pixels on both sides of an opening in the active area using supplemental data line paths. A supplemental data line path may be routed through the active area of the display to electrically connect data line segments on opposing sides of an opening within the display.

Abstract: To minimize the width of a non-light-emitting border region around an opening in the active area, data lines may be stacked in the border region. Data line portions may be formed using three metal layers in three different planes within the border region. A metal layer that forms a positive power signal distribution path in the active area may serve as a data line portion in the border region. A metal layer may be added in the border region to serve as a data line portion in the border region. Data line signals may also be provided to pixels on both sides of an opening in the active area using supplemental data line paths. A supplemental data line path may be routed through the active area of the display to electrically connect data line segments on opposing sides of an opening within the display.

Abstract: A display may have display driver circuitry. Signal routing lines may supply multiplexed signals from the display driver circuitry to demultiplexer circuitry. The demultiplexer circuitry may provide corresponding demultiplexed signals to the pixels over signal routing lines. The demultiplexer circuitry may have demultiplexer circuit blocks such as 1:N demultiplexer circuit blocks. Each of the demultiplexer circuit blocks may have the same area and layout. The demultiplexer circuit blocks may run across the width of the display. A first portion of the demultiplexer circuit blocks may extend in a straight line parallel to an edge of the active area. A second portion of the demultiplexer circuit blocks may be arranged in a staircase pattern that angles away from the first portion of demultiplexer circuit blocks.

Abstract: A display may have organic light-emitting diode pixels formed from thin-film circuitry. The thin-film circuitry may be formed in thin-film transistor (TFT) layers and the organic light-emitting diodes may include anodes and cathodes and an organic emissive layer formed over the TFT layers between the anodes and cathodes. The organic emissive layer may be formed via chemical evaporation techniques. The display may include moisture blocking structures such as organic emissive layer disconnecting structures that introduce one or more gaps in the organic emissive layer during evaporation so that any potential moisture permeating path from the display panel edge to the active area of the display is completely terminated.

Abstract: A display may have contacts that mate with a flexible printed circuit. The contacts may be used in providing data and control signals to pixels. A metal layer may be patterned to form metal traces for signal lines that extend outwardly towards an edge of the display from the contacts. Delamination stopper structures may be formed along the periphery of the display to inhibit delamination between layers of material on the display. The delamination stopper structures may be formed from bent portions of the metal traces, a slot-shaped inorganic layer opening that runs perpendicular to the metal traces, and a segmented trench in an organic layer. A corrosion blocker structure may be formed by creating metal trace gaps in the metal traces that are each bridged by a pair of vias that are shorted together using transparent conductive material such as a pair of indium tin oxide layers.

Abstract: An electronic device may include a display such as a light-emitting diode display. The electronic device may be a head-mounted device that provides a virtual reality or augmented reality environment to a user. To reduce artifacts in the display, a display may be operable in both a normal scanning mode and a partial scanning mode. In the normal scanning mode, every row of the display may be enabled to emit light in each frame. In the partial scanning mode, only a subset of the rows of the display may be enabled to emit light in each frame. The display may have a higher refresh rate in the partial scanning mode than in the normal scanning mode. To ensure uniform transistor stress across the display, the scanning driver for the display may scan the disabled rows in the partial scanning mode even though the rows will not be used to emit light.

Abstract: To minimize the width of a non-light-emitting border region around an opening in the active area, data lines may be stacked in the border region. Data line portions may be formed using three metal layers in three different planes within the border region. A metal layer that forms a positive power signal distribution path in the active area may serve as a data line portion in the border region. A metal layer may be added in the border region to serve as a data line portion in the border region. Data line signals may also be provided to pixels on both sides of an opening in the active area using supplemental data line paths. A supplemental data line path may be routed through the active area of the display to electrically connect data line segments on opposing sides of an opening within the display.

Abstract: An electronic device may include a display such as a light-emitting diode display. The electronic device may be a head-mounted device that provides a virtual reality or augmented reality environment to a user. To reduce artifacts in the display, a display may be operable in both a normal scanning mode and a partial scanning mode. In the normal scanning mode, every row of the display may be enabled to emit light in each frame. In the partial scanning mode, only a subset of the rows of the display may be enabled to emit light in each frame. The display may have a higher refresh rate in the partial scanning mode than in the normal scanning mode. To ensure uniform transistor stress across the display, the scanning driver for the display may scan the disabled rows in the partial scanning mode even though the rows will not be used to emit light.

Abstract: An electronic device may include a display such as a light-emitting diode display. The electronic device may be a head-mounted device that provides a virtual reality or augmented reality environment to a user. To reduce artifacts in the display, a display may be operable in both a normal scanning mode and a partial scanning mode. In the normal scanning mode, every row of the display may be enabled to emit light in each frame. In the partial scanning mode, only a subset of the rows of the display may be enabled to emit light in each frame. The display may have a higher refresh rate in the partial scanning mode than in the normal scanning mode. To ensure uniform transistor stress across the display, the scanning driver for the display may scan the disabled rows in the partial scanning mode even though the rows will not be used to emit light.

Abstract: A display may have an array of pixels such as liquid crystal display pixels. The display may include short pixel rows that span only partially across the display and full-width pixel rows that span the width of the display. The gate lines coupled to the short pixel rows may extend into the inactive area of the display. Supplemental gate line loading structures may be located in the inactive area of the display to increase loading on the gate lines that are coupled to short pixel rows. The supplemental gate line loading structures may include data lines and doped polysilicon that overlap the gate lines in the inactive area. In displays that combine display and touch functionality into a thin-film transistor layer, supplemental loading structures may be used in the inactive area to increase loading on common voltage lines that are coupled to short rows of common voltage pads.

Abstract: An electronic device may include a display such as a light-emitting diode display. The electronic device may be a head-mounted device that provides a virtual reality or augmented reality environment to a user. To reduce artifacts in the display, a display may be operable in both a normal scanning mode and a partial scanning mode. In the normal scanning mode, every row of the display may be enabled to emit light in each frame. In the partial scanning mode, only a subset of the rows of the display may be enabled to emit light in each frame. The display may have a higher refresh rate in the partial scanning mode than in the normal scanning mode. To ensure uniform transistor stress across the display, the scanning driver for the display may scan the disabled rows in the partial scanning mode even though the rows will not be used to emit light.

Abstract: A display may have an array of pixels such as liquid crystal display pixels. The display may include short pixel rows that span only partially across the display and full-width pixel rows that span the width of the display. The gate lines coupled to the short pixel rows may extend into the inactive area of the display. Supplemental gate line loading structures may be located in the inactive area of the display to increase loading on the gate lines that are coupled to short pixel rows. The supplemental gate line loading structures may include data lines and doped polysilicon that overlap the gate lines in the inactive area. In displays that combine display and touch functionality into a thin-film transistor layer, supplemental loading structures may be used in the inactive area to increase loading on common voltage lines that are coupled to short rows of common voltage pads.

Abstract: A display may have contacts that mate with a flexible printed circuit. The contacts may be used in providing data and control signals to pixels. A metal layer may be patterned to form metal traces for signal lines that extend outwardly towards an edge of the display from the contacts. Delamination stopper structures may be formed along the periphery of the display to inhibit delamination between layers of material on the display. The delamination stopper structures may be formed from bent portions of the metal traces, a slot-shaped inorganic layer opening that runs perpendicular to the metal traces, and a segmented trench in an organic layer. A corrosion blocker structure may be formed by creating metal trace gaps in the metal traces that are each bridged by a pair of vias that are shorted together using transparent conductive material such as a pair of indium tin oxide layers.

Abstract: A display may have rows and columns of pixels. Gate lines may be used to supply gate signals to rows of the pixels. Data lines may be used to supply data signals to columns of the pixels. The data lines may include alternating even and odd data lines. Data lines may be organized in pairs each of which includes one of the odd data lines and an adjacent one of the even data lines. Demultiplexer circuitry may be configured dynamically during data loading and pixel sensing operations. During data loading, data from display driver circuitry may be supplied, alternately to odd pairs of the data lines and even pairs of the data lines. During sensing, the demultiplexer circuitry may couple a pair of the even data lines to sensing circuitry in the display driver circuitry and then may couple a pair of the odd data lines to the sensing circuitry.

Abstract: A display may have an array of pixels such as liquid crystal display pixels. The display may include short pixel rows that span only partially across the display and full-width pixel rows that span the width of the display. The gate lines coupled to the short pixel rows may extend into the inactive area of the display. Supplemental gate line loading structures may be located in the inactive area of the display to increase loading on the gate lines that are coupled to short pixel rows. The supplemental gate line loading structures may include data lines and doped polysilicon that overlap the gate lines in the inactive area. In displays that combine display and touch functionality into a thin-film transistor layer, supplemental loading structures may be used in the inactive area to increase loading on common voltage lines that are coupled to short rows of common voltage pads.

Abstract: A display may have display driver circuitry. Signal routing lines may supply multiplexed signals from the display driver circuitry to demultiplexer circuitry. The demultiplexer circuitry may provide corresponding demultiplexed signals to the pixels over signal routing lines. The demultiplexer circuitry may have demultiplexer circuit blocks such as 1:N demultiplexer circuit blocks. Each of the demultiplexer circuit blocks may have the same area and layout. The demultiplexer circuit blocks may run across the width of the display. A first portion of the demultiplexer circuit blocks may extend in a straight line parallel to an edge of the active area. A second portion of the demultiplexer circuit blocks may be arranged in a staircase pattern that angles away from the first portion of demultiplexer circuit blocks.

Abstract: An electronic device may include a display such as a light-emitting diode display. The electronic device may be a head-mounted device that provides a virtual reality or augmented reality environment to a user. To reduce artifacts in the display, a display may be operable in both a normal scanning mode and a partial scanning mode. In the normal scanning mode, every row of the display may be scanned in each frame. In the partial scanning mode, only a subset of the rows of the display may be scanned in each frame. The display may have a higher refresh rate in the partial scanning mode than in the normal scanning mode. The gate driver circuitry may include a shift register that includes a plurality of register circuits. At least one register circuit may have a first input and a second input that is different than the first input.

Abstract: Improvement of visual uniformity of an integrated touch screen display is provided. A touch screen can include common electrodes separated by gaps in a Vcom layer. To improve visual non-uniformity in the display resulting from the gaps, a first set of semi-transparent dummy features (primary-dummy features) can be formed on a second layer at the locations of the gaps, and a second set of dummy features (supplementary-dummy features) can also be formed on the second layer or another layer to mitigate low spatial resolution of the primary-dummy features and/or non-uniform spacing of the primary-dummy features. In some examples, holes or slits can be formed in the Vcom layer at areas of the supplementary-dummy features to further improve visual uniformity.

Abstract: A display may have an array of pixels. A transparent conductive layer may serve as a common voltage electrode layer and may distribute a common voltage to each of the pixels. Metal layers may be used to form routing structures. One of the metal layers may be patterned to form gate lines that distribute control signals to thin-film transistors in the pixels. Touch sensor circuitry may be coupled to horizontal and vertical capacitive touch sensor electrodes formed from the transparent conductive layer. A touch sensor signal border routing path in an inactive area of the display may have openings that run parallel to the gate lines and that each overlap one of the gate lines to reduce capacitive coupling between the gate lines and the touch sensor signal border routing path.