Abstract: The level shifter comprises a coupling block, a PMOS switch, a first PMOS transistor and a second PMOS transistor. The coupling block receives a first signal and a second signal to generate a first control signal and a first reference voltage. The first signal and the second signal are of opposite phases. The PMOS switch is controlled by the first control signal to choose the first reference voltage or a second reference voltage to be a second control signal. The first PMOS transistor is controlled by the first control signal. The second PMOS transistor is controlled by the second control signal. The connection point between the second PMOS transistor and the first PMOS transistor outputs an output signal.

Abstract: A compensating circuit for calibrating reference voltage, which is coupled to an operation amplifier having an input end and an output end within a reference voltage driving circuit, is provided in the present invention. The compensating circuit comprises a first capacitor, a second capacitor, and a first switch. The first capacitor is utilized for storing the potential with respect to the reference voltage. The second capacitor is coupled to the operation amplifier for storing the potential difference between the input end and the output end of the operation amplifier. The first switch is electrically connecting to the first capacitor and the second capacitor. When turning on the first switch, the potentials stored in the first capacitor and the second capacitor are combined and input to the operation amplifier to have an output voltage level substantially identical to the reference voltage.

Abstract: A digital data driver and LCD using the same. In the digital data driver, a plurality of data lines, each transfer first data during a first period and second data during a second period. A first shift register outputs a first enable signal during the first period, a second shift register outputs a second enable signal during the second period. Transmission controllers are coupled to the data lines respectively, each outputs the first data and the second data to two different DAC according to the first and second enable signals and two external signals. The present invention, by sharing latches and DACs, prevents layout and wire routing difficulty caused by the increased lateral layout area required by increased LCD resolution.

Abstract: The level shifter comprises a coupling block, a PMOS switch, a first PMOS transistor and a second PMOS transistor. The coupling block receives a first signal and a second signal to generate a first control signal and a first reference voltage. The first signal and the second signal are of opposite phases. The PMOS switch is controlled by the first control signal to choose the first reference voltage or a second reference voltage to be a second control signal. The first PMOS transistor is controlled by the first control signal. The second PMOS transistor is controlled by the second control signal. The connection point between the second PMOS transistor and the first PMOS transistor outputs an output signal.

Abstract: A data driver includes an input module, a plurality of latches, a plurality of shift registers, and a digital-to-analog converter (DAC). The method includes utilizing the input module to receive an N-bit digital data set that is classified into m groups, wherein m and n are integers with values either equal to or greater than two. The method further includes utilizing the shift registers to output a plurality of switch signals so as to store the m groups of digital data into the latches in sequence, transmitting the m groups of digital data into the DAC in sequence according to the switch signals, transforming the m groups of digital data into a corresponding analog voltage signal in sequence, and outputting the analog voltage signal to a data line in sequence for pre-charging and driving the data line.

Abstract: A data driving circuit and method for an organic light emitting diode display. Data lines transmit first digital data in a first cycle, and subsequent digital data in a second cycle. A D/A converter electrically connected to the data lines converts the first digital data to first analog data, and converts the subsequent digital data to second analog data. Each analog sampling storage circuit electrically coupled to the D/A converter, in the first cycle, stores the first analog data, in the second cycle, outputs the first analog data and stores the second analog data, and in a third cycle, outputs the second analog data.

Abstract: A DC-DC converter for a display. The DC-DC converter comprises a negative voltage generator, a level sifter and a DC-DC sub-converter. The negative generator generates a negative voltage. The level shifter, coupled to the negative voltage generator, generates complementary switch control signals. The DC-DC sub-converter coupled to the level shifter operates in response to the complementary switch control signals.

Abstract: A compensating circuit for calibrating reference voltage, which is coupled to an operation amplifier having an input end and an output end within a reference voltage driving circuit, is provided in the present invention. The compensating circuit comprises a first capacitor, a second capacitor, and a first switch. The first capacitor is utilized for storing the potential with respect to the reference voltage. The second capacitor is coupled to the operation amplifier for storing the potential difference between the input end and the output end of the operation amplifier. The first switch is electrically connecting to the first capacitor and the second capacitor. When turning on the first switch, the potentials stored in the first capacitor and the second capacitor are combined and input to the operation amplifier to have an output voltage level substantially identical to the reference voltage.

Abstract: A data driving circuit and method for an organic light emitting diode display. Data lines transmit first digital data in a first cycle, and subsequent digital data in a second cycle. A D/A converter electrically connected to the data lines converts the first digital data to first analog data, and converts the subsequent digital data to second analog data. Each analog sampling storage circuit electrically coupled to the D/A converter, in the first cycle, stores the first analog data, in the second cycle, outputs the first analog data and stores the second analog data, and in a third cycle, outputs the second analog data.

Abstract: A data driving circuit and organic light emitting diode display, comprising a D/A converter, a switch unit, a first analog sampling storage circuit and a second analog sampling storage circuit. The first analog sampling storage circuit is controlled by a first signal for storing corresponding first analog transformed data in the first cycle, and controlled by a second signal for outputting first analog data corresponding to the first analog transformed data in the second cycle. The second analog sampling storage circuit is controlled by the second signal for storing the second analog transformed data in the second cycle, and controlled by the first signal for outputting second analog data corresponding to the second analog transformed data in a third cycle.

Abstract: A buffer circuit for a liquid crystal display device that comprises a first transistor further comprising a gate connectable to an input signal, a first electrode coupled to a first power supply, and- a second electrode connectable to a second power supply, a second transistor further comprising a gate coupled to the second electrode of the first transistor, a first electrode connectable to the first power supply, and a second electrode connectable to the second power supply, a first capacitor being connectable to the input signal storing a voltage of the input signal when connected to the input signal, and providing a first voltage to the gate of the first transistor when disconnected from the input signal, a second capacitor further comprising a terminal coupled to the second electrode of the first transistor and the gate of the second transistor providing a second voltage at the terminal when the first transistor is turned on, and a third capacitor coupled to the first electrode of the second transistor pr

Abstract: A digital data driver and LCD using the same. In the digital data driver, a plurality of data lines, each transfer first data during a first period and second data during a second period. A first shift register outputs a first enable signal during the first period, a second shift register outputs a second enable signal during the second period. Transmission controllers are coupled to the data lines respectively, each outputs the first data and the second data to two different DAC according to the first and second enable signals and two external signals. The present invention, by sharing latches and DACs, prevents layout and wire routing difficulty caused by the increased lateral layout area required by increased LCD resolution.

Abstract: A method for driving data with a data driver in a display device. The data driver includes an input module, a plurality of latches, a plurality of shift registers, and a digital-to-analog converter (DAC). The method includes utilizing the input module to receive an N-bit digital data set that is classified into m groups, wherein m and n are integers with values either equal to or greater than two. The method further includes utilizing the shift registers to output a plurality of switch signals so as to store the m groups of digital data into the latches in sequence, transmitting the m groups of digital data into the DAC in sequence according to the switch signals, transforming the m groups of digital data into a corresponding analog voltage signal in sequence, and outputting the analog voltage signal to a data line in sequence for pre-charging and driving the data line.