Abstract: A memory cell having an asymmetric source and drain connection to virtual ground bit-lines. A main diffusion, adjacent the drain and displaced from the source, allows Fowler-Nordheim (FN) tunneling erasure on the drain side of the floating gate. A pocket diffusion, between the main diffusion and the source, concentrates the electric field and thereby enhances the efficiency of programming by electron injection on the source side of the floating gate. A nonvolatile semiconductor memory device comprising row and column arrangement of the cells, in which adjacent columns of cells share a single virtual ground bit line.

Abstract: A process for making a self-aligned select gate for a split-gate flash memory structure uses a patterned nitride layer and a photoresist layer to serve as masks to define a select gate length, facilitates a self-aligned ion implantation to form a drain region of a memory cell, and defines a distance between the select gate and the drain region.

Abstract: A method for soft programming memory cells and floating gate memory device. During soft programming, a gate voltage is supplied to the control gate, a drain voltage it supplied to the drain, a well voltage is supplied to the well, and an active current limiter is coupled to the source. A circuit for soft programming supplies a gate voltage to the control gate, couples a constant current source to the drain, supplies a well voltage to the well, and supplies a source voltage to the source. The gate voltage may be approximately 2 V, the drain voltage may be approximately 4 V, and the well voltage may be approximately -2 V. According to another embodiment of the invention, the gate voltage is approximately 2 V lower than the drain voltage, and the well voltage is approximately 4 V lower than the gate voltage.

Abstract: A method for fabricating a split gate memory cell using the self-alignment technique to reduce the amount of misalignment is disclosed. The memory cell generally comprises a floating gate for storing a charge, a select gate for selecting one or more memory cell to operate thereon, a control gate, a buried source region and a buried drain region. Due to the structure of the memory cell, there is no read disturbance when reading the memory cell and its low voltage requirement makes it suitable for low voltage applications. When placed in a memory array, each of the memory cells in the array can be individually programmed or read. In performing the erase operation, a column of information is erased.

Abstract: An electrical appliance includes a conductive casing, a connector and a grounding device. The connector includes an insulator body mounted on the conductive casing, and a ground terminal disposed on the insulator body. The ground terminal has a connecting end that extends inwardly of the conductive casing. The grounding device includes a metal plate which has a first end mounted on the conductive casing, and a second end defining an engaging hole that engages the connecting end of the ground terminal.

Abstract: A method for soft programming memory cells and floating gate memory device. During soft programming, a gate voltage is supplied to the control gate, a drain voltage it supplied to the drain, a well voltage is supplied to the well, and an active current limiter is coupled to the source. A circuit for soft programming supplies a gate voltage to the control gate, couples a constant current source to the drain, supplies a well voltage to the well, and supplies a source voltage to the source. The gate voltage may be approximately 2 V, the drain voltage may be approximately 4 V, and the well voltage may be approximately -2 V. According to another embodiment of the invention, the gate voltage is approximately 2 V lower than the drain voltage, and the well voltage is approximately 4 V lower than the gate voltage.

Abstract: Method for writing data to a NOR-type flash memory array including loading page data to a bit-latch buffer, programming cells to low threshold voltage V.sub.t, and programming cells to high V.sub.t. Programming cells to high V.sub.t by either: Channel Hot Electron Injection (CHEI) or Source Side Injection (SSI). CHEI releases the band-to-band induced hot hole damage while SSI further reduces the sector size to be the same as page size for NOR-type flash EEPROM memory.

Abstract: A memory cell having an asymmetric source and drain connection to virtual ground bit-lines. A main diffusion, adjacent the drain and displaced from the source, allows Fowler-Nordheim (FN) tunneling erasure on the drain side of the floating gate. A pocket diffusion, between the main diffusion and the source, concentrates the electric field and thereby enhances the efficiency of programming by electron injection on the source side of the floating gate. A nonvolatile semiconductor memory device comprising row and column arrangement of the cells, in which adjacent columns of cells share a single virtual ground bit line.

Abstract: A memory cell having an asymmetric source and drain connection to virtual ground bit-lines providing an abrupt junction suitable for band-to-band hot electron generation and a gradual junction suitable for Fowler-Nordheim tunneling on each side of the cells. A nonvolatile semiconductor memory device comprising row and column arrangement of the cells in which adjacent columns of cells share a single virtual ground bit line.

Abstract: A sock with a shoehorn which is generally an elongated elastic tube band. The tube band has a slippery inner wall which is not very thick. The tube band is attached closely to a bottom heel portion of the sock with its two opposite ends fixed on a symmetrical line on both sides of the sock. A wearer holds an open collar or rim of the shoe and inserts their foot into the shoe such that their foot pushes forward and down on the bottom heel portion of the sock, which in turn pushes the tube band against the collar of the sock, where the tube band is rolled against the collar to a location adjacent to a rear heel portion of the sock. The tube band which was under the bottom heel portion of the sock is rolled back to the rear heel portion of the sock and concealed inside the shoe.

Abstract: A method for programming a flash memory array which insures fast programming to substantially all of the cells in the array, without over-programming, based on providing a pattern of program retry pulses which have respective pulse widths and pulse heights which vary according to a pattern. The pattern includes a combination of both increasing pulse widths and increasing pulse heights. The pattern includes a first phase which completes in a specified amount of time including a predetermined number of retries so that substantially all of the cells in the array are programmed within the first phase. A second phase of the patter involves a sequence of higher energy pulses addressed to programming the slowest cells in the array. When used in a page program array, in which individual cells which are programmed fast do not receive subsequent retry pulses, a very fast and reliable programming scheme is achieved.

Abstract: A floating gate memory device which includes control circuits to generate a repair pulse to repair over-erased cells so they may be repaired block-by-block. This invention includes repairing the cells by applying a repair pulse to the cell's bit line while maintaining the word line voltage above ground. In a different embodiment, the word line voltage is maintained at two different voltage levels above ground. In the first stage, the word line voltage is maintained between approximately 0.1 volts and 0.2 volts for approximately 100 ms while the repair pulse is applied. In the second stage, the word line voltage is maintained between approximately 0.4 volts and 0.5 volts for approximately 100 ms while the repair pulse is applied.

Abstract: A switch lock plays a key role to combine a plurality of four embodiments covering Cube, Trigonal Prism, Right Pyramid, and Quadrant Column plus accessary Segment Column blocks through a ring opening lying centrally on every side of these embodiments, except of Segment Column only one surface sharing it. By the sliding between rounded corners and that happening between sphere surfaces, assembly purpose is then achieved. What they really touch is only three small pieces of are and six points; therefore, assemblage and disassemblage among blocks turn much easier. After assemblage, six semi-circular knobs below the ring opening will stable hold the middle lower part of three ball-like projections on the enlarged head of the switch lock in pairs by the strength of expelling each other. In addition, taking the advantage of expelling each other between the rounded corner behind a neck line and that below the head of the switch lock, the blocks can match each other firmly and correspondingly without any rotation.

Abstract: A tool joint in which different tapers on the threads result in an artificial change in pitch and a radial interference and an asymmetric root cut on a larger radius than conventional API threads together with the effect of the tapered thread engagement reduces maximum stress in the thread roots and prevents over-torquing.

Abstract: The diluter disclosed herein consists of a control and drive unit and a diluent module which is connectable to the control and drive unit to form a diluter apparatus. In the diluent module, which can be removed and replaced for the rapid and non-contaminating substitution of diluents, a diluent piston engages the walls of a cylindrical diluent reservoir which has an outlet at one end. A bore through the diluent piston receives and supports a second, smaller piston which can be moved independently of the diluent piston. With appropriate connections to the drive unit, the small piston may be moved in a direction away from the diluent outlet, thereby aspirating a small sample of liquid placed in contact with a spout which communicates with the diluent outlet. Subsequent movement of the diluent piston toward the outlet enables the dispensing from the spout of the relatively small sample of liquid along with a relatively large quantity of diluent.