Patents by Inventor Shinichiro Hayashi

Shinichiro Hayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6939725
    Abstract: A capacitor including a capacitor lower electrode, a capacitor dielectric film of a highly dielectric film or a ferroelectric film and a capacitor upper electrode is formed on a semiconductor substrate. A protection film is formed on the semiconductor substrate so as to cover the capacitor. A first TEOS film having a relatively large water content is formed on the protection film through first TEOS-O3 CVD where an ozone concentration is relatively low. A second TEOS-O3 film having a relatively small water content is formed on the first TEOS-O3 film through second TEOS-O3 CVD where the ozone concentration is relatively high.
    Type: Grant
    Filed: February 3, 2004
    Date of Patent: September 6, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshie Kutsunai, Shinichiro Hayashi, Yuji Judai, Yoshihisa Nagano
  • Publication number: 20050153462
    Abstract: As a method for fabricating a semiconductor device, a lower electrode is first formed on a semiconductor substrate and then a first ferroelectric film is formed on the lower electrode by CVD using a first source gas. Thereafter, a second ferroelectric film is formed on the first ferroelectric film by CVD using a second source gas. Subsequently, an upper electrode is formed on the second ferroelectric film. In this method, the concentration of bismuth contained in the first source gas is different from the concentration of bismuth contained in the second source gas.
    Type: Application
    Filed: December 28, 2004
    Publication date: July 14, 2005
    Inventors: Hisashi Yano, Shinichiro Hayashi
  • Patent number: 6891715
    Abstract: A capacitor is formed on an interlayer insulating film formed on a semiconductor substrate. The capacitor includes a bottom electrode made of platinum, a capacitor insulating film made of SrTaBiO (SBT) containing an element absorbing hydrogen such as titanium, for example, in grain boundaries, inter-lattice positions or holes, and a top electrode made of platinum.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: May 10, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takumi Mikawa, Yuji Judai, Shinichiro Hayashi
  • Patent number: 6867452
    Abstract: A high dielectric constant insulator including a thin film of a metal oxide selected from the group consisting of tungsten-bronze-type oxides, pyrochlore-type oxides, and combinations of Bi2O3 with an oxide selected from the group consisting of perovskites and pyrochlore-type oxides. An embodiment contains metal oxides represented by the general stoichiometric formulas AB2O6, A2B2O7 and A2Bi2B2O10, wherein A represents A-site atoms selected from the group of metals consisting of Ba, Bi, Sr, Pb, Ca, K, Na and La; and B represents B-site atoms selected from the group of metals consisting of Ti, Zr, Ta, Hf, Mo, W and Nb. Preferably, the metal oxides are (BaxSr1?x)(TayNb1?y)2O6, where 0?y?1.0 and 0?y?1.0; (BaxSr1?x)2(TayNb1?y)2O7, where 0?x?1.0 and 0?y?1.0; and (BaxSr1?x)2Bi2(TayNb1?y)2O10, where 0?x?1.0 and 0?y?1.0. Thin films according to the invention have a relative dielectric constant ?40, and preferably about 100. The value of Vcc in the metal oxides of the invention is close to zero.
    Type: Grant
    Filed: October 23, 2002
    Date of Patent: March 15, 2005
    Assignees: Symetrix Corporation, Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinichiro Hayashi, Vikram Joshi, Narayan Solayappan, Joseph D. Cuchiaro, Carlos A. Paz de Araujo
  • Patent number: 6847074
    Abstract: A semiconductor memory device according to the present invention includes a memory cell capacitor for storing data thereon. The capacitor is made up of a first electrode connected to a contact plug, a second electrode and a capacitive insulating film interposed between the first and second electrodes. The first electrode includes a first barrier film in contact with the contact plug and a second barrier film, which is formed on the first barrier film and prevents the diffusion of oxygen. The second barrier film covers the upper and side faces of the first barrier film.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: January 25, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihisa Nagano, Tooru Nasu, Shinichiro Hayashi, Eiji Fujii
  • Publication number: 20050006685
    Abstract: A semiconductor device has a capacitive element comprising a first conductive film formed on the bottom and wall surfaces of an opening formed in an insulating film on a substrate, a dielectric film formed on the first conductive film, and a second conductive film formed on the dielectric film. The dielectric film of the capacitive element is crystallized. The first and second conductive films are made of a polycrystal of an oxide, a nitride or an oxynitride of a noble metal.
    Type: Application
    Filed: July 8, 2004
    Publication date: January 13, 2005
    Inventors: Shinya Natsume, Shinichiro Hayashi
  • Publication number: 20050006684
    Abstract: A capacitive element includes a lower electrode having a three-dimensional shape, an upper electrode formed so as to be opposed to the lower electrode, and a capacitor insulating film formed between the lower and upper electrodes and made of a crystallized ferroelectric material. The thickness of the capacitor insulating film is set at 12.5 through 100 nm both inclusive.
    Type: Application
    Filed: August 12, 2004
    Publication date: January 13, 2005
    Inventors: Yoshihisa Nagano, Shinichiro Hayashi
  • Publication number: 20040266034
    Abstract: In a method for forming a ferroelectric film of insulating metal oxide on a surface of an electrode with a concave or a convex or in convex shape which is formed above a substrate, multiple types of source gases constituting a material gas and each containing an organometallic compound are introduced into a chamber and main components of the multiple types of source gases are allowed to chemically react with one another with the chemical reaction proceeding depending on the reaction rate. Then, the ferroelectric film is deposited on the surface of the electrode.
    Type: Application
    Filed: June 29, 2004
    Publication date: December 30, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Toshitaka Tatsunari, Shinichiro Hayashi
  • Patent number: 6830623
    Abstract: A plurality of liquids, the flow of each controlled by a volumetric flowrate controller, are mixed in a mixer to form a final precursor that is misted and then deposited on a substrate. A physical property of precursor liquid is adjusted by adjusting the volumetric flowrate controllers, so that when precursor is applied to substrate and treated, the resulting thin film of solid material has a smooth and planar surface. Typically the physical property is the viscosity of the precursor, which is selected to be relatively low, in the range of 1-2 centipoise.
    Type: Grant
    Filed: March 12, 2002
    Date of Patent: December 14, 2004
    Assignees: Symetrix Corporation, Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinichiro Hayashi, Larry D. McMillan, Carlos A. Paz de Araujo
  • Publication number: 20040177498
    Abstract: In a method of manufacturing an electronic device, an electronic component and a mount substrate are disposed such that one of surfaces of the electronic component faces toward one of surfaces of the mount substrate, and a connection electrode of the electronic component is electrically connected and mechanically bond to a patterned conductor of the mount substrate. A resin film is then disposed on the electronic component and the mount substrate. A gas captured in between the resin film and the electronic component is sucked through a hole provided in the mount substrate from a side of the mount substrate opposite to the electronic component. The resin film is thereby deformed to closely contact the electronic component and the mount substrate. The resin film is then heated and adhered to the mount substrate.
    Type: Application
    Filed: March 30, 2004
    Publication date: September 16, 2004
    Applicant: TDK CORPORATION
    Inventors: Bunji Moriya, Seiichi Tajima, Fumikachi Kurosawa, Shinichiro Hayashi
  • Publication number: 20040155279
    Abstract: A capacitor including a capacitor lower electrode, a capacitor dielectric film of a highly dielectric film or a ferroelectric film and a capacitor upper electrode is formed on a semiconductor substrate. A protection film is formed on the semiconductor substrate so as to cover the capacitor. A first TEOS film having a relatively large water content is formed on the protection film through first TEOS-O3 CVD where an ozone concentration is relatively low. A second TEOS-O3 film having a relatively small water content is formed on the first TEOS-O3 film through second TEOS-O3 CVD where the ozone concentration is relatively high.
    Type: Application
    Filed: February 3, 2004
    Publication date: August 12, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshie Kutsunai, Shinichiro Hayashi, Yuji Judai, Yoshihisa Nagano
  • Patent number: 6756621
    Abstract: The ferroelectric capacitor device includes a bottom electrode, a capacitor insulating film formed of a ferroelectric film, and a top electrode. The ferroelectric film has a bismuth layer structure including a plurality of bismuth oxide layers and a plurality of perovskite-like layers alternately put on top of each other. The plurality of bismuth oxide layers are formed of Bi2O2, and the plurality of perovskite-like layers include two or more kinds of layers represented by a general formula: Am−1BmO3m+&agr; (where A is a univalent, divalent or trivalent metal, B is a tetravalent, pentavalent or hexavalent metal, m is an integer equal to or more than 1, at least one of A being Bi if m is an integer of 2 or more, and 0≦&agr;≦1) and different in the value of m.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: June 29, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toru Nasu, Shinichiro Hayashi
  • Patent number: 6753566
    Abstract: An impurity diffusion layer serving as the source or the drain of a transistor is formed in a semiconductor substrate, and a protection insulating film is formed so as to cover the transistor. A capacitor lower electrode, a capacitor dielectric film of an oxide dielectric film and a capacitor upper electrode are successively formed on the protection insulating film. A plug for electrically connecting the impurity diffusion layer of the transistor to the capacitor lower electrode is buried in the protection insulating film. An oxygen barrier layer is formed between the plug and the capacitor lower electrode. The oxygen barrier layer is made from a composite nitride that is a mixture or an alloy of a first nitride having a conducting property and a second nitride having an insulating property.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: June 22, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshie Kutsunai, Shinichiro Hayashi, Takumi Mikawa, Yuji Judai
  • Publication number: 20040104414
    Abstract: The ferroelectric capacitor device includes a bottom electrode, a capacitor insulating film formed of a ferroelectric film, and a top electrode. The ferroelectric film has a bismuth layer structure including a plurality of bismuth oxide layers and a plurality of perovskite-like layers alternately put on top of each other. The plurality of bismuth oxide layers are formed of Bi2O2, and the plurality of perovskite-like layers include two or more kinds of layers represented by a general formula: Am−1BmO3m+&agr; (where A is a univalent, divalent or trivalent metal, B is a tetravalent, pentavalent or hexavalent metal, m is an integer equal to or more than 1, at least one of A being Bi if m is an integer of 2 or more, and 0<&agr;<1) and different in the value of m.
    Type: Application
    Filed: December 30, 2002
    Publication date: June 3, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Toru Nasu, Shinichiro Hayashi
  • Patent number: 6737697
    Abstract: A capacitor including a capacitor lower electrode, a capacitor dielectric film of a highly dielectric film or a ferroelectric film and a capacitor upper electrode is formed on a semiconductor substrate. A protection film is formed on the semiconductor substrate so as to cover the capacitor. A first TEOS film having a relatively large water content is formed on the protection film through first TEOS-O3 CVD where an ozone concentration is relatively low. A second TEOS-O3 film having a relatively small water content is formed on the first TEOS-O3 film through second TEOS-O3 CVD where the ozone concentration is relatively high.
    Type: Grant
    Filed: February 9, 2001
    Date of Patent: May 18, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshie Kutsunai, Shinichiro Hayashi, Yuji Judai, Yoshihisa Nagano
  • Patent number: 6723637
    Abstract: An impurity diffusion layer serving as the source or the drain of a transistor is formed in a semiconductor substrate, and a protection insulating film is formed so as to cover the transistor. A capacitor lower electrode, a capacitor dielectric film of an oxide dielectric film and a capacitor upper electrode are successively formed on the protection insulating film. A plug for electrically connecting the impurity diffusion layer of the transistor to the capacitor lower electrode is buried in the protection insulating film. An oxygen barrier layer is formed between the plug and the capacitor lower electrode. The oxygen barrier layer is made from a composite nitride that is a mixture or an alloy of a first nitride having a conducting property and a second nitride having an insulating property.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: April 20, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshie Kutsunai, Shinichiro Hayashi, Takumi Mikawa, Yuji Judai
  • Publication number: 20040004793
    Abstract: A capacitor is formed on an interlayer insulating film formed on a semiconductor substrate. The capacitor includes a bottom electrode made of platinum, a capacitor insulating film made of SrTaBiO (SBT) containing an element absorbing hydrogen such as titanium, for example, in grain boundaries, inter-lattice positions or holes, and a top electrode made of platinum.
    Type: Application
    Filed: June 27, 2003
    Publication date: January 8, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Takumi Mikawa, Yuji Judai, Shinichiro Hayashi
  • Patent number: 6653156
    Abstract: A ferroelectric device includes a ferroelectric layer and an electrode. The ferroelectric material is made of a perovskite or a layered superlattice material. A superlattice generator metal oxide is deposited as a capping layer between said ferroelectric layer and said electrode to improve the residual polarization capacity of the ferroelectric layer.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: November 25, 2003
    Assignees: Symetrix Corporation, Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinichiro Hayashi, Tatsuo Otsuki, Carlos A. Paz de Araujo
  • Publication number: 20030207535
    Abstract: An impurity diffusion layer serving as the source or the drain of a transistor is formed in a semiconductor substrate, and a protection insulating film is formed so as to cover the transistor. A capacitor lower electrode, a capacitor dielectric film of an oxide dielectric film and a capacitor upper electrode are successively formed on the protection insulating film. A plug for electrically connecting the impurity diffusion layer of the transistor to the capacitor lower electrode is buried in the protection insulating film. An oxygen barrier layer is formed between the plug and the capacitor lower electrode. The oxygen barrier layer is made from a composite nitride that is a mixture or an alloy of a first nitride having a conducting property and a second nitride having an insulating property.
    Type: Application
    Filed: May 20, 2003
    Publication date: November 6, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshie Kutsunai, Shinichiro Hayashi, Takumi Mikawa, Yuji Judai
  • Patent number: RE38565
    Abstract: A ferroelectric thin film capacitor has smooth electrodes permitting comparatively stronger polarization, less fatigue, and less imprint, as the ferroelectric capacitor ages. The smooth electrode surfaces are produced by carefully controlled drying, soft baking, and annealing conditions.
    Type: Grant
    Filed: February 6, 2003
    Date of Patent: August 17, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinichiro Hayashi, Tatsuo Otsuki