Patents by Inventor Shinji Maekawa

Shinji Maekawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120270413
    Abstract: The present invention provides a method for forming by plasma CVD a silicon nitride film that can be formed over heat-sensitive elements as well as an electroluminescent element and that has favorable barrier characteristics. Further, the present invention also provides a semiconductor device, a display device and a light-emitting display device formed by using the silicon nitride film. In the method for forming a silicon nitride film by plasma CVD, silane (SiH4), nitrogen (N2) and a rare gas are introduced into a deposition chamber in depositing, and the reaction pressure is within the range from 0.01 Torr to 0.1 Torr.
    Type: Application
    Filed: July 2, 2012
    Publication date: October 25, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shinji Maekawa, Tetsuya Kakehata, Yuuichi Takehara
  • Patent number: 8293457
    Abstract: The invention provides a manufacturing method of a substrate having a film pattern including an insulating film, a semiconductor film, a conductive film and the like by simple steps, and also a manufacturing method of a semiconductor device which is low in cost with high throughput and yield. According to the invention, after forming a first protective film which has low wettability on a substrate, a material which has high wettability is applied or discharged on an outer edge of a first mask pattern, thereby a film pattern and a substrate having the film pattern are formed.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: October 23, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinji Maekawa, Gen Fujii, Hiroko Shiroguchi, Masafumi Morisue
  • Publication number: 20120261661
    Abstract: The present invention provides a manufacturing process using a droplet-discharging method that is suitable for manufacturing a large substrate in mass production. A photosensitive material solution of a conductive film is selectively discharged by a droplet-discharging method, selectively exposed to laser light, and developed or etched, thereby allowing only the region exposed to laser light to be left and realizing a source wiring and a drain wiring having a more microscopic pattern than the pattern itself formed by discharging. One feature of the source wiring and the drain wiring is that the source wiring and the drain wiring cross an island-like semiconductor layer and overlap it.
    Type: Application
    Filed: June 25, 2012
    Publication date: October 18, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shinji Maekawa, Hideaki Kuwabara
  • Patent number: 8288772
    Abstract: To provide a through hole electrode substrate and a semiconductor device which uses the through hole electrode substrate which have improved electrical properties in a conductive part which passes through the front and back of a substrate, a through hole electrode substrate 100 of the invention comprises a substrate 102 having a through hole 104 which passes through the front and back of the substrate 102, and a conductive part 106 including a metal material which is filled into the through hole 104, the conductive part 106 including at least a metal material having an area weighted average crystal grain diameter of 13 ?m or more. The conduction part 106 also includes a metal material having a crystal grain diameter of 29 ?m or more.
    Type: Grant
    Filed: August 12, 2010
    Date of Patent: October 16, 2012
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Shinji Maekawa, Miyuki Suzuki
  • Patent number: 8283216
    Abstract: As a substrate gets larger, time of manufacture is increased due to the repetition of film formations and etchings; waste disposal costs of etchant and the like are increased; and material efficiency is significantly reduced. A base film for improving adhesion between a substrate and a material layer formed by a droplet discharge method is formed in the invention. Further, a manufacturing method of a liquid crystal display device according to the invention includes at least one step for forming the following patterns required for manufacturing a liquid crystal display device without using a photomask: a pattern of a material layer typified by a wiring (or an electrode) pattern, an insulating layer pattern; or a mask pattern for forming another pattern.
    Type: Grant
    Filed: May 5, 2011
    Date of Patent: October 9, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Shinji Maekawa, Gen Fujii, Hideaki Kuwabara
  • Patent number: 8278204
    Abstract: It is required that a line width of a wiring is prevented from being wider to be miniaturized when the wiring or the like is formed by a dropping method typified by an ink-jetting method. The invention provides a method for narrowing (miniaturizing) a line width according to a method different from a conventional method. One feature of the invention is that a plasma treatment is performed before forming a wiring or the like by a dropping method typified by an ink-jetting method. As the result of the plasma treatment, a surface for forming a conductive film is modified to be liquid-repellent. Consequently, a wiring or the like formed by a dropping method can be miniaturized.
    Type: Grant
    Filed: January 24, 2011
    Date of Patent: October 2, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinji Maekawa, Koji Muranaka
  • Patent number: 8263983
    Abstract: The present invention provides a thin wiring pattern such as wiring formed by discharging a droplet. In the present invention, a porous (including microporous) substance is formed as a base film in forming pattern by using a droplet discharge method (also referred to as an ink-jetting method). One feature of a wiring substrate according to the present invention provides a porous film and a conductive layer thereon. One feature of a semiconductor device of the present invention provides a thin film transistor in which a gate electrode is formed by the conductive layer having the above-described structure.
    Type: Grant
    Filed: October 27, 2004
    Date of Patent: September 11, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinji Maekawa, Yasuyuki Arai
  • Publication number: 20120211737
    Abstract: In view of the problem that an organic semiconductor layer of an organic TFT is likely to deteriorate due to water, light, oxygen, or the like, it is an object of the present invention to simplify a manufacturing step and to provide a method for manufacturing a semiconductor device having an organic TFT with high reliability. According to the invention, a semiconductor layer containing an organic material is formed by patterning using a mask, and thus an organic TFT is completed in the state where the mask is not removed but to remain over the semiconductor: layer. In addition, a semiconductor layer can be protected from deterioration due to water, light, oxygen, or the like by using the remaining mask.
    Type: Application
    Filed: May 3, 2012
    Publication date: August 23, 2012
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shinji MAEKAWA
  • Patent number: 8247814
    Abstract: The present invention provides a manufacturing process using a droplet-discharging method that is suitable for manufacturing a large substrate in mass production. A photosensitive material solution of a conductive film is selectively discharged by a droplet-discharging method, selectively exposed to laser light, and developed or etched, thereby allowing only the region exposed to laser light to be left and realizing a source wiring and a drain wiring having a more microscopic pattern than the pattern itself formed by discharging. One feature of the source wiring and the drain wiring is that the source wiring and the drain wiring cross an island-like semiconductor layer and overlap it.
    Type: Grant
    Filed: May 9, 2011
    Date of Patent: August 21, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinji Maekawa, Hideaki Kuwabara
  • Patent number: 8247965
    Abstract: An object of the invention is to provide a display device which can be manufactured with usability of a material improved and with a manufacturing step simplified and to provide a manufacturing technique thereof. One feature of a light emitting display device of the present invention is to comprise a gate electrode formed over a substrate having an insulating surface with a substance having a photocatalytic function therebetween, a gate insulating layer formed over the gate electrode, a semiconductor layer and a first electrode formed over the gate insulating layer, a wiring layer formed over the semiconductor layer, a partition wall covering an edge portion of the first electrode and the wiring layer, an electroluminescent layer over the first electrode, and a second electrode over the electroluminescent layer, wherein the wiring layer covers the edge portion of the first electrode.
    Type: Grant
    Filed: November 5, 2004
    Date of Patent: August 21, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Shinji Maekawa, Osamu Nakamura
  • Publication number: 20120200903
    Abstract: A piezoelectric mirror device (11) comprises a frame portion (12) having a centrally located opening (13), a mirror portion (14) positioned at the opening (13), a pair of mirror support portions (15) adapted to support the mirror portion (14) rotatably relative the frame portion (12) and a pair of drive portions (16) that is a multilayer structure of lower electrodes (17), piezoelectric element (18) and an upper electrode (19). The mirror support portions (15) are formed of a material having a Young's modulus of up to 160 GPa, and the frame portion (12) includes a cutout (13a) at a part of a site wherein there are the drive portions (16) positioned. The cutout (13a) is in contact with the opening (13).
    Type: Application
    Filed: April 12, 2012
    Publication date: August 9, 2012
    Applicant: DAI NIPPON PRINTING CO., LTD
    Inventor: Shinji MAEKAWA
  • Publication number: 20120199573
    Abstract: A substrate mounting mechanism on which a target substrate is placed is provided. The substrate mounting mechanism includes a heater plate, which has a substrate mounting surface on which the target substrate is placed and has a heater embedded therein to heat the substrate to a deposition temperature at which a film is deposited. The substrate mounting mechanism also includes a temperature control jacket, which is formed to cover at least a surface of the heater plate other than the substrate mounting surface and adjusts the temperature to a non-deposition temperature below the deposition temperature.
    Type: Application
    Filed: April 20, 2012
    Publication date: August 9, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masamichi HARA, Atsushi GOMI, Shinji MAEKAWA, Satoshi TAGA, Kaoru YAMAMOTO
  • Patent number: 8227294
    Abstract: In view of the problem that an organic semiconductor layer of an organic TFT is likely to deteriorate due to water, light, oxygen, or the like, it is an object of the present invention to simplify a manufacturing step and to provide a method for manufacturing a semiconductor device having an organic TFT with high reliability. According to the invention, a semiconductor layer containing an organic material is formed by patterning using a mask, and thus an organic TFT is completed in the state where the mask is not removed but to remain over the semiconductor layer. In addition, a semiconductor layer can be protected from deterioration due to water, light, oxygen, or the like by using the remaining mask.
    Type: Grant
    Filed: April 16, 2010
    Date of Patent: July 24, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shinji Maekawa
  • Patent number: 8227805
    Abstract: The present invention provides a method for forming by plasma CVD a silicon nitride film that can be formed over heat-sensitive elements as well as an electroluminescent element and that has favorable barrier characteristics. Further, the present invention also provides a semiconductor device, a display device and a light-emitting display device formed by using the silicon nitride film. In the method for forming a silicon nitride film by plasma CVD, silane (SiH4), nitrogen (N2) and a rare gas are introduced into a deposition chamber in depositing, and the reaction pressure is within the range from 0.01 Torr to 0.1 Torr.
    Type: Grant
    Filed: July 5, 2007
    Date of Patent: July 24, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinji Maekawa, Tetsuya Kakehata, Yuuichi Takehara
  • Patent number: 8228453
    Abstract: As a wiring becomes thicker, discontinuity of an insulating film covering the wiring has become a problem. It is difficult to form a wiring with width thin enough for a thin film transistor used for a current high definition display device. As a wiring is made thinner, signal delay due to wiring resistance has become a problem. In view of the above problems, the invention provides a structure in which a conductive film is formed in a hole of an insulating film, and the surfaces of the conductive film and the insulating film are flat. As a result, discontinuity of thin films covering a conductive film and an insulating film can be prevented. A wiring can be made thinner by controlling the width of the hole. Further, a wiring can be made thicker by controlling the depth of the hole.
    Type: Grant
    Filed: January 5, 2011
    Date of Patent: July 24, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Shinji Maekawa, Yohei Kanno
  • Patent number: 8228277
    Abstract: The invention provides an active matrix EL display device which can perform a clear multi-gray scale color display. In particular, the invention provides a large active matrix EL display device at low cost by a manufacturing method which can selectively form a pattern. Power supply lines in a pixel portion are arranged in matrix by the manufacturing method which can selectively form a pattern. Further, capacitance between wirings is reduced by providing a longer distance between adjacent wirings by the manufacturing method which can selectively form a pattern.
    Type: Grant
    Filed: November 10, 2011
    Date of Patent: July 24, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasunori Yoshida, Hajime Kimura, Shinji Maekawa, Osamu Nakamura, Shunpei Yamazaki
  • Patent number: 8207533
    Abstract: The present invention provides a manufacturing process using a droplet-discharging method that is suitable for manufacturing a large substrate in mass production. A photosensitive material solution of a conductive film is selectively discharged by a droplet-discharging method, selectively exposed to laser light, and developed or etched, thereby allowing only the region exposed to laser light to be left and realizing a source wiring and a drain wiring having a more microscopic pattern than the pattern itself formed by discharging. One feature of the source wiring and the drain wiring is that the source wiring and the drain wiring cross an island-like semiconductor layer and overlap it.
    Type: Grant
    Filed: December 4, 2008
    Date of Patent: June 26, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinji Maekawa, Hideaki Kuwabara
  • Publication number: 20120115283
    Abstract: The present invention provides a thin wiring pattern such as wiring formed by discharging a droplet. In the present invention, a porous (including microporous) substance is formed as a base film in forming pattern by using a droplet discharge method (also referred to as an ink-jetting method). One feature of a wiring substrate according to the present invention provides a porous film and a conductive layer thereon. One feature of a semiconductor device of the present invention provides a thin film transistor in which a gate electrode is formed by the conductive layer having the above-described structure.
    Type: Application
    Filed: January 13, 2012
    Publication date: May 10, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shinji MAEKAWA, Yasuyuki Arai
  • Patent number: 8132458
    Abstract: An acceleration sensor having a high impact resistance to prevent breakage under excessive acceleration, but can stably exert a sensing performance. The acceleration sensor is formed of an SOI substrate of a three-layered structure including a silicon layer (active layer silicon), a silicon oxide layer, and a silicon layer (substrate silicon). The acceleration sensor includes frame parts, a plurality of beam parts, the beam parts projecting inward from the frame part, and a weight part supported by the beam parts. A strain sensing part is provided on each of the beam parts. A width W of each of the beam parts, a length I of each of the beam parts, and an inner frame length L of the frame part satisfy the following relationships of Expressions (1) and (2). 2<L/I?2.82??Expression (1) I/W?3.
    Type: Grant
    Filed: April 15, 2009
    Date of Patent: March 13, 2012
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventor: Shinji Maekawa
  • Publication number: 20120056550
    Abstract: The invention provides an active matrix EL display device which can perform a clear multi-gray scale color display. In particular, the invention provides a large active matrix EL display device at low cost by a manufacturing method which can selectively form a pattern. Power supply lines in a pixel portion are arranged in matrix by the manufacturing method which can selectively form a pattern. Further, capacitance between wirings is reduced by providing a longer distance between adjacent wirings by the manufacturing method which can selectively form a pattern.
    Type: Application
    Filed: November 10, 2011
    Publication date: March 8, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO.,LTD.
    Inventors: Yasunori YOSHIDA, Hajime Kimura, Shinji Maekawa, Osamu Nakamura, Shunpei Yamazaki