Patents by Inventor Shinya Sato

Shinya Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100192547
    Abstract: The invention has an object of exerting favorable NOx reducing effects even at an exhaust temperature lower than in the prior art without trouble, e.g., at startup after long-term engine rest and is directed to an exhaust emission control device wherein a selective reduction catalyst 5 capable of selectively reacting NOx with ammonia even in the presence of oxygen is incorporated in an exhaust pipe 4, urea water 6 as reducing agent being added in the pipe 4 upstream of the reduction catalyst 5 to depurate NOx through reduction.
    Type: Application
    Filed: July 4, 2008
    Publication date: August 5, 2010
    Applicants: HINO MOTORS, LTD., TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Masahiko Yabe, Haruyuki Yokota, Takaharu Shimizu, Hiroyuki Ninomiya, Shinya Sato, Takahiko Hayashi, Shunsuke Toshioka, Satoshi Watanabe, Tomihisa Oda, Yutaka Tanai
  • Patent number: 7765800
    Abstract: Excessive generation NO2 by oxidation catalyst arrangement upstream of a selective reduction catalyst is suppressed to prevent falling of NOx reduction rate. A selective reduction catalyst 4 capable of selectively reacting NOx with ammonia even in the presence of oxygen is incorporated in an exhaust pipe 3 from an engine 1. A pair of oxidation catalysts 5A and 5B are arranged in parallel with each other and upstream of the selective reduction catalyst. In an operation condition with low exhaust temperature, amounts of the exhaust gas 2 distributed to the oxidation catalysts 5A and 5B are adjusted so as to make NO/NO2 ratio in the exhaust gas 2 to about 1-1.5.
    Type: Grant
    Filed: August 22, 2005
    Date of Patent: August 3, 2010
    Assignee: Hino Motors, Ltd.
    Inventors: Ichiro Tsumagari, Takatoshi Furukawa, Yoshihide Takenaka, Koichi Machida, Shinya Sato
  • Publication number: 20100133678
    Abstract: A semiconductor device includes: a plurality of semiconductor substrates that are layered; a through electrode penetrating through a predetermined semiconductor substrate of the semiconductor substrates and electrically connected with an external terminal of the semiconductor device; a circuit element provided on the predetermined semiconductor substrate; and an electrostatic discharge protection circuit also provided on the predetermined semiconductor substrate. In the device, wiring resistance between the electrostatic discharge protection circuit and the through electrode is smaller than wiring resistance between the circuit element and the through electrode.
    Type: Application
    Filed: November 30, 2009
    Publication date: June 3, 2010
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Takayuki SAIKI, Shinya SATO, Hiroyuki TAKAMIYA
  • Publication number: 20100133701
    Abstract: A semiconductor device includes: a plurality of external terminals; a plurality of semiconductor substrates that are layered; a through electrode penetrating through at least one of the semiconductor substrates and electrically connected with any of the external terminals; and a plurality of electrostatic discharge protection circuits provided on any one of the semiconductor substrates. In the device, the through electrode is electrically connected with the plurality of electrostatic discharge protection circuits.
    Type: Application
    Filed: November 30, 2009
    Publication date: June 3, 2010
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Takayuki SAIKI, Shinya SATO, Hiroyuki TAKAMIYA
  • Patent number: 7679372
    Abstract: A driver for supplying a test signal to a device under test is shared by a plurality of terminals. In this way, the cost and time required for the test of the device under test can be reduced. A testing apparatus 10 relating to the present invention includes a test signal generating section 130 that generates a test signal to be supplied to a device under test 20, a driver 140 that outputs the test signal, a switch 150 that is disposed on a wire between the driver 140 and a first terminal of the device under test 20, a switch 160 that is disposed on a wire between the driver 140 and a second terminal of the device under test 20, and a connection control section 100 that (i) turns on the switch 150 and turns off the switch 160 when the test signal is supplied to the first terminal of the device under test 20, and (ii) turns off the switch 150 and turns on the switch 160 when the test signal is supplied to the second terminal of the device under test 20.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: March 16, 2010
    Assignee: Advantest Corporation
    Inventors: Yasushi Kurihara, Shinya Sato
  • Publication number: 20100046563
    Abstract: A multibeam laser diode capable of improving heat release characteristics in the case of junction-down assembly is provided. Contact electrodes are provided respectively for protruding streaks of a laser diode device, and pad electrodes are provided to avoid the protruding streaks and the contact electrodes. The contact electrodes and the pad electrodes are connected by wiring electrodes, and the contact electrodes are covered with a first insulating film. Thereby, electric connection is enabled without straightly jointing the contact electrodes to a solder layer. A heat conduction layer configured of a metal is provided on the first insulating film, the heat conduction layer is jointed to the solder layer, and thereby the heat release characteristics are able to be improved even in the case of junction-down assembly.
    Type: Application
    Filed: July 16, 2009
    Publication date: February 25, 2010
    Applicant: Sony Corporation
    Inventor: Shinya Sato
  • Patent number: 7661043
    Abstract: A test apparatus includes a pattern memory for storing a test pattern to be inputted to a memory-under-test, an address generating section for sequentially outputting addresses of the memory-under-test into which the test pattern is to be written, a pointer section for sequentially pointing each address of the pattern memory to cause the pattern memory to output the test pattern in synchronism with the address of the memory-under-test outputted out of the address generating section, a bad block memory for storing an address of a bad block of the memory-under-test in advance and a pointer control section for causing the address generating section to output a next address of the memory-under-test while holding the address of the pattern memory outputted out of the pointer section when the address of the memory-under-test generated by the address generating section coincides with any one of addresses stored in the bad block memory.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: February 9, 2010
    Assignee: Advantest Corporation
    Inventor: Shinya Sato
  • Publication number: 20100007988
    Abstract: A magnetic recording medium includes a nonmagnetic granular layer that has a granular structure in which a plurality of nonmagnetic grains made of a nonmagnetic material are separated from one another by a Cr oxide. The magnetic recording medium further includes a magnetic granular layer that is formed on the nonmagnetic granular layer and has a granular structure in which a plurality of magnetic grains made of a magnetic material are separated from one another by a nonmagnetic material.
    Type: Application
    Filed: July 6, 2009
    Publication date: January 14, 2010
    Applicant: SHOWA DENKO K.K.
    Inventors: Satoshi Igarashi, Tohru Horie, Ryo Kurita, Isatake Kaitsu, Akira Kikuchi, Shinya Sato
  • Publication number: 20100008170
    Abstract: The disclosure concerns a semiconductor tester for testing a memory under test. The semiconductor tester comprises a pattern generator generating address information on the pages and generating a test pattern; a waveform shaper shaping the test pattern and outputting a test signal based on the shaped test pattern to the memory cells in the page identified by the address information; a comparator comparing a result signal output from the memory under test receiving the test signal with an expectation value; and a bad block memory storing information on a bad block in the memory under test in advance, when the page identified by the address information is included in the bad block, the bad block memory outputting a bad signal used to skip from the address information on the page included in the bad block to the address information on the page included in a next block under test.
    Type: Application
    Filed: April 20, 2007
    Publication date: January 14, 2010
    Inventors: Shinya Sato, Makoto Tabata
  • Publication number: 20090327822
    Abstract: Provided is a test apparatus having a bad block memory for storing a plurality of pieces of fail information in association with blocks of a memory under test, each piece of fail information indicating whether there is a defect in the associated block. The test apparatus writes a test data sequence to a page under test of the memory under test, reads the test data sequence written to the page under test, and compares the read data sequence to the written data sequence. The test apparatus includes an allocation register that stores allocation information for setting which of the plurality of fail conditions for judging whether there is a defect in the page under test are allocated to the plurality of pieces of fail information.
    Type: Application
    Filed: June 18, 2009
    Publication date: December 31, 2009
    Applicant: ADVANTEST CORPORATION
    Inventors: Satoshi KAMEDA, Masaru DOI, Shinya SATO
  • Publication number: 20090280024
    Abstract: The invention intends to provide a material that exhibits excellent corrosion resistance to supercritical ammonia and is suitable for a supercritical ammonia reactor. An Ni-based corrosion resistant alloy includes from 15% or more to 50% or less by mass of Cr and any one or both of Mo and W, wherein a [(content of Mo)+0.5×(content of W)] is from 1.5% or more to 8.5% or less by mass, a value of 1.8×[% content of Cr]/{[% content of Mo]+0.5×[% content of W]} is from 3.0 or more to 70.0 or less and the balance is Ni and an unavoidable impurity. Preferably, content of Fe is less than 3% by mass, and content of C is less than 0.05% by mass. The alloy is used to configure a supercritical ammonia reactor or the material is coated on a surface that contacts with a supercritical ammonia fluid. The alloy exhibits excellent corrosion resistance to supercritical ammonia and a mineralizer added the supercritical ammonia.
    Type: Application
    Filed: August 22, 2006
    Publication date: November 12, 2009
    Applicant: Solvolthermal Crystal Growth Technology Research Alliance
    Inventors: Yoshihiko Yamamura, Shinya Sato, Shinichi Nishiya
  • Publication number: 20090244411
    Abstract: A liquid crystal optical element having a crystal liquid optical element adapted to positively function as a diffraction element and an optical pickup apparatus including the liquid crystal optical element are disclosed. A transparent electrode having a diffraction pattern is arranged on one of a pair of transparent substrates. A liquid crystal panel has a transparent opposed electrode arranged on the other one of the pair of the transparent substrates. A driving unit generates a phase difference distribution in the liquid crystal layer by generating a potential difference between the transparent electrode and the transparent opposed electrode and causes the liquid crystal panel to function as a diffraction element for diffracting the incoming light beam transmitted therethrough. The diffraction pattern or the transparent opposed electrode is divided into a plurality of regions. The driving unit adjusts the potential difference for each of the regions.
    Type: Application
    Filed: March 27, 2009
    Publication date: October 1, 2009
    Inventors: Yoshiharu TAKANE, Shinya SATO, Nobuhiro SATO
  • Patent number: 7576345
    Abstract: The semiconductor relay comprises: an insulated type DC/DC power supply 10 having the input terminal and the output terminal insulated from each other; a pulse transformer 20 having the input terminal and the output terminal insulated from each other; an analog switch 30 which turns on and off the circuit in accordance with a state of an input signal; and a MOSFET circuit 40 which turns on and off a high voltage to a load 50. When a pulse signal is outputted from a pulse signal source 28, the pulse signal is outputted from the pulse transformer 20, and a state of the analog switch 30 is switched, a supply voltage is outputted from the output terminal of the analog switch 30, both the MOSFETs 42, 44 of the MOSFET circuit conduct, and a high AC voltage is applied to a load 50 from an AC power supply 52.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: August 18, 2009
    Assignee: Advantest Corp.
    Inventors: Shinya Sato, legal representative, Tadaaki Sato, Nobuhiro Sato
  • Patent number: 7571711
    Abstract: When a throttle is fully open, a maximum torque set value is corrected based on the ratio between the maximum air volume set value under fully-open throttle conditions and the actual maximum air volume detected by an intake air volume meter such as an air flow sensor. Based on the corrected maximum torque set value, both the relation between the degree of accelerator opening and target torque and the relation between the target torque (target air volume) and the degree target throttle opening are corrected.
    Type: Grant
    Filed: August 13, 2004
    Date of Patent: August 11, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Shinya Sato, Shinji Nakagawa, Hiromu Kakuya, Toshimichi Minowa, Mamoru Nemoto
  • Publication number: 20090183985
    Abstract: One aspect of the embodiments utilizes, according to an aspect of the invention, a method of manufacturing a magnetic recording medium, which includes an intermediate layer and a granular magnetic layer as a recording layer sequentially formed on a non-magnetic substrate, includes the steps of forming the intermediate layer and forming the granular magnetic layer. The granular magnetic layer includes a plurality of magnetic particles made of a Co alloy and an oxide magnetically separating the plurality of magnetic particles by a sputtering method using a target. The target includes a Co alloy, one or more first oxides selected from a group of oxides of Si, Ti, Ta, Cr, W, and Nb, and a second oxide composed of a Co oxide.
    Type: Application
    Filed: January 16, 2009
    Publication date: July 23, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Yuki YOSHIDA, Hideaki TAKAHOSHI, Shinya SATO, Isatake KAITSU, Akira KIKUCHI, Jun TAGUCHI, Ryo KURITA
  • Publication number: 20090167965
    Abstract: The present invention is directed to the provision of an optical pickup apparatus in which a liquid crystal optical element constructed by combining an aberration correcting liquid crystal panel and an n?/4 liquid crystal panel in an integral fashion is mounted in a tilted position.
    Type: Application
    Filed: February 16, 2007
    Publication date: July 2, 2009
    Inventors: Shuji Naka, Shinya Sato
  • Publication number: 20090145114
    Abstract: Even in a vehicle with travel pattern of continuing operational status with low exhaust temperature, a satisfactory NOx reduction effect can be attained even at exhaust temperature lower than that required conventionally therefor. In an exhaust emission control device with selective reduction catalyst 10 incorporated in an exhaust pipe 9, ammonia being added upstream of the catalyst 10 for reduction and purification of NOx, the device comprises an ammonia generator 12 with a vessel 15 for holding urea water 23a and with an electrode 16 for generation of ammonia 13a, 13b through action of plasma on the urea water 23a in the vessel, the ammonia 13a, 13b generated in the generator 12 being fed upstream of the catalyst 10.
    Type: Application
    Filed: November 17, 2005
    Publication date: June 11, 2009
    Applicant: HINO MOTORS LTD.
    Inventors: Shinya Sato, Takatoshi Furukawa
  • Publication number: 20090142624
    Abstract: A method of producing a magnetic recording medium produces a medium having a magnetic recording layer disposed above a nonmagnetic intermediate layer, The nonmagnetic intermediate layer is formed by a sputtering using a target made of an oxide material. Oxygen gas or carbon dioxide gas is supplied during the sputtering in order to suppress a state where an oxygen supply becomes insufficient due to separation of oxygen atoms from the oxide material at a time of plasma generation.
    Type: Application
    Filed: November 29, 2008
    Publication date: June 4, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Hideaki TAKAHOSHI, Hisato Shibata, Shinya Sato, Isatake Kaitsu, Akira Kikuchi
  • Publication number: 20090109579
    Abstract: A magnetic recording medium has a substrate, a first granular layer formed on the substrate, the first granular layer having a plurality of a first magnetic grains and a first oxide for separating the plurality of first magnetic grains from one another. A non-magnetic layer is formed on the first granular layer. The second granular layer is formed on the non-magnetic layer which has a plurality of second magnetic grains and a second oxide for separating the plurality of second magnetic grains from one another. The anisotropic magnetic field of the first granular layer is more intensive than that of the second granular layer.
    Type: Application
    Filed: August 26, 2008
    Publication date: April 30, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Hideaki Takahoshi, Hisato Shibata, Shinya Sato, Isatake Kaitsu, Akira Kikuchi
  • Publication number: 20090110961
    Abstract: A magnetic recording medium used for a hard disc drive and the like, a method of manufacturing the same, and a magnetic storage device. The magnetic recording medium that includes a substrate, a first ferromagnetic layer formed on the substrate, a non-magnetic layer formed on the first ferromagnetic layer and including a ferromagnetic element and a second ferromagnetic layer formed on the non-magnetic layer, wherein the first ferromagnetic layer and the second ferromagnetic layer are magnetically coupled through the non-magnetic layer.
    Type: Application
    Filed: October 29, 2008
    Publication date: April 30, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Hisato Shibata, Hideaki Takahoshi, Shinya Sato, Isatake Kaitsu, Akira Kikuchi