Patents by Inventor Shizunori Matsumoto

Shizunori Matsumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160204160
    Abstract: A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.
    Type: Application
    Filed: March 24, 2016
    Publication date: July 14, 2016
    Inventors: Kazuichiro Itonaga, Shizunori Matsumoto
  • Patent number: 9357148
    Abstract: A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: May 31, 2016
    Assignee: Sony Corporation
    Inventors: Kazuichiro Itonaga, Shizunori Matsumoto
  • Publication number: 20160006969
    Abstract: Provided is a solid-state imaging device including: a pixel section configured to include a plurality of pixels arranged in a matrix form, the plurality of pixels performing photoelectric conversion; column signal lines configured to transmit pixel signals output from the pixels in units of columns; an AD converting section configured to include a comparator that compares a reference signal serving as a ramp wave with the pixel signals transmitted via the column signal line and convert a reference level and a signal level of the pixel signals into digital signals independently based on a comparison result of the comparator; a switch configured to be connected with the column signal lines; and a control section configured to turn on the switch only during a certain period of time in a period of time in which the comparator is reset and cause the column signal lines to be short-circuited.
    Type: Application
    Filed: February 17, 2014
    Publication date: January 7, 2016
    Inventor: Shizunori MATSUMOTO
  • Publication number: 20160006970
    Abstract: A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.
    Type: Application
    Filed: September 17, 2015
    Publication date: January 7, 2016
    Inventors: Kazuichiro Itonaga, Shizunori Matsumoto
  • Patent number: 9179082
    Abstract: A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: November 3, 2015
    Assignee: SONY CORPORATION
    Inventors: Kazuichiro Itonaga, Shizunori Matsumoto
  • Patent number: 9123620
    Abstract: A solid-state image capture device includes unit pixels including transfer gates that transfer charges to diffusion layers, the charges being obtained by photoelectric conversion performed by photoelectric converting sections; signal lines to which signals output from the unit pixels are read out: current sources connected to the signal lines; and a driver that electrically cuts off connections between the unit pixels and the signal lines and the signal lines and the current sources in a transfer period of the transfer gates.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: September 1, 2015
    Assignee: SONY CORPORATION
    Inventors: Haruhisa Naganokawa, Shizunori Matsumoto
  • Patent number: 9118855
    Abstract: A solid-state imaging device includes a pixel array section that includes a light-blocked pixel portion, and an effective pixel portion, and a signal process circuit that processes a pixel signal output from each pixel of the pixel array section. The signal processing circuit calculates, as held data, a row statistic obtained by performing a statistical process on pixel signals of the light-blocked pixel portion in the unit of rows, holds the held data items of a plurality of rows including a process target row of the pixel array section, randomly selects one of the held data items of a plurality of rows, and subtracts the randomly selected held data item from a pixel signal of the pixel of the process target row in the effective pixel portion.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: August 25, 2015
    Assignee: Sony Corporation
    Inventor: Shizunori Matsumoto
  • Publication number: 20150237285
    Abstract: A solid-state imaging device that outputs a pixel signal having a signal level corresponding to charges generated by a photoelectric conversion includes a comparator. The comparator has a first amplifying unit with first and second transistors configured as a differential pair and provides a signal output by amplifying a difference of signals input to the gate electrodes of the first and second transistors. It also has a second amplifying unit that amplifies the signal output, a first condenser disposed between the gate electrode of the first transistor and a reference signal supply, a second condenser disposed between the gate electrode of the second transistor and pixel signal wiring that reads out the pixel signal, and a switching circuit that connects the reference signal supply to the pixel signal wiring.
    Type: Application
    Filed: April 29, 2015
    Publication date: August 20, 2015
    Inventors: Hideki Tanaka, Shizunori Matsumoto, Haruhisa Naganokawa, Yuuichi Kaji
  • Patent number: 9113100
    Abstract: Disclosed is a solid-state imaging device including a pixel array, a pixel signal generation part, and a control part. The pixel signal generation part includes a comparator and a counter. In a case where an enable signal is supplied from the control part, a count value of the counter in a D-phase period where a signal level is detected is set as a limit value regardless of an output of the comparator when a count value of the counter in a P-phase period where a reset level is detected is a limit value.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: August 18, 2015
    Assignee: Sony Corporation
    Inventors: Masaki Odahara, Takaki Watanabe, Shizunori Matsumoto
  • Patent number: 9049392
    Abstract: A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: June 2, 2015
    Assignee: SONY CORPORATION
    Inventors: Kazuichiro Itonaga, Shizunori Matsumoto
  • Patent number: 9041583
    Abstract: A comparator includes: a first amplifying unit that includes a differential pair configured with a pair of transistors which are first and second transistors, and amplifies a difference of signals input to each of the gate electrodes of the first and second transistors, to output; a second amplifying unit that amplifies the signal output from the first amplifying unit; a first condenser that is disposed between a gate electrode of the first transistor and a reference signal supply unit; a second condenser that is disposed between a gate electrode of the second transistor and a pixel signal wiring; a third transistor that connects a connection point of the gate electrode of the first transistor and the first condenser to the pixel signal wiring; and a fourth transistor that connects a connection point of the gate electrode of the second transistor and the second condenser to the pixel signal wiring.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: May 26, 2015
    Assignee: Sony Corporation
    Inventors: Hideki Tanaka, Shizunori Matsumoto, Haruhisa Naganokawa, Yuuichi Kaji
  • Publication number: 20150092094
    Abstract: A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.
    Type: Application
    Filed: December 9, 2014
    Publication date: April 2, 2015
    Inventors: Kazuichiro Itonaga, Shizunori Matsumoto
  • Publication number: 20140307142
    Abstract: A solid-state imaging device includes a pixel array section that includes a light-blocked pixel portion, and an effective pixel portion, and a signal process circuit that processes a pixel signal output from each pixel of the pixel array section. The signal processing circuit calculates, as held data, a row statistic obtained by performing a statistical process on pixel signals of the light-blocked pixel portion in the unit of rows, holds the held data items of a plurality of rows including a process target row of the pixel array section, randomly selects one of the held data items of a plurality of rows, and subtracts the randomly selected held data item from a pixel signal of the pixel of the process target row in the effective pixel portion.
    Type: Application
    Filed: March 14, 2014
    Publication date: October 16, 2014
    Applicant: Sony Corporation
    Inventor: Shizunori Matsumoto
  • Publication number: 20140293104
    Abstract: A comparator includes: a first amplifying unit that includes a differential pair configured with a pair of transistors which are first and second transistors, and amplifies a difference of signals input to each of the gate electrodes of the first and second transistors, to output; a second amplifying unit that amplifies the signal output from the first amplifying unit; a first condenser that is disposed between a gate electrode of the first transistor and a reference signal supply unit; a second condenser that is disposed between a gate electrode of the second transistor and a pixel signal wiring; a third transistor that connects a connection point of the gate electrode of the first transistor and the first condenser to the pixel signal wiring; and a fourth transistor that connects a connection point of the gate electrode of the second transistor and the second condenser to the pixel signal wiring.
    Type: Application
    Filed: March 13, 2014
    Publication date: October 2, 2014
    Applicant: SONY CORPORATION
    Inventors: Hideki Tanaka, Shizunori Matsumoto, Haruhisa Naganokawa, Yuuichi Kaji
  • Publication number: 20140291482
    Abstract: A comparator includes: a first amplifying unit that includes a differential pair configured with a pair of transistors which are first and second transistors, and amplifies a difference of signals input to each of the gate electrodes of the first and second transistors, to output; a second amplifying unit that amplifies the signal output from the first amplifying unit; a third transistor that connects the first transistor to a power source voltage; a fourth transistor that connects the second transistor to the power source voltage; a fifth transistor that connects a connection point of gate electrodes of the third transistor and the fourth transistor to a drain of the third transistor; and a sixth transistor that connects a connection point of gate electrodes of the third transistor and the fourth transistor to a drain of the fourth transistor.
    Type: Application
    Filed: March 13, 2014
    Publication date: October 2, 2014
    Applicant: SONY CORPORATION
    Inventors: Hideki Tanaka, Shizunori Matsumoto, Haruhisa Naganokawa, Yuuichi Kaji
  • Publication number: 20140240568
    Abstract: An electronic apparatus includes: a reference-signal output section that outputs a reference signal; a comparator that compares an electrical signal output from a pixel with the reference signal; a counter that obtains a count value as an AD conversion result of the electrical signal, the count value being obtained by counting time taken for the reference signal to change until the electrical signal and the reference signal match each other; and an auto-zero control section that performs control so that auto zero processing for setting the comparator is completed in a reset period, in which the pixel is reset, so that a comparison result indicating that two input signals supplied to the comparator match each other.
    Type: Application
    Filed: January 28, 2014
    Publication date: August 28, 2014
    Applicant: Sony Corporation
    Inventors: Yuuki Yamagata, Shizunori Matsumoto
  • Publication number: 20140210274
    Abstract: A power supply device that switches one of a first power supply, a second power supply, and a third power supply, all of which supply power to an auxiliary device, to a transfer gate in a CMOS image sensor having a photodiode and outputs the corresponding power to the transfer gate is disclosed. The device includes: a first transistor driven by the second power supply and outputting power of the second power supply to the transfer gate; a second transistor driven by the second power supply and outputting power of the first power supply to the transfer gate; a third transistor driven by the third power supply and outputting power of the third power supply to the transfer gate; and a fourth transistor located before the second transistor, driven by the first power supply, and outputting power of the first power supply to a source of the second transistor.
    Type: Application
    Filed: April 2, 2014
    Publication date: July 31, 2014
    Applicant: Sony Corporation
    Inventors: Eiji MAKINO, Youji SAKIOKA, ShizunorI MATSUMOTO
  • Publication number: 20140184864
    Abstract: A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.
    Type: Application
    Filed: December 16, 2013
    Publication date: July 3, 2014
    Applicant: Sony Corporation
    Inventors: Kazuichiro Itonaga, Shizunori Matsumoto
  • Patent number: 8716895
    Abstract: A power supply device that switches one of a first power supply, a second power supply, and a third power supply, all of which supply power to an auxiliary device, to a transfer gate in a CMOS image sensor having a photodiode and outputs the corresponding power to the transfer gate is disclosed. The device includes: a first transistor driven by the second power supply and outputting power of the second power supply to the transfer gate; a second transistor driven by the second power supply and outputting power of the first power supply to the transfer gate; a third transistor driven by the third power supply and outputting power of the third power supply to the transfer gate; and a fourth transistor located before the second transistor, driven by the first power supply, and outputting power of the first power supply to a source of the second transistor.
    Type: Grant
    Filed: April 15, 2008
    Date of Patent: May 6, 2014
    Assignee: Sony Corporation
    Inventors: Eiji Makino, Youji Sakioka, Shizunori Matsumoto
  • Patent number: 8687082
    Abstract: A solid-state imaging device includes: a pixel section in which a plurality of pixels converting optical signals into electric signals and accumulating the electric signals in accordance with an exposure period are arranged in a matrix shape; and a pixel driving section that is able to drive the pixel section to perform reset thereof and accumulate and output the electric signals, wherein the pixel driving section includes a vertical reading function of alternately reading pixel columns for which addition is vertically performed and pixel columns for which the addition is not performed, and a column reading function of changing the addition and normal reading whenever reading each single row in response to scanning of the vertical reading circuit, and the pixel driving section performs pseudo thinning-out reading addition equivalent to thinning-out by reading all pixels without thinning out pixels in a reading target row.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: April 1, 2014
    Assignee: Sony Corporation
    Inventor: Shizunori Matsumoto