Patents by Inventor Shizunori Matsumoto
Shizunori Matsumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8638382Abstract: A solid-state imaging device with a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.Type: GrantFiled: September 11, 2012Date of Patent: January 28, 2014Assignee: Sony CorporationInventors: Kazuichiro Itonaga, Shizunori Matsumoto
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Patent number: 8599295Abstract: Disclosed herein is an imaging element including a pixel array section, a first current source, a first ground line, a first switch, a first capacitive element, a second switch, and a current control circuit.Type: GrantFiled: May 18, 2011Date of Patent: December 3, 2013Assignee: Sony CorporationInventor: Shizunori Matsumoto
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Patent number: 8587707Abstract: A DA converter includes: a reference current generating circuit that generates a reference current; current sources that supply currents according to the reference current; a voltage output circuit that outputs a voltage according to a current to be supplied thereto; switch circuits provided for the current sources respectively to each switch a connection of each of the current sources to the voltage output circuit or a predetermined load; a control section that controls the switch circuits based on an input digital signal to select that of the current sources which is to be connected to the voltage output circuit, and outputs a voltage according to the digital signal from the voltage output circuit; and a switch that stops an operation of at least one of the current sources based on a control signal from the control section, without stopping an operation of the reference current generating circuit.Type: GrantFiled: July 28, 2010Date of Patent: November 19, 2013Assignee: Sony CorporationInventors: Shizunori Matsumoto, Chikao Miyazaki
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Publication number: 20130240711Abstract: Disclosed is a solid-state imaging device including a pixel array, a pixel signal generation part, and a control part. The pixel signal generation part includes a comparator and a counter. In a case where an enable signal is supplied from the control part, a count value of the counter in a D-phase period where a signal level is detected is set as a limit value regardless of an output of the comparator when a count value of the counter in a P-phase period where a reset level is detected is a limit value.Type: ApplicationFiled: February 21, 2013Publication date: September 19, 2013Applicant: SONY CORPORATIONInventors: Masaki Odahara, Takaki Watanabe, Shizunori Matsumoto
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Patent number: 8446489Abstract: The present invention relates to an imaging device, a drive control method, and a program configured to be capable of making sensitivity ratios constant and improving a S/N ratio. When a storage period of pixels (G pixels) with a green filter as a reference does not exceed a predetermined threshold value, an adjustment of the sensitivity ratio by gains by color is performed. When the storage period of the pixels with a green filter is larger than the predetermined threshold value, the storage periods of the pixels with a red filter (R pixels) and the pixels with a blue filter (B pixels) are calculated from the set sensitivity ratios, and if the calculated values do not exceed a maximum setting value, the adjustment of the sensitivity ratios by the storage periods by color is performed. In contrast, if the calculated storage period is larger than the maximum setting value, the adjustment of the sensitivity ratio is performed by combining the storage period by color and the gains by color.Type: GrantFiled: September 14, 2010Date of Patent: May 21, 2013Assignee: Sony CorporationInventors: Yasuhiro Kaneo, Shizunori Matsumoto
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Publication number: 20130002915Abstract: A solid-state imaging device with a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.Type: ApplicationFiled: September 11, 2012Publication date: January 3, 2013Applicant: SONY CORPORATIONInventors: Kazuichiro Itonaga, Shizunori Matsumoto
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Patent number: 8314870Abstract: A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.Type: GrantFiled: January 8, 2010Date of Patent: November 20, 2012Assignee: Sony CorporationInventors: Kazuichiro Itonaga, Shizunori Matsumoto
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Patent number: 8237808Abstract: There is provided a solid-state imaging device, which includes: a comparator for sequentially comparing a predetermined level of an analog pixel signal obtained from a plurality of pixels with a reference signal which is gradually changed and used for converting the predetermined level into digital data; a counter for performing a count processing in parallel with a comparison processing for the predetermined level in the comparator, and holding a count value at a time of completing the comparison processing to obtain digital data indicative of a value obtained by adding the plurality of pixel signals; and an addition spatial position adjusting unit for controlling a selection operation for selecting spatial positions of the plurality of pixels to be processed in the comparator and a ratio of a weight value during the addition to adjust spatial positions of pixels after addition.Type: GrantFiled: December 27, 2007Date of Patent: August 7, 2012Assignee: Sony CorporationInventors: Shizunori Matsumoto, Yasuaki Hisamatsu
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Publication number: 20120169908Abstract: The present invention relates to an imaging device, a drive control method, and a program configured to be capable of making sensitivity ratios constant and improving a S/N ratio. When a storage period of pixels (G pixels) with a green filter as a reference does not exceed a predetermined threshold value, an adjustment of the sensitivity ratio by gains by color is performed. When the storage period of the pixels with a green filter is larger than the predetermined threshold value, the storage periods of the pixels with a red filter (R pixels) and the pixels with a blue filter (B pixels) are calculated from the set sensitivity ratios, and if the calculated values do not exceed a maximum setting value, the adjustment of the sensitivity ratios by the storage periods by color is performed. In contrast, if the calculated storage period is larger than the maximum setting value, the adjustment of the sensitivity ratio is performed by combining the storage period by color and the gains by color.Type: ApplicationFiled: September 14, 2010Publication date: July 5, 2012Applicant: Sony CorporationInventors: Yasuhiro Kaneo, Shizunori Matsumoto
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Patent number: 8144229Abstract: A solid-state image pickup device including a driver-control unit configured to control the operation timing of a pulse-driven actuator driver based on the read timing of the sensor of a solid-state image pickup element is provided.Type: GrantFiled: January 27, 2009Date of Patent: March 27, 2012Assignee: Sony CorporationInventor: Shizunori Matsumoto
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Publication number: 20120008022Abstract: A solid-state imaging device includes: a pixel section in which a plurality of pixels converting optical signals into electric signals and accumulating the electric signals in accordance with an exposure period are arranged in a matrix shape; and a pixel driving section that is able to drive the pixel section to perform reset thereof and accumulate and output the electric signals, wherein the pixel driving section includes a vertical reading function of alternately reading pixel columns for which addition is vertically performed and pixel columns for which the addition is not performed, and a column reading function of changing the addition and normal reading whenever reading each single row in response to scanning of the vertical reading circuit, and the pixel driving section performs pseudo thinning-out reading addition equivalent to thinning-out by reading all pixels without thinning out pixels in a reading target row.Type: ApplicationFiled: June 2, 2011Publication date: January 12, 2012Applicant: Sony CorporationInventor: Shizunori Matsumoto
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Publication number: 20110317056Abstract: Disclosed herein is an imaging element including a pixel array section, a first current source, a first ground line, a first switch, a first capacitive element, a second switch, and a current control circuit.Type: ApplicationFiled: May 18, 2011Publication date: December 29, 2011Applicant: SONY CORPORATIONInventor: Shizunori Matsumoto
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Patent number: 8081248Abstract: A solid-state image pickup device includes a pixel array including a plurality of pixels arranged in a matrix, and a pixel signal read-out circuit for reading out a pixel signal from the pixel array in units of a plurality of pixels. The pixel signal read-out circuit includes a plurality of comparators and a plurality of counters. The comparators are disposed to correspond to a column of the pixels, and compare a read-out signal potential and a reference voltage to generate a determination signal and output the determination signal. The counters are controlled by outputs of the comparators. Each of the counters is configured to count a comparison time of a corresponding comparator of the comparators. The counters have a different operation period for each one or a plurality of columns.Type: GrantFiled: August 12, 2008Date of Patent: December 20, 2011Assignee: Sony CorporationInventor: Shizunori Matsumoto
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Publication number: 20110298955Abstract: A clock multiplying circuit includes: first and second inverters being ON/OFF-controlled by a positive- or negative-phase signal, respectively, of a first clock signal and including current source and current sync terminals; a capacitive element provided between output ends of the inverters; a current supplying unit increasing, if a frequency of the first clock signal increases, the control current and supplying the control current to the current source terminals of the inverters and outputting, from the current sync terminals of the inverters, a control current the same current amount as that of a control current to the current source terminal; a differential detecting unit receiving input of a potential difference signal between both electrodes of the capacitive element and generating a second clock signal having a phase difference of 90 degrees; and a multiplied-signal generating unit generating a double signal of the first clock signal on the basis of the clock signals.Type: ApplicationFiled: April 26, 2011Publication date: December 8, 2011Applicant: Sony CorporationInventors: Satsuki Horimoto, Shunji Kawaguchi, Shizunori Matsumoto
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Publication number: 20110050967Abstract: A DA converter includes: a reference current generating circuit that generates a reference current; current sources that supply currents according to the reference current; a voltage output circuit that outputs a voltage according to a current to be supplied thereto; switch circuits provided for the current sources respectively to each switch a connection of each of the current sources to the voltage output circuit or a predetermined load; a control section that controls the switch circuits based on an input digital signal to select that of the current sources which is to be connected to the voltage output circuit, and outputs a voltage according to the digital signal from the voltage output circuit; and a switch that stops an operation of at least one of the current sources based on a control signal from the control section, without stopping an operation of the reference current generating circuit.Type: ApplicationFiled: July 28, 2010Publication date: March 3, 2011Applicant: Sony CorporationInventors: Shizunori MATSUMOTO, Chikao MIYAZAKI
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Publication number: 20100177226Abstract: A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.Type: ApplicationFiled: January 8, 2010Publication date: July 15, 2010Applicant: SONY CORPORATIONInventors: Kazuichiro Itonaga, Shizunori Matsumoto
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Publication number: 20090195679Abstract: A solid-state image pickup device including a driver-control unit configured to control the operation timing of a pulse-driven actuator driver based on the read timing of the sensor of a solid-state image pickup element is provided.Type: ApplicationFiled: January 27, 2009Publication date: August 6, 2009Applicant: Sony CorporationInventor: Shizunori Matsumoto
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Publication number: 20090046190Abstract: A solid-state image pickup device includes a pixel array including a plurality of pixels arranged in a matrix, and a pixel signal read-out circuit for reading out a pixel signal from the pixel array in units of a plurality of pixels. The pixel signal read-out circuit includes a plurality of comparators and a plurality of counters. The comparators are disposed to correspond to a column of the pixels, and compare a read-out signal potential and a reference voltage to generate a determination signal and output the determination signal. The counters are controlled by outputs of the comparators. Each of the counters is configured to count a comparison time of a corresponding comparator of the comparators. The counters have a different operation period for each one or a plurality of columns.Type: ApplicationFiled: August 12, 2008Publication date: February 19, 2009Applicant: SONY CORPORATIONInventor: Shizunori Matsumoto
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Publication number: 20080284250Abstract: A power supply device that switches one of a first power supply, a second power supply, and a third power supply, all of which supply power to an auxiliary device, to a transfer gate in a CMOS image sensor having a photodiode and outputs the corresponding power to the transfer gate is disclosed. The device includes: a first transistor driven by the second power supply and outputting power of the second power supply to the transfer gate; a second transistor driven by the second power supply and outputting power of the first power supply to the transfer gate; a third transistor driven by the third power supply and outputting power of the third power supply to the transfer gate; and a fourth transistor located before the second transistor, driven by the first power supply, and outputting power of the first power supply to a source of the second transistor.Type: ApplicationFiled: April 15, 2008Publication date: November 20, 2008Inventors: Eiji Makino, Youji Sakioka, Shizunori Matsumoto
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Publication number: 20080170137Abstract: There is provided a solid-state imaging device, which includes: a comparator for sequentially comparing a predetermined level of an analog pixel signal obtained from a plurality of pixels with a reference signal which is gradually changed and used for converting the predetermined level into digital data; a counter for performing a count processing in parallel with a comparison processing for the predetermined level in the comparator, and holding a count value at a time of completing the comparison processing to obtain digital data indicative of a value obtained by adding the plurality of pixel signals; and an addition spatial position adjusting unit for controlling a selection operation for selecting spatial positions of the plurality of pixels to be processed in the comparator and a ratio of a weight value during the addition to adjust spatial positions of pixels after addition.Type: ApplicationFiled: December 27, 2007Publication date: July 17, 2008Applicant: Sony CorporationInventors: Shizunori Matsumoto, Yasuaki Hisamatsu