Abstract: There is provided a microchip including a flow channel, an ejection portion, and a cutout portion. The flow channel is configured to convey a fluid therein. The ejection portion includes an opening directed toward an end face of a substrate layer, and the ejection portion is configured to eject the fluid flowing through the flow channel to outside. The substrate layer is laminated to each other. The cutout portion is formed between the opening of the ejection portion and the end face of the substrate layer. The cutout portion has a larger diameter than that of the opening.

Abstract: There is provided an SOS substrate with reduced stress. The SOS substrate is a silicon-on-sapphire (SOS) substrate comprising a sapphire substrate and a monocrystalline silicon film on or above the sapphire substrate. The stress of the silicon film of the SOS substrate as measured by a Raman shift method is 2.5×108 Pa or less across an entire in-plane area of the SOS substrate.

Abstract: There is provided a composite structure including: at least two substrates which are made of thermoplastic resin and which are bonded by thermocompression; and at least one member which is made of a material whose heat distortion temperature is higher than a heat distortion temperature of the thermoplastic resin and which is inserted into a space formed in at least one of the substrates. The member inserted in the space is fixed and held by wall surfaces which form the space of the substrates and which are thermally deformed by thermocompression.

Abstract: A method for producing a bonded substrate having a Si1-xGex (0<x?1) film in which a larger than ever biaxial strain has been introduced. Specifically, the method involves at least the steps of: providing a donor wafer and a handle wafer having a thermal expansion coefficient lower than the donor wafer, implanting ions of any one or both of hydrogen and a noble gas into the donor wafer to form an ion-implanted layer, performing a plasma activation treatment on at least one of bonding surfaces of the donor wafer and the handle wafer, bonding the donor wafer to the handle wafer, splitting the donor wafer through application of a mechanical impact to the ion-implanted layer, performing a surface treatment on a split surface of the donor wafer, and epitaxially growing a Si1-xGex (0<x?1) film on the split surface to thus form a strained Si1-xGex (0<x?1) film on the bonded wafers.

Abstract: A pellicle for EUV including a silicon film and a mesh work structure supporting the silicon film, and this pellicle is improved in that the grid frames of the mesh work structure are tapered in such a manner that the width of each grid frame lessens as the distance from the silicon film is increased.

Abstract: Disclosed herein is a microchip including a substrate and a sample flow path within the substrate. The sample flow path includes a changing flow path and a microtube connected to the changing flow path. The changing flow path is configured to change a cross sectional shape of the sample flow path from a quadrangular shape at a first end to a circular shape at a second end. The microtube is connected to the second end of the changing flow path and is disposed within the substrate.

Abstract: Method of making a bonded SOS substrate with a semiconductor film on or above a sapphire substrate by implanting ions from a surface of the semiconductor substrate to form an ion-implanted layer; activating at least a surface of one of the sapphire substrate and the semiconductor substrate from which the ions have been implanted; bonding the surface of the semiconductor substrate and the surface of the sapphire substrate at a temperature of from 50° C. to 350° C.; heating the bonded substrates at a maximum temperature of from 200° C. to 350° C.; and irradiating visible light from a sapphire substrate side or a semiconductor substrate side to the ion-implanted layer of the semiconductor substrate to make the interface of the ion-implanted layer brittle at a temperature of the bonded body higher than the temperature at which the surfaces were bonded, to transfer the semiconductor film to the sapphire substrate.

Abstract: The object of the present invention is to provide a method for reducing defects, which are incurred on a surface of and inside a single-crystal silicon layer by a bonding method, by a treatment at a relatively low temperature over a relatively short duration. More specifically, the present invention relates to a method for manufacturing an SOI wafer, the method comprising the steps of forming a single-crystal silicon layer by a bonding method on a handle substrate selected from a material having a heat-resistant temperature of 800° C. or above to obtain a bonded substrate; depositing amorphous silicon on the single-crystal silicon layer of the bonded substrate; and heating the bonded substrate after the depositing at 800° C. or above.

Abstract: A bonded SOS substrate having a semiconductor film on or above a surface of a sapphire substrate is obtained by a method with the steps of implanting ions from a surface of a semiconductor substrate to form an ion-implanted layer; activating at least a surface from which the ions have been implanted; bonding the surface of the semiconductor substrate and the surface of the sapphire substrate at a temperature of 50° C. to 350° C.; heating the bonded substrates at a maximum temperature from 200° C. to 350° C. to form a bonded body; and irradiating visible light from a sapphire substrate side or a semiconductor substrate side to the ion-implanted layer of the semiconductor substrate for embrittling an interface of the ion-implanted layer, while keeping the bonded body at a temperature higher than the temperature at which the surfaces of the semiconductor substrate and the sapphire substrate were bonded.

Abstract: [Problem] To provide a small-sized, stable, and highly sensitive detection device by achieving an optical system which is the most suitable for an optical waveguide mode sensor using a spectral measurement method.

Abstract: A method of manufacturing a laminated wafer is provided by forming a silicon film layer on a surface of an insulating substrate comprising the steps in the following order of: applying a surface activation treatment to both a surface of a silicon wafer or a silicon wafer to which an oxide film is layered and a surface of the insulating substrate followed by laminating in an atmosphere of temperature exceeding 50° C. and lower than 300° C., applying a heat treatment to a laminated wafer at a temperature of 200° C. to 350° C., and thinning the silicon wafer by a combination of grinding, etching and polishing to form a silicon film layer.

Abstract: There is provided a method for manufacturing an SOI substrate capable of effectively and efficiently embrittling an interface of an ion-implanted layer without causing the separation of a bonded surface 9 or the breakage of a bonded wafer. Provided is a method for manufacturing an SOI substrate 8 by forming an SOI layer 4 on a surface of a transparent insulating substrate 3, the method comprising, in the following order, implanting ions into a silicon wafer 5 or a silicon wafer 5 with an oxide film 7 from a surface thereof so as to form an ion-implanted layer 2; subjecting at least one of the surface of the transparent insulating substrate and the surface of the ion-implanted silicon wafer or the silicon wafer with an oxide film to a surface activation treatment; bonding together the silicon wafer 5 or the silicon wafer 5 with an oxide film 7 and the transparent insulating substrate 3; subjecting the bonded wafer to a heat treatment at 150° C. or higher but not higher than 350° C.

Abstract: To provide a method of manufacturing a laminated wafer by which a strong coupling is achieved between wafers made of different materials having a large difference in thermal expansion coefficient without lowering a maximum heat treatment temperature as well as in which cracks or chips of the wafer does not occur. A method of manufacturing a laminated wafer 7 by forming a silicon film layer on a surface 4 of an insulating substrate 3 comprising the steps in the following order of: applying a surface activation treatment to both a surface 2 of a silicon wafer 1 or a silicon wafer 1 to which an oxide film is layered and a surface 4 of the insulating substrate 3 followed by laminating in an atmosphere of temperature exceeding 50° C. and lower than 300° C., applying a heat treatment to a laminated wafer 5 at a temperature of 200° C. to 350° C., and thinning the silicon wafer 1 by a combination of grinding, etching and polishing to form a silicon film layer.

Abstract: Provided is a method for manufacturing a low-cost bonded wafer (8) which allows bulk crystals of a wide bandgap semiconductor (1) to be transferred onto a handle substrate (3) as thinly as possible without breaking the substrate. More specifically, provided is a method for manufacturing a bonded wafer (8) by forming a wide bandgap semiconductor film (4) on a surface of a handle substrate (3), the method comprising a step of implanting ions from a surface (5) of a wide bandgap semiconductor substrate (1) having a bandgap of 2.8 eV or more to form an ion-implanted layer (2), a step of applying a surface activation treatment to at least one of the surface of the handle substrate (3) and the ion-implanted surface (5) of the wide bandgap semiconductor substrate (1), a step of bonding the surface (5) of the wide bandgap semiconductor substrate (1) and the surface of the handle substrate (3) to obtain bonded substrates (6), a step of applying a heat treatment to the bonded substrates (6) at a temperature of 150° C.

Abstract: A pellicle for lithography according to the present invention comprises a pellicle film (10) of single crystal silicon, and the pellicle film (10) is supported by a support member (20) including an outer frame portion (20a) and a porous portion (mesh structure) (20b) that occupies an inner area surrounded by the outer frame portion (20a). In order to prevent oxidation of surfaces of the pellicle film 10, anti-oxidizing films 30a and 30b are provided to cover portions where the single crystal silicon film is exposed to the outside. The support member (20) can be obtained by processing a handle substrate of an SOI substrate, and the pellicle film (10) of single crystal silicon can be obtained from an SOI layer of the SOI substrate. Since the pellicle film (10) is tightly coupled to the support member (20), sufficient mechanical strength can be assured.

Abstract: When a thermal expansion coefficient of a handle substrate is higher than that of a donor substrate, delamination is provided without causing a crack in the substrates. A method for producing a bonded wafer, with at least the steps of: implanting ions into a donor substrate (3) from a surface thereof to form an ion-implanted interface (5); bonding a handle substrate (7) with a thermal expansion coefficient higher than that of the donor substrate (3) onto the ion-implanted surface of the donor substrate to provide bonded substrates, subjecting the bonded substrates to a heat treatment to provide an assembly (1), and delaminating the donor substrate (3) of the assembly (1) at the ion-implanted interface wherein the assembly (1) has been cooled to a temperature not greater than room temperature by a cooling apparatus (20), so that a donor film is transferred onto the handle substrate (7).

Abstract: A method for easily manufacturing a transparent SOI substrate having: a main surface with a silicon film formed thereon; and a rough main surface located on a side opposite to a side where the silicon film is formed. A method for manufacturing transparent SOI substrate, having a silicon film formed on a first main surface of the transparent insulating substrate, while a second main surface of the transparent insulating substrate, an opposite to the first main surface, is roughened. The method includes at least the steps of: roughening the first main surface with an RMS surface roughness lower than 0.7 nm and the second main surface with an RMS surface roughness higher than the surface roughness of the first main surface to prepare the transparent insulating substrate; and forming the silicon film on the first main surface of the transparent insulating substrate.

Abstract: Provided is a method for manufacturing an SOI wafer, which is capable of: efficiently removing an ion-implanted defect layer existing in an ion implanted layer in the vicinity of a peeled surface peeled by an ion implantation peeling method; ensuring the in-plane uniformity of a substrate; and also achieving cost reduction and higher throughput. The method for manufacturing an SOI wafer includes at least the steps of: bonding a silicon wafer with or without an oxide film onto a handle wafer to prepare a bonded substrate, wherein the silicon wafer has an ion implanted layer formed by implanting hydrogen ions and/or rare gas ions into the silicon wafer; peeling the silicon wafer along the ion implanted layer, thereby transferring the silicon wafer onto the handle wafer to produce a post-peeling SOI wafer; immersing the post-peeling SOI wafer in an aqueous ammonia-hydrogen peroxide solution; and performing a heat treatment at a temperature of 900° C.

Abstract: A microchip is provided which includes a first introduction channel, second introduction channels arranged to sandwich the first introduction channel and merged with the first introduction channel from both sides, and a merge channel connected to the first introduction channel and the second introduction channels, where fluids fed from the first and the second introduction channels are merged and flow, wherein the merge channel has a tapered portion formed so that a channel width in a sandwiching direction along which the first introduction channel is sandwiched by the second introduction channels gradually increases along a fluid feeding direction.