Abstract: A method for power control in a terminal device includes determining service types of at least one service to be performed by the terminal device; configuring a target transmit power corresponding to each service performed by the terminal device according to each service type and a power-controlled transmit power of the terminal device. A terminal device for executing the method for power control is also disclosed.

Abstract: A cooling controller receives, from one or more sensors, wafer information associated with a wafer. The cooling controller determines a pattern mask area for the wafer based on the wafer information. The cooling controller determines a cooling time for the wafer based on the pattern mask area. The cooling controller causes a cooling plate to cool the wafer for a time duration equal to the cooling time. Determining the cooling time for a wafer based on a pattern mask area provides stable and consistent wafer temperatures for wafers having different mask and layout properties, which reduces mask overlay variation and increases wafer yield.

Abstract: A system and method for cleaning and inspecting ring frames is disclosed here. In one embodiment, a ring frame processing system includes: a cleaning station configured to remove a first tape on a first surface of a ring frame using a first blade, clean first adhesive residues from the first tape on the first surface of the ring frame using a first wheel brush, and remove second adhesive residues from a second tape on a second surface of the ring frame using a second blade; and an inspection station, wherein the inspection station comprises an automated optical inspection system configured to determine the cleanness of the first and second surfaces of the ring frame after cleaning.

Abstract: A semiconductor equipment management method applicable to an electronic device for managing multiple pieces of semiconductor equipment is provided. The pieces of semiconductor equipment are respectively controlled through multiple control hosts, and the control hosts and the electronic device are connected to a switch device. The method includes: receiving real-time image information of each control host through the switch device; determining whether the real-time image information of each control host includes a triggering event by performing an image recognition on the real-time image information; executing a macro corresponding to the triggering event, where the macro includes at least one self-defined operation; generating at least one input command according to the self-defined operation of the executed macro; and controlling the control hosts to execute the self-defined operation of the executed macro by transmitting the input command to the control hosts through the switch device.

Abstract: An apparatus and method for debonding a pair of bonded wafers are disclosed herein. In some embodiments, the debonding apparatus, comprises: a wafer chuck having a preset maximum lateral dimension and configured to rotate the pair of bonded wafers attached to a top surface of the wafer chuck, a pair of circular plate separating blades including a first separating blade and a second separating blade arranged diametrically opposite to each other at edges of the pair of bonded wafers, wherein the first and the second separating blades are inserted between a first and a second wafers of the pair of bonded wafers, and at least two pulling heads configured to pull the second wafer upwardly so as to debond the second wafer from the first wafer.

Abstract: A system comprises a front opening universal pod (FOUP) configured to hold one or more semiconductor wafers and a load dock having a stage and a receiving portion extending above the stage. The FOUP is positioned on the stage. A fan filter unit (FFU) positioned above the load dock. An air flow optimizer device is disposed on the receiving portion and under the FFU. The air flow optimizer device has an inlet opening and an outlet opening and a channel extends between the inlet opening and the outlet opening.

Abstract: A fabrication system for fabricating IC is provided. A processing tool includes at least one electrode and a RF sensor. The electrode is configured to receive a radio frequency (RF) signal from an RF signal generator during first and second semiconductor manufacturing processes. The RF sensor wirelessly detects intensity of the RF signal. A computation device extracts statistical characteristics with a sampling rate based on the detected intensity of the RF signal. A fault detection and classification (FDC) system includes a processor. The processor is configured to determine whether or not the detected intensity of the RF signal exceeds a threshold value or a threshold range according to the extracted statistical characteristics. When the detected intensity of the RF signal exceeds the threshold value or the threshold range, the processor notifies the processing tool to adjust the RF signal or stop tool to check parts damage.

Abstract: In certain embodiments, a workstation includes: a cleaning station configured to clean a die vessel, wherein the die vessel is configured to secure a semiconductor die; an inspection station configured to inspect the die vessel after cleaning to determine whether the die vessel is identified as passing inspection; and a conveyor configured to move the die vessel between the cleaning station and the inspection station.

Abstract: Some embodiments relate to a processing tool for processing a singulated semiconductor die. The tool includes an evaluation unit, a drying unit, and a die wipe station. The evaluation unit is configured to subject the singulated semiconductor die to a liquid to detect flaws in the singulated semiconductor die. The drying unit is configured to dry the liquid from a frontside of the singulated semiconductor die. The die wipe station includes an absorptive drying structure configured to absorb the liquid from a backside of the singulated semiconductor die after the drying unit has dried the liquid from the frontside of the singulated semiconductor die.

Abstract: A load port receives a wafer carrier. An equipment front end module (EFEM) transfers semiconductor wafers to and from the wafer carrier via an access opening of a housing of the EFEM, and also transfers wafers to and from a semiconductor processing or characterization tool. A gas flow device disposed inside the housing of the EFEM is connected to receive a low humidity gas having relative humidity of 10% or less, and is positioned to flow the received low humidity gas across the access opening. A saturated pressure layer of the gas flow device has a permeability for the low humidity gas that increases with increasing distance from a gas inlet edge of the saturated pressure layer, for example due to holes of varying diameter and/or density passing through the saturated pressure layer. A filter layer of the gas flow device uniformizes the gas exiting the saturated pressure layer.

Abstract: An apparatus and method for debonding a pair of bonded wafers are disclosed herein. In some embodiments, the debonding apparatus, comprises: a wafer chuck having a preset maximum lateral dimension and configured to rotate the pair of bonded wafers attached to a top surface of the wafer chuck, a pair of circular plate separating blades including a first separating blade and a second separating blade arranged diametrically opposite to each other at edges of the pair of bonded wafers, wherein the first and the second separating blades are inserted between a first and a second wafers of the pair of bonded wafers, and at least two pulling heads configured to pull the second wafer upwardly so as to debond the second wafer from the first wafer.

Abstract: A fabrication system for fabricating an IC is provided which includes a processing tool, a computation device and a FDC system. The processing tool includes an electrode and an RF sensor to execute a semiconductor manufacturing process to fabricate the IC. The RF sensor wirelessly detects the intensity of the RF signal. The computation device extracts statistical characteristics based on the detection of the intensity of the RF signal. The FDC system determines whether or not the intensity of the RF signal meets a threshold value or a threshold range according to the extracted statistical characteristics. When the detected intensity of the RF signal exceeds the threshold value or the threshold range, the FDC system notifies the processing tool to adjust the RF signal or stop tool to check parts damage.

Abstract: A system and method for defect detection in a hole array on a substrate is disclosed herein. In one embodiment, a method for defect detection in a hole array on a substrate, includes: scanning a substrate surface using at least one optical detector, generating at least one image of the substrate surface; and analyzing the at least one image to detect defects in the hole array on the substrate surface based on a set of predetermined criteria.

Abstract: A planarization method includes forming a dielectric layer over a polish stop layer. The dielectric layer is polished until reaching the polish stop layer, and the polished dielectric layer has a concave top surface. A compensation layer is formed over the concave top surface. The compensation layer is polished.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip processing tool. The integrated chip processing tool includes a first transfer module and a second transfer module. The first transfer module has a first robotic arm disposed within a housing. The first transfer module is configured to receive a single and unitary first die tray configured to hold a plurality of integrated chip (IC) die and to concurrently transfer all of the plurality of IC die held by the single and unitary first die tray to a single and unitary die boat. The second transfer module has an additional robotic arm disposed within the housing and configured to concurrently transfer all of the plurality of IC die from the single and unitary die boat to a single and unitary second die tray.

Abstract: Disclosed is a vacuum chuck and a method for securing a warped semiconductor substrate during a semiconductor manufacturing process so as to improve its flatness during a semiconductor manufacturing process. For example, a semiconductor manufacturing system includes: a vacuum chuck configured to hold a substrate, wherein the vacuum chuck comprises, a plurality of vacuum grooves located on a top surface of the vacuum chuck, wherein the top surface is configured to face the substrate; and a plurality of flexible seal rings disposed on the vacuum chuck and extending outwardly from the top surface, wherein the plurality of flexible seal rings are configured to directly contact a bottom surface of the substrate and in adjacent to the plurality of vacuum grooves so as to form a vacuum seal between the substrate and the vacuum chuck, and wherein each of the plurality of flexible seal rings has a zigzag cross section.

Abstract: A method includes: receiving a defect map from a defect scanner, wherein the defect map comprises at least one defect location of a semiconductor workpiece; annotating the defect map with a reference fiducial location of the semiconductor workpiece; determining a detected fiducial location within image data of the semiconductor workpiece; determining an offset correction based on comparing the detected fiducial location with the reference fiducial location; producing a corrected defect map by applying the offset correction to the defect map, wherein the applying the offset correction translocates the at least one defect location; and transferring the corrected defect map to a defect reviewer configured to perform root cause analysis based on the corrected defect map.

Abstract: Disclosed is a vacuum chuck and a method for securing a warped semiconductor substrate during a semiconductor manufacturing process so as to improve its flatness during a semiconductor manufacturing process. For example, a semiconductor manufacturing system includes: a vacuum chuck configured to hold a substrate, wherein the vacuum chuck comprises, a plurality of vacuum grooves located on a top surface of the vacuum chuck, wherein the top surface is configured to face the substrate; and a plurality of flexible seal rings disposed on the vacuum chuck and extending outwardly from the top surface, wherein the plurality of flexible seal rings are configured to directly contact a bottom surface of the substrate and in adjacent to the plurality of vacuum grooves so as to form a vacuum seal between the substrate and the vacuum chuck, and wherein each of the plurality of flexible seal rings has a zigzag cross section.

Abstract: A cleaning apparatus, method, and dry chamber are provided for cleaning a wafer carrier that holds wafers as part of a semiconductor fabrication process. The cleaning apparatus includes a wet chamber that receives the wafer carrier to be washed and a reservoir in fluid communication with the wet chamber. The reservoir stores a cleaning liquid that is introduced to the wafer carrier within the wet chamber during a washing operation, and a dry chamber is spaced apart from the wet chamber. The dry chamber receives the wafer carrier after the wafer carrier is washed in the wet chamber and holds the wafer carrier during a drying operation. A transport system transports the wafer carrier between the wet chamber and the dry chamber during a cleaning process.

Abstract: A lithography method to pattern a first semiconductor wafer is disclosed. An optical mask is positioned over the first semiconductor wafer. A first region of the first semiconductor wafer is patterned by directing light from a light source through transparent regions of the optical mask. A second region of the first semiconductor wafer is patterned by directing energy from an energy source to the second region, wherein the patterning of the second region comprises direct-beam writing.