Patents by Inventor Shun Wu

Shun Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100148885
    Abstract: This invention discloses a complementary-conducting-strip coupled-line (CCS CL). The CCS CL includes a substrate, m layers of mesh ground planes interlacing with m?1 layer(s) of first inter-media-dielectric (IMD) to form a stack structure on the substrate, a second IMD layer being on the stack structure, and n metal lines being on the second IMD layer and being edge-coupled with each other. Wherein, the m?1 first IMD layer(s) has(have) a plurality of vias to connect matching mesh ground planes, therein, m?2 and m is a nature number, n?2 and n is a nature number.
    Type: Application
    Filed: June 15, 2009
    Publication date: June 17, 2010
    Applicants: NATIONAL TAIWAN UNIVERSITY, CMSC, INC.
    Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
  • Patent number: 7737854
    Abstract: A radio frequency identification tag is provided. The radio frequency identification tag includes a body and a cutting indication formed on the body. The body includes a substrate, an antenna disposed on the substrate and an integrated circuit disposed on the substrate and electrically connected to the antenna for performing a radio frequency communication. An extension of the cutting indication intersects with the antenna to separate the body into two parts after breaking.
    Type: Grant
    Filed: January 18, 2008
    Date of Patent: June 15, 2010
    Assignee: Yuen Foong Yu Paper Mfg. Co. Ltd.
    Inventors: Shun-Chi Chang, Min Shun Wu, Yung Sheng Kuo
  • Publication number: 20100141359
    Abstract: The present invention provides a complementary-conducting-strip (CCS) structure for miniaturizing microwave transmission line. The CCS structure comprises a substrate; a transmission part formed on the substrate, the transmission part consisted of M metal layers and at least one connecting arm extending from the metal layers to connect to an adjacent CCS structure, the M metal layers interlaminated M-1 dielectric layer(s) perforating a plurality of first metal vias to connect the M metal layers, wherein M?=2 and M is a nature number; and a frame part formed on the substrate, the frame part surrounding the transmission part and consisted of M-1 metal frame(s), the M-1 metal frame(s) interlaminated M-2 dielectric frame(s) perforating a plurality of second metal vias to connect the metal frames.
    Type: Application
    Filed: December 5, 2008
    Publication date: June 10, 2010
    Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
  • Patent number: 7732344
    Abstract: A method for fabricating a integrated circuit with improved performance is disclosed. The method comprises providing a substrate; forming a hard mask layer over the substrate; forming protected portions and unprotected portions of the hard mask layer; performing a first etching process, a second etching process, and a third etching process on the unprotected portions of the hard mask layer, wherein the first etching process partially removes the unprotected portions of the hard mask layer, the second etching process treats the unprotected portions of the hard mask layer, and the third etching process removes the remaining unprotected portions of the hard mask layer; and performing a fourth etching process to remove the protected portions of the hard mask layer.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: June 8, 2010
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Fang Wen Tsai, Matt Yeh, Ming-Jun Wang, Shun Wu Lin, Chi-Chun Chen, Zin-Chang Wei, Chyi-Shyuan Chern
  • Publication number: 20100138210
    Abstract: A post-editing apparatus for correcting translation errors, includes: a translation error search unit for estimating translation errors using an error-specific language model suitable for a type of error desired to be estimated from translation result obtained using a translation system, and determining an order of correction of the translation errors; and a corrected word candidate generator for sequentially generating error-corrected word candidates for respective estimated translation errors on a basis of analysis of an original text of the translation system. The post-editing apparatus further includes a corrected word selector for selecting a final corrected word from among the error-corrected word candidates by using the error-specific language model suitable for the type of error desired to be corrected, and incorporating the final corrected word in the translation result, thus correcting the translation errors.
    Type: Application
    Filed: November 19, 2009
    Publication date: June 3, 2010
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Young Ae SEO, Chang Hyun Kim, Seong II Yang, Changhao Yin, Yun Jin, Jinxia Huang, Sung Kwon Choi, Ki Young Lee, Oh Woog Kwon, Yoon Hyung Roh, Eun Jin Park, Ying Shun Wu, Yong Kil Kim, Sang Kyu Park
  • Publication number: 20100138214
    Abstract: A translation-memory application method for automatic translation includes: generating TM-expanded forms by applying TM expansion rules respectively to source sentences whose morphemes have been analyzed; storing in an expanded TM database translated sentences corresponding to the generated TM-expanded source sentences; analyzing morphemes if an input sentence does not match any of the source sentences stored in basic TM database; generating a TM-expanded form by applying pertinent ones among the TM expansion rules to the input sentence whose morphemes have been analyzed; and producing, if the TM-expanded input sentence matches one of the TM-expanded source sentences stored in the expanded TM database, a translated output corresponding to the matched TM-expanded source sentence.
    Type: Application
    Filed: October 22, 2009
    Publication date: June 3, 2010
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chang Hyun KIM, Oh Woog Kwon, Yoon Hyung Roh, Young Ae Seo, Seong II Yang, Ki Young Lee, Sung Kwon Choi, Yun Jin, Eun Jin Park, Ying Shun Wu, Changhao Yin, Jinxia Huang, Young Kil Kim, Sang Kyu Park
  • Patent number: 7727900
    Abstract: A cleaning sequence usable in semiconductor manufacturing efficiently cleans semiconductor substrates while preventing chemical oxide formation thereon. The sequence includes the sequence of: 1) treating with an HF solution; 2) treating with pure H2SO4; 3) treating with an H2O2 solution; 4) a DI water rinse; and 5) treatment with an HCl solution. The pure H2SO4 solution may include an H2SO4 concentration of about ninety-eight percent (98%) or greater. After the HCl solution treatment, the cleaned surface may be a silicon surface that is free of a chemical oxide having a thickness of 5 angstroms or greater. The invention finds particular advantage in semiconductor devices that utilize multiple gate oxide thicknesses.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: June 1, 2010
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Matt Yeh, Shun Wu Lin, Chi-Chun Chen, Shih-Chang Chen
  • Publication number: 20100124823
    Abstract: A method is provided for fabricating a semiconductor device. The method includes removing a silicon material from a gate structure located on a substrate through a cycle including: etching the silicon material to remove a portion thereof, where the substrate is spun at a spin rate, applying a cleaning agent to the substrate, and drying the substrate; and repeating the cycle, where a subsequent cycle includes a subsequent spin rate for spinning the substrate during the etching and where the subsequent spin rate does not exceed the spin rate of the previous cycle.
    Type: Application
    Filed: November 20, 2008
    Publication date: May 20, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Matt Yeh, Fan-Yi Hsu, Shun Wu Lin, Shu-Yuan Ku, Hui Ouyang
  • Publication number: 20100112811
    Abstract: The present disclosure provides a method for fabricating a semiconductor device. The method includes forming first, second, third, and fourth gate structures on a semiconductor substrate, each gate structure having a dummy gate, removing the dummy gate from the first, second, third, and fourth gate structures, thereby forming first, second, third, and fourth trenches, respectively, forming a metal layer to partially fill in the first, second, third, and fourth trenches, forming a first photoresist layer over the first, second, and third trenches, etching a portion of the metal layer in the fourth trench, removing the first photoresist layer, forming a second photoresist layer over the second and third trenches, etching the metal layer in the first trench and the remaining portion of the metal layer in the fourth trench, and removing the second photoresist layer.
    Type: Application
    Filed: April 29, 2009
    Publication date: May 6, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Matt Yeh, Shun Wu Lin, Chung-Ming Wang, Chi-Chun Chen
  • Publication number: 20100109816
    Abstract: This invention discloses a complementary-conducting-strip transmission line (CCS TL) structure. The CCS TL structure includes a substrate, at least one first mesh ground plane, m second mesh ground planes having m first inter-media-dielectric (IMD) layers interlaced with and stacked among each other and the first mesh ground plane to form a stack structure on the substrate, a second IMD layer being on the stack structure, and a signal transmission line being on the second IMD layer. Wherein, each first IMD layer has a plurality of vias to correspondingly connect the first and the m second mesh ground planes, therein, m?2 and m is a nature number, and the m second mesh ground planes under the signal transmission line have at least one slit structure.
    Type: Application
    Filed: July 24, 2009
    Publication date: May 6, 2010
    Applicants: National Taiwan University, CMSC, INC.
    Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
  • Publication number: 20100109790
    Abstract: A multilayer complementary-conducting-strip transmission line (CCS TL) structure is disclosed herein. The multilayer CCS TL structure includes a substrate, and n signal transmission lines being parallel and interlacing with n-1 mesh ground plane(s), therein a plurality of inter-media-dielectric (IMD) layers are correspondingly stacked with among the n signal transmission lines and the n-1 mesh ground plane(s) to form a stack structure on the substrate, therein n?2 and n is a natural number. Whereby, a multilayer CCS TL with independent of each layer and complete effect on signal shield is formed to provide more flexible for circuit design, reduce the circuit area and also diminish the transmission loss.
    Type: Application
    Filed: July 23, 2009
    Publication date: May 6, 2010
    Applicants: NATIONAL TAIWAN UNIVERSITY, CMSC, INC.
    Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
  • Publication number: 20100094615
    Abstract: A document translation apparatus includes a document processing module for analyzing associative relations between nouns or noun phrases within an input document to be translated to generate analysis information on texts; and a document translation module for selecting target words for the respective texts in reference to the text analysis information to generate morphemes corresponding to the target words, thereby producing a translated document corresponding to the input document.
    Type: Application
    Filed: June 15, 2009
    Publication date: April 15, 2010
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yoon Hyung Roh, Sung Kwon Choi, Ki Young Lee, Oh Woog Kwon, Young Kil Kim, Cheng Hyun Kim, Younge Ae Seo, Seong Il Yang, Yun Jin, Eun Jin Park, Ying Shun Wu, Changhao Yin, Sang Kyu Park
  • Publication number: 20100070261
    Abstract: A method for automatically detecting errors in machine translation using a parallel corpus includes analyzing morphemes of a target language sentence in the parallel corpus and a machine-translated target language sentence, corresponding to a source language sentence, to classify the morphemes into words; aligning by words and decoding, respectively, a group of the source language sentence and the machine-translated target language sentence, and a group of the source language sentence and the target language sentence in the parallel corpus; classifying by types errors in the machine-translated target language sentence by making a comparison, word by word, between the decoded target language sentence in the parallel corpus and the decoded machine-translated target language sentence; and computing error information in the machine-translated target language sentence by examining a frequency of occurrence of the classified error types.
    Type: Application
    Filed: June 26, 2009
    Publication date: March 18, 2010
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yun Jin, Oh Woog Kwon, Ying Shun Wu, Changhao Yin, Sung Kwon Choi, Chang Hyun Kim, Seong Il Yang, Ki Young Lee, Yoon Hyung Roh, Young Ao Seo, Eun Jin Park, Young Kii Kim, Sang Kyu Park
  • Publication number: 20100062667
    Abstract: An activated carbon fiber soft electric heating product and its manufacturing method for overcoming existing problems including uneven temperature rise and heat dissipation at surfaces of the product, unbendable feature, short life and poor safety. An activated carbon fiber cloth and a woven fiber cloth of the activated carbon fiber soft electric heating product are fixed by an epoxy resin layer, and a conducting copper net is disposed between the activated carbon fiber cloth and the epoxy resin layer and coupled to a power input wire. The manufacturing method includes the steps of: (1) spraying an epoxy resin on a surface of the woven fiber cloth, and bake-drying and hot pressing the woven fiber cloth; and (2) connecting the conducting copper net and the power input wire, laying the activated carbon fiber cloth, and performing a second-time hot pressing.
    Type: Application
    Filed: September 11, 2008
    Publication date: March 11, 2010
    Inventors: Ching-Ling Pan, Yung-Shun Wu
  • Publication number: 20100057437
    Abstract: A machine-translation apparatus using multi-level verbal-phrase patterns includes: a simple sentence generation unit for generating an input simple sentence; a basic verbal-phrase pattern-matching unit for trying a match of a semantic code of each case component of the input simple sentence with basic verbal-phrase patterns; a default verbal-phrase pattern matching unit for trying a match of a size and case prepositions of the input simple sentence with default verbal-phrase patterns having a verb identical to that of the input simple sentence; a default word-order matching unit for trying a match of a word-order of the input simple sentence with default word-order verbal-phrase patterns having a case component structure identical to that of the input simple sentence; and a default preposition matching unit for generating a target sentence of an input sentence with default preposition patterns having a context identical to that of the input simple sentence.
    Type: Application
    Filed: May 12, 2009
    Publication date: March 4, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Changhao Yin, Chang Hyun Kim, Young Ae Seo, Seong Il Yang, Eun Jin Park, Yun Jin, Sung Kwon Choi, Ki Young Lee, Oh Woog Kwon, Yoon Hyung Roh, Ying Shun Wu, Young Kil Kim, Sang Kyu Park
  • Publication number: 20100048011
    Abstract: Provided are methods of patterning metal gate structures including a high-k gate dielectric. In an embodiment, a soluble hard mask layer may be used to provide a masking element to pattern a metal gate. The soluble hard mask layer may be removed from the substrate by water or a photoresist developer. In an embodiment, a hard mask including a high-k dielectric is formed. In a further embodiment, a protection layer is formed underlying a photoresist pattern. The protection layer may protect one or more layers formed on the substrate from a photoresist stripping process.
    Type: Application
    Filed: February 16, 2009
    Publication date: February 25, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Matt Yeh, Shun Wu Lin, Chi-Chun Chen, Ryan Chia-Jen Chen, Yi-Hsing Chen, Chien-Hao Chen, Donald Y. Chao, Kuo-Bin Huang
  • Patent number: 7628092
    Abstract: Disclosed herein is a gearshift lock protection mechanism including a gearbox, a gearshift module and a gearshift lock controller. The gearshift module includes a control panel and a gearshift leading wire set. The control panel is combined with a gearbox shaft of the gearbox, shifting gears of the gearbox by using the gearshift leading wire set to control the control panel and the gearbox shaft. Furthermore, a plurality of gear ranges positioning holes are located on the surface of the control panel. The gearshift lock controller includes a control valve which is linked to a gearshift poisoning leading wire, a positioning terminal located at the end of the gearshift positioning leading wire which is in one of the gear ranges positioning holes determined by the control valve, such that it can lock the gear in a particular range and eliminate the gearbox damage.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: December 8, 2009
    Assignee: Motive Power Industry Co., Ltd.
    Inventors: Jhih-Chao Chen, Shen-Fa Ho, Ting-Shun Wu, Chih-An Huang
  • Publication number: 20090157380
    Abstract: The present invention provides a Korean-English hybrid automatic translation method for providing translation from Korean to English, includes: performing a morpheme analysis and a syntactic analysis on a Korean input source text; segmenting the Korean input source text into at least two source text segments, based on the results of the morpheme analysis and the syntactic analysis; and generating a PBMT (pattern-based machine translation) translated text segment and a SMT (statistical machine translation) translated text segment with respect to each of the source text segments. Further, the method includes determining, as final translation result, one of the PBMT translated text segment and the SMT translated text segment with respect to each source text segment, based on predetermined weight information; and composing the translated text segments with respect to the source text segments of the Korean input source text into one English translated text by using the determined final translation results.
    Type: Application
    Filed: December 2, 2008
    Publication date: June 18, 2009
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Chang Hyun KIM, Young Ae Seo, Young-Sook Hwang, Young Kil Kim, Sung Kwon Choi, Oh Woog Kwon, Ki Young Lee, Seong Il Yang, Yun Jin, Yoon Hyung Roh, Changhao Ying, Eun Jin Park, Ying Shun Wu, Sang Kyu Park
  • Publication number: 20090120600
    Abstract: The present invention discloses a nano carbon crystal material and a method of manufacturing electrothermal board using the same, which is a crystal material and a method of using the facial heat generating body to overcome the present existing problems related to even temperature rise and heat dissipation at the surface of the carbon fiber electrothermal board, poor contact between the carbon fiber and the conducting band, poor insulation, and short life expectancy. The nano carbon crystal material is composed of acrylonitrile-based carbon fibers occupying 70˜80% of the total weight, nano carbon fibers occupying 1˜5% of the total weight and carbon crystals occupying 15˜29% of the total weight. After the nano carbon crystal material is mixed with a paper pulp and an adhesive is added, the electrothermal board produced under pressurized conditions will have the advantages of high stability, fast temperature rise, good insulation, and long life.
    Type: Application
    Filed: November 9, 2007
    Publication date: May 14, 2009
    Inventors: Ching-Ling Pan, Yung-Shun Wu
  • Patent number: 7500122
    Abstract: An efficiency optimization method for hardware devices with adjustable clock frequencies is provided. The work current of the hardware device is measured and used to obtain the corresponding work level from a conversion table. The obtained work level is compared with the currently executing work level to make adjustments for various parameters for the hardware device and for the operation of the corresponding heat-dissipating device. Therefore, the hardware device can achieve a better performance.
    Type: Grant
    Filed: January 20, 2006
    Date of Patent: March 3, 2009
    Assignee: Micro-Star Int'l Co., Ltd.
    Inventors: Ming-Ting Won, Fu-Shun Wu, Po-Jen Cheng