Abstract: An ESD protection circuit fully protects the input stage of CMOS integrated circuits from four different ESD stress modes by providing four different ESD direct discharging paths. The ESD protection circuit has a primary ESD protection circuit, which has a first and a second thick-oxide MOS devices, and a secondary ESD protection circuit which has a resistor, a first and a second thin-oxide MOS devices. The resistor is connected between the primary and secondary ESD protection circuits. The primary and secondary ESD protection circuits each provide two ESD discharge paths from the input pad, and from the input of the internal circuits to be protected, to VDD and VSS voltage supply buses. The inventive ESD protection circuit also has merged latchup guard rings and protects against large ESDs, while occupying only a small layout area. Furthermore, the inventive ESD protection circuit clamps the voltage level of the input signal between 5.

Abstract: An on-chip ESD protection circuit for use in a submicron CMOS integrated circuit (IC) has been disclosed. The ESD protection circuit provides a high ESD failure threshold in a small layout area to protect the input stage of the submicron CMOS IC against ESD failure. The ESD protection circuit is formed by a PTLSCR1, PTLSCR2 devices and an NTLSCR1, NTLSCR2 devices. The PTLSCR1 or PTLSCR2 (NTLSCR1 or NTLSCR2) is formed by inserting a short-channel thin-oxide PMOS (NMOS) device into the lateral SCR structure. These MOS devices are used to reduce the turn-on voltage of the lateral SCR to below the gate-oxide breakdown voltage of the CMOS devices in the input stage. Thus these PTLSCR1, PTLSCR2, NTLSCR1 and NTLSCR2 devices perform full ESD protection without additional secondary ESD protection elements. The four modes of ESD, PS, NS, PD and ND, are one-by-one protected by the NTLSCR1, NTLSCR2, PTLSCR1 and PTLSCR2 devices respectively.

Abstract: This invention relates to a method of using a liquid or powder varnishing furnace utilizing near-ultrared bulbs to form high temperature regions and low temperature regions which are alternatively disposed and spaced apart by a fixed distance to heat a cleaned and painted workpiece, whereby the workpiece is dried rapidly and paint sprayed onto the workpiece firmly adheres thereto.