Patents by Inventor Shunpei Yamazaki

Shunpei Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250146126
    Abstract: There have been cases where transistors formed using oxide semiconductors are inferior in reliability to transistors formed using amorphous silicon. Thus, in the present invention, a semiconductor device including a highly reliable transistor formed using an oxide semiconductor is manufactured. An oxide semiconductor film is deposited by a sputtering method, using a sputtering target including an oxide semiconductor having crystallinity, and in which the direction of the c-axis of a crystal is parallel to a normal vector of the top surface of the oxide semiconductor. The target is formed by mixing raw materials so that its composition ratio can obtain a crystal structure.
    Type: Application
    Filed: January 13, 2025
    Publication date: May 8, 2025
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Tetsunori MARUYAMA, Yuki IMOTO, Hitomi SATO, Masahiro WATANABE, Mitsuo MASHIYAMA, Kenichi OKAZAKI, Motoki NAKASHIMA, Takashi SHIMAZU
  • Publication number: 20250151295
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first memory cell, a second memory cell over the first memory cell, a first conductor, and a second conductor over the first conductor. The first memory cell and the second memory cell each include a transistor and a capacitor. One of a source and a drain of the transistor is electrically connected to a lower electrode of the capacitor. The first conductor includes a portion in contact with the other of the source and the drain of the transistor included in the first memory cell. A top surface of the first conductor includes a portion in contact with a bottom surface of the second conductor. The second conductor includes a portion in contact with the other of the source and the drain of the transistor included in the second memory cell.
    Type: Application
    Filed: February 6, 2023
    Publication date: May 8, 2025
    Inventors: Shunpei YAMAZAKI, Tatsuya ONUKI, Hitoshi KUNITAKE, Ryota HODO
  • Publication number: 20250151393
    Abstract: A display device in which a peripheral circuit portion has high operation stability is provided. The display device includes a first substrate and a second substrate. A first insulating layer is provided over a first surface of the first substrate. A second insulating layer is provided over a first surface of the second substrate. The first surface of the first substrate and the first surface of the second substrate face each other. An adhesive layer is provided between the first insulating layer and the second insulating layer. A protective film in contact with the first substrate, the first insulating layer, the adhesive layer, the second insulating layer, and the second substrate is formed in the vicinity of a peripheral portion of the first substrate and the second substrate.
    Type: Application
    Filed: January 3, 2025
    Publication date: May 8, 2025
    Inventors: Shunpei YAMAZAKI, Yoshiharu HIRAKATA, Takashi HAMADA, Kohei YOKOYAMA, Yasuhiro JINBO, Tetsuji ISHITANI, Daisuke KUBOTA
  • Publication number: 20250151294
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. A storage device includes a first transistor, a second transistor, a first capacitor, and a second capacitor. The first capacitor includes a first electrode and a second electrode. The second capacitor includes the first electrode and a third electrode. One of a source and a drain of the first transistor is electrically connected to the second electrode; one of a source and a drain of the second transistor is electrically connected to the third electrode; and the first electrode includes a portion overlapping with each of the second electrode, the third electrode, the first transistor, and the second transistor and is supplied with a fixed potential or a ground potential.
    Type: Application
    Filed: February 6, 2023
    Publication date: May 8, 2025
    Inventors: Shunpei YAMAZAKI, Tatsuya ONUKI, Hitoshi KUNITAKE
  • Publication number: 20250147370
    Abstract: The display device includes a first substrate provided with a driver circuit region that is located outside and adjacent to a pixel region and includes at least one second transistor which supplies a signal to the first transistor in each of the pixels in the pixel region, a second substrate facing the first substrate, a liquid crystal layer between the first substrate and the second substrate, a first interlayer insulating film including an inorganic insulating material over the first transistor and the second transistor, a second interlayer insulating film including an organic insulating material over the first interlayer insulating film, and a third interlayer insulating film including an inorganic insulating material over the second interlayer insulating film. The third interlayer insulating film is provided in part of an upper region of the pixel region, and has an edge portion on an inner side than the driver circuit region.
    Type: Application
    Filed: January 9, 2025
    Publication date: May 8, 2025
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yasuharu HOSAKA, Yukinori SHIMA, Kenichi OKAZAKI, Shunpei YAMAZAKI
  • Publication number: 20250151408
    Abstract: One embodiment of the present invention provides a highly reliably display device in which a high mobility is achieved in an oxide semiconductor. A first oxide component is formed over a base component. Crystal growth proceeds from a surface toward an inside of the first oxide component by a first heat treatment, so that a first oxide crystal component is formed in contact with at least part of the base component. A second oxide component is formed over the first oxide crystal component. Crystal growth is performed by a second heat treatment using the first oxide crystal component as a seed, so that a second oxide crystal component is formed. Thus, a stacked oxide material is formed. A transistor with a high mobility is formed using the stacked oxide material and a driver circuit is formed using the transistor.
    Type: Application
    Filed: January 13, 2025
    Publication date: May 8, 2025
    Inventors: Jun KOYAMA, Shunpei YAMAZAKI
  • Publication number: 20250148985
    Abstract: A display device that has high display quality is provided. A highly reliable display device is provided. A display device with low power consumption is provided. A light-emitting element is electrically connected to one of a source and a drain of a first transistor. The other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of a second transistor. A gate electrode of the second transistor is electrically connected to one of a source and a drain of a third transistor. A semiconductor layer of the second transistor and a semiconductor layer of the third transistor each include indium, zinc and a third metal. The ratio of the number of indium atoms to the total number of the indium atoms, zinc atoms, and atoms of the third metal in the semiconductor layer of the second transistor is higher than or equal to 30 atomic % and lower than or equal to 100 atomic %.
    Type: Application
    Filed: January 3, 2025
    Publication date: May 8, 2025
    Inventors: Shunpei YAMAZAKI, Kenichi OKAZAKI, Koji KUSUNOKI
  • Publication number: 20250151443
    Abstract: An imaging device which has a stacked-layer structure and can be manufactured easily is provided. The imaging device includes a signal processing circuit, a memory device, and an image sensor. The imaging device has a stacked-layer structure in which the memory device is provided above the signal processing circuit, and the image sensor is provided above the memory device. The signal processing circuit includes a transistor formed on a first semiconductor substrate, the memory device includes a transistor including a metal oxide in a channel formation region, and the image sensor includes a transistor formed on a second semiconductor substrate.
    Type: Application
    Filed: January 3, 2025
    Publication date: May 8, 2025
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tatsuya ONUKI, Kiyoshi KATO, Takanori MATSUZAKI, Hajime KIMURA, Shunpei YAMAZAKI
  • Publication number: 20250147587
    Abstract: An electronic device that enables smooth communication is provided. The electronic device includes a display portion including a first camera; a second camera; and an image processing portion. The second camera is positioned in a region not overlapping with the display portion. The first camera has a function of generating a first image of a subject, and the second camera has a function of generating a second image of the subject. The image processing portion includes a generator that performs learning using training data. The training data includes an image including a person's face. The image processing portion has a function of making the first image clear when the first image is input to the generator and a function of tracking the gaze of the subject on the basis of the second image.
    Type: Application
    Filed: January 10, 2025
    Publication date: May 8, 2025
    Inventors: Hiromichi GODO, Yoshiyuki KUROKAWA, Seiko INOUE, Kazuaki OHSHIMA, Shunpei YAMAZAKI
  • Publication number: 20250148942
    Abstract: A semiconductor device that can be highly integrated is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, a second insulating layer, a third insulating layer, and a first conductive layer. The third insulating layer is positioned over the semiconductor layer and includes a first opening over the semiconductor layer. The first conductive layer is positioned over the semiconductor layer, the first insulating layer is positioned between the first conductive layer and the semiconductor layer, and the second insulating layer is provided in a position that is in contact with a side surface of the first opening, the semiconductor layer, and the first insulating layer.
    Type: Application
    Filed: January 13, 2025
    Publication date: May 8, 2025
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Yukinori SHIMA, Masami JINTYOU
  • Publication number: 20250148941
    Abstract: A novel display panel that is highly convenient, useful, or reliable is provided. The display panel includes a display region, a first support, and a second support, the display region includes a first region, a second region, and a third region, the first region and the second region each have a belt-like shape extending in one direction, and the third region is sandwiched between the first region and the second region. The first support overlaps with the first region and is less likely to be warped than the third region, and the second support overlaps with the second region and is less likely to be warped than the third region. The second support can pivot on an axis extending in the one direction with respect to the first support.
    Type: Application
    Filed: January 7, 2025
    Publication date: May 8, 2025
    Inventors: Shingo EGUCHI, Taiki NONAKA, Daiki NAKAMURA, Nozomu SUGISAWA, Kazuhiko FUJITA, Shunpei YAMAZAKI
  • Publication number: 20250151508
    Abstract: A long-lifetime light-emitting device is provided. The light-emitting apparatus includes a first light-emitting device and a first color conversion layer. The first color conversion layer contains a first substance. An EL layer of the first light-emitting device includes a first layer, a second layer, a third layer, a light-emitting layer, and a fourth layer in this order from the anode side. The first layer contains a first organic compound and a second organic compound. The second layer contains a third organic compound. The third layer contains a fourth organic compound. The light-emitting layer contains a fifth organic compound and a sixth organic compound. The fourth layer contains a seventh organic compound. The first organic compound is an organic compound having an electron accepting property to the second organic compound. The fifth organic compound is an emission center substance. The HOMO level of the second organic compound is higher than or equal to ?5.7 eV and lower than or equal to ?5.4 eV.
    Type: Application
    Filed: January 2, 2025
    Publication date: May 8, 2025
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Nobuharu Ohsawa, Shunpei Yamazaki
  • Publication number: 20250151254
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a memory cell including first to third transistors and a capacitor. The second and third transistors share a metal oxide. The capacitor is provided between the first and second transistors. An insulator is provided over an electrode functioning as a source or a drain of the first transistor, and the insulator has an opening reaching the electrode. The capacitor is provided in the opening. One electrode of the capacitor includes, in the opening, a region in contact with the other of the source electrode and the drain electrode of the first transistor. The one electrode of the capacitor includes a region in contact with a gate electrode of the second transistor.
    Type: Application
    Filed: February 8, 2023
    Publication date: May 8, 2025
    Inventors: Shunpei YAMAZAKI, Tatsuya ONUKI, Kiyoshi KATO, Hitoshi KUNITAKE, Ryota HODO
  • Publication number: 20250147552
    Abstract: An e-book reader in which destruction of a driver circuit at the time when a flexible panel is handled is inhibited. In addition, an e-book reader having a simplified structure. A plurality of flexible display panels each including a display portion in which display control is performed by a scan line driver circuit and a signal line driver circuit, and a binding portion fastening the plurality of display panels together are included. The signal line driver circuit is provided inside the binding portion, and the scan line driver circuit is provided at the edge of the display panel in a direction perpendicular to the binding portion.
    Type: Application
    Filed: January 9, 2025
    Publication date: May 8, 2025
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Yasuyuki ARAI, Ikuko KAWAMATA, Atsushi MIYAGUCHI, Yoshitaka MORIYA
  • Publication number: 20250151333
    Abstract: A circuit capable of high-speed operation and a pixel are integrally formed over the same substrate. A first metal oxide film, a first metal film, and an island-shaped first resist mask are formed over a first insulating layer. An island-shaped first metal layer and an island-shaped first oxide semiconductor layer are formed and a part of a top surface of the first insulating layer is exposed; then, the first resist mask is removed. A second metal oxide film, a second metal film, and an island-shaped second resist mask are formed over the first metal layer and the first insulating layer. An island-shaped second metal layer and an island-shaped second oxide semiconductor layer are formed; then, the second resist mask is removed. The first metal layer and the second metal layer are removed.
    Type: Application
    Filed: January 13, 2025
    Publication date: May 8, 2025
    Inventors: Shunpei YAMAZAKI, Yasuharu HOSAKA, Mitsuo MASHIYAMA, Kenichi OKAZAKI
  • Publication number: 20250151261
    Abstract: A semiconductor device having high memory density is provided. The semiconductor device includes a first insulator, a first layer, a second insulator, a second layer, a third insulator, and a third layer, which are stacked in this order. Each of the first layer and the third layer includes a first and a second transistor and a first conductor. The second layer includes a second conductor. In the first transistor in each of the first and the third layer, a source and a drain are positioned on a semiconductor layer and a gate is positioned over the semiconductor layer. In the second transistor in each of the first and the third layer, a source and a drain are positioned on a semiconductor layer and a gate is positioned over the semiconductor layer. In each of the first and the third layer, the first conductor electrically connects a region on the source or the drain of the first transistor and a region on the gate of the second transistor.
    Type: Application
    Filed: February 27, 2023
    Publication date: May 8, 2025
    Inventors: Hajime KIMURA, Shunpei YAMAZAKI
  • Publication number: 20250151334
    Abstract: A transistor with small parasitic capacitance can be provided. A transistor with high frequency characteristics can be provided. A semiconductor device including the transistor can be provided. Provided is a transistor including an oxide semiconductor, a first conductor, a second conductor, a third conductor, a first insulator, and a second insulator. The first conductor has a first region where the first conductor overlaps with the oxide semiconductor with the first insulator positioned therebetween; a second region where the first conductor overlaps with the second conductor with the first and second insulators positioned therebetween; and a third region where the first conductor overlaps with the third conductor with the first and second insulators positioned therebetween. The oxide semiconductor including a fourth region where the oxide semiconductor is in contact with the second conductor; and a fifth region where the oxide semiconductor is in contact with the third conductor.
    Type: Application
    Filed: January 8, 2025
    Publication date: May 8, 2025
    Inventors: Shunpei YAMAZAKI, Masayuki SAKAKURA
  • Publication number: 20250151404
    Abstract: It is an object to manufacture a highly reliable display device using a thin film transistor having favorable electric characteristics and high reliability as a switching element. In a bottom gate thin film transistor including an amorphous oxide semiconductor, an oxide conductive layer having a crystal region is formed between an oxide semiconductor layer which has been dehydrated or dehydrogenated by heat treatment and each of a source electrode layer and a drain electrode layer which are formed using a metal material. Accordingly, contact resistance between the oxide semiconductor layer and each of the source electrode layer and the drain electrode layer can be reduced; thus, a thin film transistor having favorable electric characteristics and a highly reliable display device using the thin film transistor can be provided.
    Type: Application
    Filed: January 7, 2025
    Publication date: May 8, 2025
    Inventors: Shunpei YAMAZAKI, Toshinari SASAKI, Junichiro SAKATA, Masashi TSUBUKU
  • Publication number: 20250147354
    Abstract: A display device includes a first region and a second region adjacent to the first region. A display element included in the first region has a function of reflecting visible light and a function of emitting visible light. A display element included in the second region has a function of emitting visible light. In an electronic device including the display device, the first region is located on a first surface (e.g., top surface) on which a main image is displayed, and the second region is located on a second surface (e.g., side surface) on which an auxiliary image is displayed.
    Type: Application
    Filed: January 6, 2025
    Publication date: May 8, 2025
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Daisuke Kubota, Naoto Kusumoto
  • Publication number: 20250151332
    Abstract: An object is to stabilize electric characteristics of a semiconductor device including an oxide semiconductor to increase reliability. The semiconductor device includes an insulating film; a first metal oxide film on and in contact with the insulating film; an oxide semiconductor film partly in contact with the first metal oxide film; source and drain electrodes electrically connected to the oxide semiconductor film; a second metal oxide film partly in contact with the oxide semiconductor film; a gate insulating film on and in contact with the second metal oxide film; and a gate electrode over the gate insulating film.
    Type: Application
    Filed: January 10, 2025
    Publication date: May 8, 2025
    Inventor: Shunpei YAMAZAKI