Patents by Inventor Shunpei Yamazaki

Shunpei Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200258449
    Abstract: Objects are to provide a display device the power consumption of which is reduced, to provide a self-luminous display device the power consumption of which is reduced and which is capable of long-term use in a dark place. A circuit is formed using a thin film transistor in which a highly-purified oxide semiconductor is used and a pixel can keep a certain state (a state in which a video signal has been written). As a result, even in the case of displaying a still image, stable operation is easily performed. In addition, an operation interval of a driver circuit can be extended, which results in a reduction in power consumption of a display device. Moreover, a light-storing material is used in a pixel portion of a self-luminous display device to store light, whereby the display device can be used in a dark place for a long time.
    Type: Application
    Filed: April 30, 2020
    Publication date: August 13, 2020
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Hiroyuki MIYAKE
  • Publication number: 20200259019
    Abstract: To provide an oxide semiconductor film having stable electric conductivity and a highly reliable semiconductor device having stable electric characteristics by using the oxide semiconductor film. The oxide semiconductor film contains indium (In), gallium (Ga), and zinc (Zn) and includes a c-axis-aligned crystalline region aligned in the direction parallel to a normal vector of a surface where the oxide semiconductor film is formed. Further, the composition of the c-axis-aligned crystalline region is represented by In1+?Ga1-?O3(ZnO)m (0<?<1 and m=1 to 3 are satisfied), and the composition of the entire oxide semiconductor film including the c-axis-aligned crystalline region is represented by InxGayO3(ZnO)m (0<x<2, 0<y<2, and m=1 to 3 are satisfied).
    Type: Application
    Filed: May 1, 2020
    Publication date: August 13, 2020
    Inventors: Masahiro TAKAHASHI, Kengo AKIMOTO, Shunpei YAMAZAKI
  • Patent number: 10742056
    Abstract: The versatility of a power feeding device is improved. A power storage system includes a power storage device and a power feeding device. The power storage device includes data for identifying the power storage device. The power storage device includes a power storage unit, a switch that controls whether power from the power feeding device is supplied to the power storage unit, and a control circuit having a function of controlling a conduction state of the switch in accordance with a control signal input from the power feeding device. The power feeding device includes a signal generation circuit having a function of identifying the power storage device by the data input from the power storage device, generating the control signal corresponding to the identified power storage device, and outputting the generated control signal to the power storage device.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: August 11, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Patent number: 10741619
    Abstract: A technique of manufacturing a display device with high productivity is provided. In addition, a high-definition display device with high color purity is provided. By adjusting the optical path length between an electrode having a reflective property and a light-emitting layer by the central wavelength of a wavelength range of light passing through a color filter layer, the high-definition display device with high color purity is provided without performing selective deposition of light-emitting layers. In a light-emitting element, a plurality of light-emitting layers emitting light of different colors are stacked. The closer the light-emitting layer is to the electrode having a reflective property, the longer the wavelength of light emitted from the light-emitting layer is.
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: August 11, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Toshiki Sasaki, Nobuharu Ohsawa, Takahiro Ushikubo, Shunpei Yamazaki
  • Patent number: 10741590
    Abstract: A peeling method at low cost with high mass productivity is provided. A silicon layer having a function of releasing hydrogen by irradiation with light is formed over a formation substrate, a first layer is formed using a photosensitive material over the silicon layer, an opening is formed in a portion of the first layer that overlaps with the silicon layer by a photolithography method and the first layer is heated to form a resin layer having an opening, a transistor including an oxide semiconductor in a channel formation region is formed over the resin layer, a conductive layer is formed to overlap with the opening of the resin layer and the silicon layer, the silicon layer is irradiated with light using a laser, and the transistor and the formation substrate are separated from each other.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: August 11, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masataka Sato, Masakatsu Ohno, Seiji Yasumoto, Hiroki Adachi
  • Patent number: 10741679
    Abstract: Provided is a semiconductor device having favorable reliability.
    Type: Grant
    Filed: April 9, 2018
    Date of Patent: August 11, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kazutaka Kuriki, Yuji Egi, Hiromi Sawai, Yusuke Nonaka, Noritaka Ishihara, Daisuke Matsubayashi
  • Patent number: 10741414
    Abstract: To suppress a change in electrical characteristics and to improve reliability in a semiconductor device using a transistor including an oxide semiconductor. The semiconductor device includes a gate electrode over an insulating surface, an oxide semiconductor film overlapping with the gate electrode, a gate insulating film which is between the gate electrode and the oxide semiconductor film and is in contact with a surface of the oxide semiconductor film, a protective film in contact with an opposite surface of the surface of the oxide semiconductor film, and a pair of electrodes in contact with the oxide semiconductor film. In the gate insulating film or the protective film, the amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than the amount of nitrogen oxide released by heat treatment.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: August 11, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuharu Hosaka, Toshimitsu Obonai, Junichi Koezuka, Yukinori Shima, Masahiko Hayakawa, Takashi Hamochi, Suzunosuke Hiraishi
  • Patent number: 10741695
    Abstract: A transistor having high field-effect mobility is provided. In order that an oxide semiconductor layer through which carriers flow is not in contact with a gate insulating film, a buried channel structure in which the oxide semiconductor layer through which carriers flow is separated from the gate insulating film is employed. Specifically, an oxide semiconductor layer having high conductivity is provided between two oxide semiconductor layers. Further, an impurity element is added to the oxide semiconductor layer in a self-aligned manner so that the resistance of a region in contact with an electrode layer is reduced. Further, the oxide semiconductor layer in contact with the gate insulating layer has a larger thickness than the oxide semiconductor layer having high conductivity.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: August 11, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Publication number: 20200251685
    Abstract: An object of one embodiment of the present invention is to provide a more convenient highly reliable light-emitting device which can be used for a variety of applications. Another object of one embodiment of the present invention is to manufacture, without complicating the process, a highly reliable light-emitting device having a shape suitable for its intended purpose. In a manufacturing process of a light-emitting device, a light-emitting panel is manufactured which is at least partly curved by processing the shape to be molded after the manufacture of an electrode layer and/or an element layer, and a protective film covering a surface of the light-emitting panel which is at least partly curved is formed, so that a light-emitting device using the light-emitting panel has a more useful function and higher reliability.
    Type: Application
    Filed: April 16, 2020
    Publication date: August 6, 2020
    Inventors: Shunpei YAMAZAKI, Kaoru HATANO
  • Publication number: 20200251547
    Abstract: A first organic resin layer is formed over a first substrate; a first insulating film is formed over the first organic resin layer; a first element layer is formed over the first insulating film; a second organic resin layer is formed over a second substrate; a second insulating film is formed over the second organic resin layer; a second element layer is formed over the second insulating film; the first substrate and the second substrate are bonded; a first separation step in which adhesion between the first organic resin layer and the first substrate is reduced; the first organic resin layer and a first flexible substrate are bonded with a first bonding layer; a second separation step in which adhesion between the second organic resin layer and the second substrate is reduced; and the second organic resin layer and a second flexible substrate are bonded with a second bonding layer.
    Type: Application
    Filed: April 23, 2020
    Publication date: August 6, 2020
    Inventors: Shunpei YAMAZAKI, Masakatsu OHNO, Hiroki ADACHI, Satoru IDOJIRI, Koichi TAKESHIMA
  • Publication number: 20200250521
    Abstract: An arithmetic device and an electronic device having small power consumption is provided. An arithmetic device and an electronic device capable of high-speed operation is provided. An arithmetic device and an electronic device capable of suppressing heat generation is provided. The arithmetic device includes a first arithmetic portion and a second arithmetic portion. The first arithmetic portion includes a first CPU core and a second CPU core. The second arithmetic portion includes a first GPU core and a second GPU core. The CPU cores each have a power gating function and each include a first data retention circuit electrically connected to a flip-flop. The first GPU core includes a second data retention circuit capable of retaining an analog value and reading out the analog value as digital data of two or more bits. The second GPU core includes a third data retention circuit capable of retaining a digital value and reading out the digital value as digital data of one bit.
    Type: Application
    Filed: August 28, 2018
    Publication date: August 6, 2020
    Inventors: Takahiko ISHIZU, Takayuki IKEDA, Atsuo ISOBE, Atsushi MIYAGUCHI, Shunpei YAMAZAKI
  • Patent number: 10734530
    Abstract: An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: August 4, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto
  • Patent number: 10734413
    Abstract: A novel metal oxide is provided. The metal oxide has a plurality of energy gaps, and includes a first region having a high energy level of a conduction band minimum and a second region having an energy level of a conduction band minimum lower than that of the first region. The second region comprises more carriers than the first region. A difference between the energy level of the conduction band minimum of the first region and the energy level of the conduction band minimum of the second region is 0.2 eV or more. The energy gap of the first region is greater than or equal to 3.3 eV and less than or equal to 4.0 eV and the energy gap of the second region is greater than or equal to 2.2 eV and less than or equal to 2.9 eV.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: August 4, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Motoki Nakashima, Haruyuki Baba
  • Publication number: 20200243685
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device which includes a first insulator provided over a substrate; an oxide provided over the first insulator; a second insulator provided over the oxide; a conductor provided over the second insulator; a third insulator provided in contact with a side surface of the second insulator and a side surface of the conductor; a fourth insulator provided in contact with at least a top surface of the oxide and in contact with a side surface of the third insulator and a top surface of the conductor; a fifth insulator provided over the fourth insulator; a sixth insulator provided over the fifth insulator; and a seventh insulator provided over the sixth insulator, in which the sixth insulator contains oxygen and the sixth insulator and the first insulator include a region where the sixth insulator and the first insulator are in contact with each other.
    Type: Application
    Filed: February 23, 2018
    Publication date: July 30, 2020
    Inventors: Shunpei YAMAZAKI, Tsutomu MURAKAWA, Hajime KIMURA
  • Publication number: 20200243514
    Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes a transistor and a capacitor. The transistor includes a first conductor and a second insulator over a first insulator; a third insulator over the first conductor and the second insulator; a fourth insulator over the third insulator; a first oxide over the fourth insulator; a second oxide and a third oxide over the first oxide; a second conductor in contact with a top surface of the third insulator, a side surface of the fourth insulator, a side surface of the first oxide, a side surface of the second oxide, and a top surface of the second oxide; a third conductor in contact with the top surface of the third insulator, a side surface of the fourth insulator, a side surface of the first oxide, a side surface of the third oxide, and a top surface of the third oxide; a fourth oxide over the first oxide; a fifth insulator over the fourth oxide; and a fourth conductor over the fifth insulator.
    Type: Application
    Filed: November 26, 2019
    Publication date: July 30, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Tatsuya ONUKI, Katsuaki TOCHIBAYASHI
  • Publication number: 20200243654
    Abstract: A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle ?1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle ?2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased.
    Type: Application
    Filed: April 13, 2020
    Publication date: July 30, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Daisuke Kawae
  • Publication number: 20200241624
    Abstract: A method for operating an electronic device with lower power consumption is provided. The electronic device includes a display device and a touch sensor. In the case where the touch sensor senses no touch, the touch sensor is brought into a resting state or operated so as to perform a sensing operation at a reduced drive frequency. Also in the case where the touch sensor constantly senses touches and an image on the display device is not changed, the touch sensor is brought into the resting state or operated so as to perform the sensing operation at a reduced drive frequency.
    Type: Application
    Filed: April 10, 2020
    Publication date: July 30, 2020
    Inventors: Yuji IWAKI, Shunpei YAMAZAKI
  • Publication number: 20200243626
    Abstract: A flexible input/output device and an input/output device having high resistance to repeated bending are provided. The input/output device includes a first flexible substrate, a first insulating layer over the first substrate, a first transistor over the first insulating layer, a light-emitting element over and electrically connected to the first transistor and including an EL layer between first and second electrodes, a first bonding layer over the light-emitting element, a sensing element and a second transistor over the first bonding layer and electrically connected to each other, a second insulating layer over the sensing element and the second transistor, and a second flexible substrate over the second insulating layer. In the input/output device, B/A is greater than or equal to 0.7 and less than or equal to 1.7, where A is a thickness between the EL layer and the first insulating layer and B is a thickness between the EL layer and the second insulating layer.
    Type: Application
    Filed: April 10, 2020
    Publication date: July 30, 2020
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shingo EGUCHI, Shunpei YAMAZAKI
  • Publication number: 20200243686
    Abstract: An object is to provide a material suitably used for a semiconductor included in a transistor, a diode, or the like. Another object is to provide a semiconductor device including a transistor in which the condition of an electron state at an interface between an oxide semiconductor film and a gate insulating film in contact with the oxide semiconductor film is favorable. Further, another object is to manufacture a highly reliable semiconductor device by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used for a channel. A semiconductor device is formed using an oxide material which includes crystal with c-axis alignment, which has a triangular or hexagonal atomic arrangement when seen from the direction of a surface or an interface and rotates around the c-axis.
    Type: Application
    Filed: April 15, 2020
    Publication date: July 30, 2020
    Inventors: Shunpei YAMAZAKI, Motoki NAKASHIMA, Tatsuya HONDA
  • Publication number: 20200243689
    Abstract: Provided are a transistor which has electrical characteristics requisite for its purpose and uses an oxide semiconductor layer and a semiconductor device including the transistor. In the bottom-gate transistor in which at least a gate electrode layer, a gate insulating film, and the semiconductor layer are stacked in this order, an oxide semiconductor stacked layer including at least two oxide semiconductor layers whose energy gaps are different from each other is used as the semiconductor layer. Oxygen and/or a dopant may be added to the oxide semiconductor stacked layer.
    Type: Application
    Filed: April 14, 2020
    Publication date: July 30, 2020
    Inventors: Shunpei YAMAZAKI, Satoshi SHINOHARA