Patents by Inventor Shunpei Yamazaki

Shunpei Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240122028
    Abstract: An object of one embodiment of the present invention is to provide a novel display device or a display system. Another object of one embodiment of the present invention is to provide a display device or a display system which can be manufactured at low cost and can provide various functions to a user. A pixel includes light-emitting elements whose emission colors are different from each other, a light-emitting element IR, a light-receiving element PS, and an infrared light sensor IRS. An image of a fundus of an eye is captured using the light-emitting element emitting an infrared light as a light source, and imaging is performed by the light-receiving element IRS. A substrate of a display panel is manufactured using a single crystal Si substrate capable of microfabrication and higher integration.
    Type: Application
    Filed: February 7, 2022
    Publication date: April 11, 2024
    Inventors: Takayuki IKEDA, Hisao IKEDA, Tatsuya ONUKI, Shunpei YAMAZAKI
  • Publication number: 20240121990
    Abstract: A light-emitting apparatus can be provided at low cost. The light-emitting apparatus includes a plurality of partitions formed over an insulating surface and extending in a first direction, a plurality of pixel electrodes each having an island shape formed over the insulating surface, an EL layer formed over the pixel electrodes, and a second electrode formed over the EL layer. The partition has an insulating property, the pixel electrodes that are aligned in the first direction are positioned column by column between adjacent partitions in the plurality of partitions, and the EL layer is in contact with the insulating surface between the pixel electrodes adjacent to each other in the first direction in the pixel electrodes aligned in the first direction.
    Type: Application
    Filed: January 13, 2022
    Publication date: April 11, 2024
    Inventors: Shunpei YAMAZAKI, Satoshi SEO
  • Publication number: 20240120339
    Abstract: Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 11, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei YAMAZAKI
  • Publication number: 20240120341
    Abstract: Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 11, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei YAMAZAKI
  • Publication number: 20240120340
    Abstract: Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 11, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei YAMAZAKI
  • Publication number: 20240118548
    Abstract: A novel display device is provided. The display device includes a plurality of pixels each including a light-emitting device, a sensor device, a first circuit device, and a second circuit device. The light-emitting device and the sensor device are provided in a first layer. The first circuit device is provided in a second layer. The second circuit device is provided in a third layer. The light-emitting device includes a lower electrode, an upper electrode, and a light-emitting layer provided between the lower electrode and the upper electrode. The sensor device has a function of detecting light emitted from the light-emitting device. The first circuit device has a function of driving the light-emitting device or the sensor device. The second circuit device has a function of performing an arithmetic operation based on information output from the first circuit device. The first layer is provided over the second layer. The second layer is provided over the third layer.
    Type: Application
    Filed: February 14, 2022
    Publication date: April 11, 2024
    Inventors: Shunpei YAMAZAKI, Takayuki IKEDA
  • Patent number: 11955562
    Abstract: A semiconductor device having a large on-state current and high reliability is provided. The semiconductor device includes a first insulator, a first oxide over the first insulator, a second oxide over the first oxide, a third oxide and a fourth oxide over the second oxide, a first conductor over the third oxide, a second conductor over the fourth oxide, a fifth oxide over the second oxide, a second insulator over the fifth oxide, and a third conductor over the second insulator. The fifth oxide is in contact with a top surface of the second oxide, a side surface of the first conductor, a side surface of the second conductor, a side surface of the third oxide, and a side surface of the fourth oxide. The second oxide contains In, an element M, and Zn. The first oxide and the fifth oxide each contain at least one of constituent elements included in the second oxide. The third oxide and the fourth oxide each contain the element M.
    Type: Grant
    Filed: August 17, 2022
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Haruyuki Baba, Naoki Okuno, Yoshihiro Komatsu, Toshikazu Ohno
  • Patent number: 11954276
    Abstract: A touch panel including an oxide semiconductor film having conductivity is provided. The touch panel includes a transistor, a second insulating film, and a touch sensor. The transistor includes a gate electrode; a gate insulating film; a first oxide semiconductor film; a source electrode and a drain electrode; a first insulating film; and a second oxide semiconductor film. The second insulating film is over the second oxide semiconductor film so that the second oxide semiconductor film is positioned between the first insulating film and the second insulating film. The touch sensor includes a first electrode and a second electrode. One of the first and second electrodes includes the second oxide semiconductor film.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hajime Kimura, Masami Jintyou, Yasuharu Hosaka, Naoto Goto, Takahiro Iguchi, Daisuke Kurosaki, Junichi Koezuka
  • Patent number: 11955538
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first conductor, a second conductor over the first conductor, a first insulator covering the second conductor, a first oxide over the first insulator, and a second oxide over the first oxide, an opening overlapping with at least part of the first conductor is provided in the first oxide and the first insulator, and the second oxide is electrically connected to the first conductor through the opening.
    Type: Grant
    Filed: April 18, 2023
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toshihiko Takeuchi, Naoto Yamade, Hiroshi Fujiki, Tomoaki Moriwaka, Shunsuke Kimura
  • Patent number: 11955557
    Abstract: A semiconductor device includes an oxide semiconductor layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode, and the drain electrode, and a gate electrode over the gate insulating layer. The source electrode and the drain electrode include an oxide region formed by oxidizing a side surface thereof. Note that the oxide region of the source electrode and the drain electrode is preferably formed by plasma treatment with a high frequency power of 300 MHz to 300 GHz and a mixed gas of oxygen and argon.
    Type: Grant
    Filed: August 31, 2022
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Publication number: 20240113130
    Abstract: A semiconductor device including a capacitor whose charge capacity is increased while improving the aperture ratio is provided. Further, a semiconductor device which consumes less power is provided. A transistor which includes a light-transmitting semiconductor film, a capacitor in which a dielectric film is provided between a pair of electrodes, an insulating film which is provided over the light-transmitting semiconductor film, and a first light-transmitting conductive film which is provided over the insulating film are included. The capacitor includes the first light-transmitting conductive film which serves as one electrode, the insulating film which functions as a dielectric, and a second light-transmitting conductive film which faces the first light-transmitting conductive film with the insulating film positioned therebetween and functions as the other electrode.
    Type: Application
    Filed: December 1, 2023
    Publication date: April 4, 2024
    Inventors: Shunpei YAMAZAKI, Hiroyuki MIYAKE, Hideaki SHISHIDO, Jun KOYAMA
  • Publication number: 20240113231
    Abstract: A novel material is provided. A composite oxide semiconductor in which a first region and a plurality of second regions are mixed is provided. Note that the first region contains at least indium, an element M (the element M is one or more of Al, Ga, Y, and Sn), and zinc, and the plurality of second regions contain indium and zinc. Since the plurality of second regions have a higher concentration of indium than the first region, the plurality of second regions have a higher conductivity than the first region. An end portion of one of the plurality of second regions overlaps with an end portion of another one of the plurality of second regions. The plurality of second regions are three-dimensionally surrounded with the first region.
    Type: Application
    Filed: December 15, 2023
    Publication date: April 4, 2024
    Inventor: Shunpei YAMAZAKI
  • Publication number: 20240113138
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a capacitor, a transistor, and a first insulating layer. The capacitor includes first and second conductive layers and a second insulating layer. The second insulating layer is in contact with a side surface of the first conductive layer, and the second conductive layer covers at least part of the side surface of the first conductive layer with the second insulating layer therebetween. The transistor includes third to fifth conductive layers, a semiconductor layer, and a third insulating layer. The third conductive layer is in contact with a top surface of the first conductive layer. The first insulating layer is provided over the third conductive layer, and the fourth conductive layer is provided over the first insulating layer. The first insulating layer and the fourth conductive layer include an opening portion reaching the third conductive layer.
    Type: Application
    Filed: September 25, 2023
    Publication date: April 4, 2024
    Inventors: Hajime KIMURA, Kentaro HAYASHI, Shunpei YAMAZAKI
  • Publication number: 20240113346
    Abstract: A semiconductor device in which a circuit and a battery are efficiently stored is provided. In the semiconductor device, a first transistor, a second transistor, and a secondary battery are provided over one substrate. A channel region of the second transistor includes an oxide semiconductor. The secondary battery includes a solid electrolyte, and can be fabricated by a semiconductor manufacturing process. The substrate may be a semiconductor substrate or a flexible substrate. The secondary battery has a function of being wirelessly charged.
    Type: Application
    Filed: December 8, 2023
    Publication date: April 4, 2024
    Inventors: Junpei MOMO, Kazutaka KURIKI, Hiromichi GODO, Shunpei YAMAZAKI
  • Publication number: 20240113207
    Abstract: A semiconductor device having favorable electrical characteristics is provided. A first oxide is formed over a substrate; a first insulator is formed over the first oxide; an opening reaching the first oxide is formed in the first insulator; a first oxide film is deposited in contact with the first oxide and the first insulator in the opening; a first insulating film is deposited over the first oxide film; microwave treatment is performed from above the first insulating film; heat treatment is performed on one or both of the first insulating film and the first oxide; a first conductive film is deposited over the first insulating film; and part of the first oxide film, part of the first insulating film, and part of the first conductive film are removed until a top surface of the first insulator is exposed, so that a second oxide, a second insulator, and a first conductor are formed.
    Type: Application
    Filed: December 14, 2023
    Publication date: April 4, 2024
    Inventors: Shunpei YAMAZAKI, Naoki OKUNO, Yasuhiro JINBO
  • Publication number: 20240109785
    Abstract: A novel material and a transistor using a novel material are provided. A composite oxide includes at least two regions, one of which includes In, Zn and an element M1 (the element M1 is one or more of Al, Ga, Si, B, Y, Ti, Fe, Ni, Ge, Zr, Mo, La, Ce, Nd, Hf, Ta, W, Mg, V, Be, and Cu), and the other of which includes In, Zn, and an element M2 (the element M2 is one or more of Al, Ga, Si, B, Y, Ti, Fe, Ni, Ge, Zr, Mo, La, Ce, Nd, Hf, Ta, W, Mg, V, Be, and Cu). The proportion of the element M1 to In, Zn, and the element M1 in the region including the element M1 is less than that of the element M2 to In, Zn, and the element M2 in the region including the element M2. In an analysis of the composite oxide by X-ray diffraction, the diffraction pattern result in the X-ray diffraction is asymmetric with the angle at which the peak intensity of X-ray diffraction is detected as the symmetry axis.
    Type: Application
    Filed: December 12, 2023
    Publication date: April 4, 2024
    Inventor: Shunpei YAMAZAKI
  • Publication number: 20240113230
    Abstract: To provide a miniaturized transistor having highly stable electrical characteristics. Furthermore, also in a semiconductor device including the transistor, high performance and high reliability are achieved. The transistor includes, over a substrate, a conductor, an oxide semiconductor, and an insulator. The oxide semiconductor includes a first region and a second region. The resistance of the second region is lower than that of the first region. The entire surface of the first region in the oxide semiconductor is surrounded in all directions by the conductor with the insulator interposed therebetween.
    Type: Application
    Filed: December 6, 2023
    Publication date: April 4, 2024
    Inventors: Shunpei YAMAZAKI, Yuta ENDO, Yoko TSUKAMOTO
  • Patent number: 11947228
    Abstract: An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: April 2, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Miyuki Hosoba, Junichiro Sakata, Hideaki Kuwabara
  • Patent number: 11949021
    Abstract: A semiconductor device having a structure which can prevent a decrease in electrical characteristics due to miniaturization is provided. The semiconductor device includes, over an insulating surface, a stack in which a first oxide semiconductor layer and a second oxide semiconductor layer are sequentially formed, and a third oxide semiconductor layer covering part of a surface of the stack. The third oxide semiconductor layer includes a first layer in contact with the stack and a second layer over the first layer. The first layer includes a microcrystalline layer, and the second layer includes a crystalline layer in which c-axes are aligned in a direction perpendicular to a surface of the first layer.
    Type: Grant
    Filed: April 11, 2023
    Date of Patent: April 2, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masayuki Sakakura, Hideomi Suzawa
  • Patent number: 11950474
    Abstract: One embodiment of the present invention provides a highly reliable display device. In particular, a display device to which a signal or a power supply potential can be supplied stably is provided. Further, a bendable display device to which a signal or a power supply potential can be supplied stably is provided. The display device includes, over a flexible substrate, a display portion, a plurality of connection terminals to which a signal from an outside can be input, and a plurality of wirings. One of the plurality of wirings electrically connects one of the plurality of connection terminals to the display portion. The one of the plurality of wirings includes a first portion including a plurality of separate lines and a second portion in which the plurality of lines converge.
    Type: Grant
    Filed: May 4, 2023
    Date of Patent: April 2, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kensuke Yoshizumi