Patents by Inventor Shunpei Yamazaki

Shunpei Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240113138
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a capacitor, a transistor, and a first insulating layer. The capacitor includes first and second conductive layers and a second insulating layer. The second insulating layer is in contact with a side surface of the first conductive layer, and the second conductive layer covers at least part of the side surface of the first conductive layer with the second insulating layer therebetween. The transistor includes third to fifth conductive layers, a semiconductor layer, and a third insulating layer. The third conductive layer is in contact with a top surface of the first conductive layer. The first insulating layer is provided over the third conductive layer, and the fourth conductive layer is provided over the first insulating layer. The first insulating layer and the fourth conductive layer include an opening portion reaching the third conductive layer.
    Type: Application
    Filed: September 25, 2023
    Publication date: April 4, 2024
    Inventors: Hajime KIMURA, Kentaro HAYASHI, Shunpei YAMAZAKI
  • Publication number: 20240113130
    Abstract: A semiconductor device including a capacitor whose charge capacity is increased while improving the aperture ratio is provided. Further, a semiconductor device which consumes less power is provided. A transistor which includes a light-transmitting semiconductor film, a capacitor in which a dielectric film is provided between a pair of electrodes, an insulating film which is provided over the light-transmitting semiconductor film, and a first light-transmitting conductive film which is provided over the insulating film are included. The capacitor includes the first light-transmitting conductive film which serves as one electrode, the insulating film which functions as a dielectric, and a second light-transmitting conductive film which faces the first light-transmitting conductive film with the insulating film positioned therebetween and functions as the other electrode.
    Type: Application
    Filed: December 1, 2023
    Publication date: April 4, 2024
    Inventors: Shunpei YAMAZAKI, Hiroyuki MIYAKE, Hideaki SHISHIDO, Jun KOYAMA
  • Publication number: 20240113231
    Abstract: A novel material is provided. A composite oxide semiconductor in which a first region and a plurality of second regions are mixed is provided. Note that the first region contains at least indium, an element M (the element M is one or more of Al, Ga, Y, and Sn), and zinc, and the plurality of second regions contain indium and zinc. Since the plurality of second regions have a higher concentration of indium than the first region, the plurality of second regions have a higher conductivity than the first region. An end portion of one of the plurality of second regions overlaps with an end portion of another one of the plurality of second regions. The plurality of second regions are three-dimensionally surrounded with the first region.
    Type: Application
    Filed: December 15, 2023
    Publication date: April 4, 2024
    Inventor: Shunpei YAMAZAKI
  • Publication number: 20240113346
    Abstract: A semiconductor device in which a circuit and a battery are efficiently stored is provided. In the semiconductor device, a first transistor, a second transistor, and a secondary battery are provided over one substrate. A channel region of the second transistor includes an oxide semiconductor. The secondary battery includes a solid electrolyte, and can be fabricated by a semiconductor manufacturing process. The substrate may be a semiconductor substrate or a flexible substrate. The secondary battery has a function of being wirelessly charged.
    Type: Application
    Filed: December 8, 2023
    Publication date: April 4, 2024
    Inventors: Junpei MOMO, Kazutaka KURIKI, Hiromichi GODO, Shunpei YAMAZAKI
  • Publication number: 20240113207
    Abstract: A semiconductor device having favorable electrical characteristics is provided. A first oxide is formed over a substrate; a first insulator is formed over the first oxide; an opening reaching the first oxide is formed in the first insulator; a first oxide film is deposited in contact with the first oxide and the first insulator in the opening; a first insulating film is deposited over the first oxide film; microwave treatment is performed from above the first insulating film; heat treatment is performed on one or both of the first insulating film and the first oxide; a first conductive film is deposited over the first insulating film; and part of the first oxide film, part of the first insulating film, and part of the first conductive film are removed until a top surface of the first insulator is exposed, so that a second oxide, a second insulator, and a first conductor are formed.
    Type: Application
    Filed: December 14, 2023
    Publication date: April 4, 2024
    Inventors: Shunpei YAMAZAKI, Naoki OKUNO, Yasuhiro JINBO
  • Publication number: 20240113230
    Abstract: To provide a miniaturized transistor having highly stable electrical characteristics. Furthermore, also in a semiconductor device including the transistor, high performance and high reliability are achieved. The transistor includes, over a substrate, a conductor, an oxide semiconductor, and an insulator. The oxide semiconductor includes a first region and a second region. The resistance of the second region is lower than that of the first region. The entire surface of the first region in the oxide semiconductor is surrounded in all directions by the conductor with the insulator interposed therebetween.
    Type: Application
    Filed: December 6, 2023
    Publication date: April 4, 2024
    Inventors: Shunpei YAMAZAKI, Yuta ENDO, Yoko TSUKAMOTO
  • Publication number: 20240109785
    Abstract: A novel material and a transistor using a novel material are provided. A composite oxide includes at least two regions, one of which includes In, Zn and an element M1 (the element M1 is one or more of Al, Ga, Si, B, Y, Ti, Fe, Ni, Ge, Zr, Mo, La, Ce, Nd, Hf, Ta, W, Mg, V, Be, and Cu), and the other of which includes In, Zn, and an element M2 (the element M2 is one or more of Al, Ga, Si, B, Y, Ti, Fe, Ni, Ge, Zr, Mo, La, Ce, Nd, Hf, Ta, W, Mg, V, Be, and Cu). The proportion of the element M1 to In, Zn, and the element M1 in the region including the element M1 is less than that of the element M2 to In, Zn, and the element M2 in the region including the element M2. In an analysis of the composite oxide by X-ray diffraction, the diffraction pattern result in the X-ray diffraction is asymmetric with the angle at which the peak intensity of X-ray diffraction is detected as the symmetry axis.
    Type: Application
    Filed: December 12, 2023
    Publication date: April 4, 2024
    Inventor: Shunpei YAMAZAKI
  • Patent number: 11947228
    Abstract: An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: April 2, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Miyuki Hosoba, Junichiro Sakata, Hideaki Kuwabara
  • Patent number: 11950474
    Abstract: One embodiment of the present invention provides a highly reliable display device. In particular, a display device to which a signal or a power supply potential can be supplied stably is provided. Further, a bendable display device to which a signal or a power supply potential can be supplied stably is provided. The display device includes, over a flexible substrate, a display portion, a plurality of connection terminals to which a signal from an outside can be input, and a plurality of wirings. One of the plurality of wirings electrically connects one of the plurality of connection terminals to the display portion. The one of the plurality of wirings includes a first portion including a plurality of separate lines and a second portion in which the plurality of lines converge.
    Type: Grant
    Filed: May 4, 2023
    Date of Patent: April 2, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kensuke Yoshizumi
  • Patent number: 11949021
    Abstract: A semiconductor device having a structure which can prevent a decrease in electrical characteristics due to miniaturization is provided. The semiconductor device includes, over an insulating surface, a stack in which a first oxide semiconductor layer and a second oxide semiconductor layer are sequentially formed, and a third oxide semiconductor layer covering part of a surface of the stack. The third oxide semiconductor layer includes a first layer in contact with the stack and a second layer over the first layer. The first layer includes a microcrystalline layer, and the second layer includes a crystalline layer in which c-axes are aligned in a direction perpendicular to a surface of the first layer.
    Type: Grant
    Filed: April 11, 2023
    Date of Patent: April 2, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masayuki Sakakura, Hideomi Suzawa
  • Publication number: 20240107799
    Abstract: A novel functional panel that is highly convenient, useful, or reliable is provided. The functional panel includes a base material and a pair of pixels, and the base material covers the pair of pixels and has a light-transmitting property. The pair of pixels includes one pixel and another pixel, and the one pixel includes a light-emitting device and a first microlens. The light-emitting device emits light toward the base material, and the first microlens is interposed between the base material and the light emission and converges light. The first microlens includes a first surface and a second surface; the second surface is closer to the light-emitting device than the first surface is; and the second surface has a smaller radius of curvature than the first surface. The other pixel includes a photoelectric conversion device and a second microlens. The second microlens is interposed between the base material and the photoelectric conversion and converges external light incident from the base material side.
    Type: Application
    Filed: December 8, 2023
    Publication date: March 28, 2024
    Inventors: Shunpei YAMAZAKI, Daiki NAKAMURA, Ryo HATSUMI, Rai SATO, Shingo EGUCHI, Koji KUSUNOKI
  • Publication number: 20240107845
    Abstract: Provided is a high-resolution or high-definition display apparatus. The display apparatus includes a first light-emitting element, a second light-emitting element, and a sidewall. The first and second light-emitting elements each include a pixel electrode, a first light-emitting layer over the pixel electrode, an intermediate layer over the first light-emitting layer, a second light-emitting layer over the intermediate layer, and a common electrode over the second light-emitting layer. That is, the first and second light-emitting elements can have tandem structures. The pixel electrode, the first light-emitting layer, the intermediate layer, and the second light-emitting layer are separately provided between the light-emitting elements. The first light-emitting element and the second light-emitting element are adjacent to each other, and the sidewall is provided between the first light-emitting element and the second light-emitting element.
    Type: Application
    Filed: February 2, 2022
    Publication date: March 28, 2024
    Inventors: Shunpei YAMAZAKI, Kenichi OKAZAKI, Yasumasa YAMANE, Ryota HODO
  • Publication number: 20240105734
    Abstract: The stability of a step of processing a wiring formed using copper, aluminum, gold, silver, molybdenum, or the like is increased. Moreover, the concentration of impurities in a semiconductor film is reduced. Moreover, the electrical characteristics of a semiconductor device are improved. In a transistor including an oxide semiconductor film, an oxide film in contact with the oxide semiconductor film, and a pair of conductive films being in contact with the oxide film and including copper, aluminum, gold, silver, molybdenum, or the like, the oxide film has a plurality of crystal parts and has c-axis alignment in the crystal parts, and the c-axes are aligned in a direction parallel to a normal vector of a top surface of the oxide semiconductor film or the oxide film.
    Type: Application
    Filed: December 7, 2023
    Publication date: March 28, 2024
    Inventors: Shunpei YAMAZAKI, Junichi KOEZUKA, Yasutaka NAKAZAWA, Yukinori SHIMA, Masami JINTYOU, Masayuki SAKAKURA, Motoki NAKASHIMA
  • Publication number: 20240107854
    Abstract: The thickness of a display device including a touch sensor is reduced. Alternatively, the thickness of a display device having high display quality is reduced. Alternatively, a method for manufacturing a display device with high mass productivity is provided. Alternatively, a display device having high reliability is provided. Stacked substrates in each of which a sufficiently thin substrate and a relatively thick support substrate are stacked are used as substrates. One surface of the thin substrate of one of the stacked substrates is provided with a layer including a touch sensor, and one surface of the thin substrate of the other stacked substrate is provided with a layer including a display element. After the two stacked substrates are attached to each other so that the touch sensor and the display element face each other, the support substrate and the thin substrate of each stacked substrate are separated from each other.
    Type: Application
    Filed: December 11, 2023
    Publication date: March 28, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Yoshiharu HIRAKATA, Kensuke YOSHIZUMI
  • Publication number: 20240105853
    Abstract: A transistor that is to be provided has such a structure that a source electrode layer and a drain electrode layer between which a channel formation region is sandwiched has regions projecting in a channel length direction at lower end portions, and an insulating layer is provided, in addition to a gate insulating layer, between the source and drain electrode layers and a gate electrode layer. In the transistor, the width of the source and drain electrode layers is smaller than that of an oxide semiconductor layer in the channel width direction, so that an area where the gate electrode layer overlaps with the source and drain electrode layers can be made small. Further, the source and drain electrode layers have regions projecting in the channel length direction at lower end portions.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 28, 2024
    Inventors: Shunpei YAMAZAKI, Hideomi SUZAWA
  • Publication number: 20240107865
    Abstract: Manufacturing equipment for a light-emitting device with which steps from formation to sealing of a light-emitting element can be successively performed is provided. With the manufacturing equipment for a light-emitting device, a deposition step, a lithography step, and an etching step for forming an organic EL element and a sealing step by formation of a protective layer can be successively performed. Accordingly, a downscaled organic EL element with high luminance and high reliability can be formed. Moreover, the manufacturing equipment can have an in-line system where apparatuses are arranged in the order of process steps for the light-emitting device, resulting in high throughput manufacturing.
    Type: Application
    Filed: January 28, 2022
    Publication date: March 28, 2024
    Inventors: Shingo EGUCHI, Hiroki ADACHI, Kenichi OKAZAKI, Yasumasa YAMANE, Naoto KUSUMOTO, Kensuke YOSHIZUMI, Shunpei YAMAZAKI
  • Publication number: 20240105733
    Abstract: It is an object to manufacture a highly reliable display device using a thin film transistor having favorable electric characteristics and high reliability as a switching element. In a bottom gate thin film transistor including an amorphous oxide semiconductor, an oxide conductive layer having a crystal region is formed between an oxide semiconductor layer which has been dehydrated or dehydrogenated by heat treatment and each of a source electrode layer and a drain electrode layer which are formed using a metal material. Accordingly, contact resistance between the oxide semiconductor layer and each of the source electrode layer and the drain electrode layer can be reduced; thus, a thin film transistor having favorable electric characteristics and a highly reliable display device using the thin film transistor can be provided.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 28, 2024
    Inventors: Shunpei YAMAZAKI, Toshinari SASAKI, Junichiro SAKATA, Masashi TSUBUKU
  • Publication number: 20240105855
    Abstract: A novel semiconductor device is provided. A component extending in a first direction, and a first conductor and a second conductor extending in a second direction are provided. The component includes a third conductor, a first insulator, a first semiconductor, and a second insulator. In a first intersection portion of the component and the first conductor, the first insulator, the first semiconductor, the second insulator, a second semiconductor, and a third insulator are provided concentrically. In a second intersection portion of the component and the second conductor, the first insulator, the first semiconductor, the second insulator, a fourth conductor, and a fourth insulator are provided concentrically around the third conductor.
    Type: Application
    Filed: December 6, 2023
    Publication date: March 28, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Hitoshi KUNITAKE
  • Publication number: 20240107861
    Abstract: A display device capable of displaying high-quality images can be provided. A display device includes a first light-emitting element, a second light-emitting element, a first protective layer, a second protective layer, and a gap. The first light-emitting element includes a first lower electrode, a first EL layer over the first lower electrode, a first upper electrode over the first EL layer, and the second light-emitting element includes a second lower electrode, a second EL layer over the second lower electrode, and a second upper electrode over the second EL layer. The first light-emitting element and the second light-emitting element are adjacent to each other. The first protective layer is provided over the first light-emitting element and the second light-emitting element and includes a region in contact with the side surface of the first EL layer and the side surface of the second EL layer. The second protective layer is provided over the first protective layer.
    Type: Application
    Filed: December 7, 2021
    Publication date: March 28, 2024
    Inventors: Shunpei YAMAZAKI, Takayuki IKEDA, Ryota HODO, Yuichi YANAGISAWA
  • Publication number: 20240105137
    Abstract: A display panel for displaying an image is provided with a plurality of pixels arranged in a matrix. Each pixel includes one or more units each including a purality of subunits. Each subunit includes a transistor in which an oxide semiconductor layer which is provided so as to overlap a gate electrode with a gate insulating layer interposed therebetween, a pixel electrode which drives liquid crystal connected to a source or a drain of the transistor, a counter electrode which is provided so as to face the pixel electrode, and a liquid crystal layer provided between the pixel electrode and the counter electrode. In the display panel, a transistor whose off current is lower than 10zA/?m at room termperature per micrometer of the channel width and off current of the transistor at 85° C. can be lower than 100zA/?m per micrometer in the channel width.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 28, 2024
    Inventor: Shunpei YAMAZAKI