Abstract: An integrated circuit includes a logic circuit and an amplifying circuit, in particular a low-noise amplifying circuit. The amplifying circuit includes at least one first transistor. The gate of the first transistor is coupled to a signal input terminal, the source region and the drain region of the first transistor are formed respectively in the well region of the first transistor on both sides of the gate, wherein the source region is coupled to a reference voltage terminal, and the sheet resistance of the source region is lower than that of the drain region. The logic circuit includes at least one second transistor. The sheet resistances of the source region and the drain region of the second transistor are equal.

Abstract: A radio frequency signal amplification device includes an amplification circuit, an impedance matching circuit, a frequency detection circuit, and a control circuit. The amplification circuit has an input terminal and an output terminal. The amplification circuit amplifies a radio frequency (RF) signal received from the input terminal, and generates an amplified radio frequency signal to the output terminal. The impedance matching circuit is coupled to the input terminal or the output terminal of the amplification circuit. The impedance matching circuit receives the radio frequency signal and provides an impedance matching the radio frequency signal, or receives the amplified radio frequency signal and provides an impedance matching the amplified radio frequency signal. The frequency detection circuit determines a frequency band to which the radio frequency signal belongs. The control circuit adjusts the impedance of the impedance matching circuit according to the frequency band.

Abstract: An integrated circuit includes a logic circuit and an amplifying circuit, in particular a low-noise amplifying circuit. The amplifying circuit includes at least one first transistor. The gate of the first transistor is coupled to a signal input terminal, the source region and the drain region of the first transistor are formed respectively in the well region of the first transistor on both sides of the gate, wherein the source region is coupled to a reference voltage terminal, and the sheet resistance of the source region is lower than that of the drain region. The logic circuit includes at least one second transistor. The sheet resistances of the source region and the drain region of the second transistor are equal.

Abstract: A radio frequency signal amplification device includes an amplification circuit, an impedance matching circuit, a frequency detection circuit, and a control circuit. The amplification circuit has an input terminal and an output terminal. The amplification circuit amplifies a radio frequency (RF) signal received from the input terminal, and generates an amplified radio frequency signal to the output terminal. The impedance matching circuit is coupled to the input terminal or the output terminal of the amplification circuit. The impedance matching circuit receives the radio frequency signal and provides an impedance matching the radio frequency signal, or receives the amplified radio frequency signal and provides an impedance matching the amplified radio frequency signal. The frequency detection circuit determines a frequency band to which the radio frequency signal belongs. The control circuit adjusts the impedance of the impedance matching circuit according to the frequency band.

Abstract: A pizeoresistive type Z-axis accelerometer is provided, including a substrate; a plurality of anchors formed over the substrate; a plurality of cantilever beams, wherein the cantilever beams include a piezoresistive material; and a proof mass, wherein the proof mass is suspended over the substrate by respectively connecting the proof mass with the anchors, and the accelerometer senses a movement of the proof mass by the piezoresistive material.

Abstract: A sensing apparatus includes an acceleration sensing unit, for measuring an acceleration applied to a proof mass, further including: a proof mass; a carrier signal source, for providing a carrier signal; a capacitive half-bridge, including a first and a second capacitor, wherein each capacitor is coupled to the proof mass and the carrier signal source, one with a positive electrode and the other one with a negative electrode, and the acceleration applied to the proof mass makes the carrier signal flow through the first and the second capacitor so that the first capacitor and the second capacitor respectively generates a first voltage and a second voltage variation which have opposite phases with each other; and an instrumentation amplifier, for receiving and amplifying the first voltage and the second voltage variation, whereby the magnitude and the direction of the acceleration applied to the proof mass is determined.

Abstract: A pizeoresistive type Z-axis accelerometer is provided, including a substrate; a plurality of anchors formed over the substrate; a plurality of cantilever beams, wherein the cantilever beams include a piezoresistive material; and a proof mass, wherein the proof mass is suspended over the substrate by respectively connecting the proof mass with the anchors, and the accelerometer senses a movement of the proof mass by the piezoresistive material.

Abstract: A sensing apparatus includes an acceleration sensing unit, for measuring an acceleration applied to a proof mass, further including: a proof mass; a carrier signal source, for providing a carrier signal; a capacitive half-bridge, including a first and a second capacitor, wherein each capacitor is coupled to the proof mass and the carrier signal source, one with a positive electrode and the other one with a negative electrode, and the acceleration applied to the proof mass makes the carrier signal flow through the first and the second capacitor so that the first capacitor and the second capacitor respectively generates a first voltage and a second voltage variation which have opposite phases with each other; and an instrumentation amplifier, for receiving and amplifying the first voltage and the second voltage variation, whereby the magnitude and the direction of the acceleration applied to the proof mass is determined.

Abstract: Systems and methods for delivering real-time video imagery to a receiver over a channel. A current video frame is captured and digitized. The digitized frame is divided into a plurality of macroblocks. For each macroblock an intra, inter or skip mode coding mode is determined. Based on instantaneous feedback received from a receiver regarding successfully received video packets for a prior video frame, a quantization parameter is set and the macroblocks are encoded in accordance with their respective selected coding mode. Synchronized error concealment is performed at both the encoder and decoder sides of the system and retransmission of lost video packets, using an adaptive retransmission scheme, are performed in accordance with the instantaneous feedback from the receiver.

Abstract: An adaptive bias circuit which provides a more sensitive adaptive bias current with respect to power level is used for biasing an electronic circuit. The adaptive bias circuit has a first transistor coupled to a power supply, a voltage bias circuit coupled to the first transistor and the power supply biasing the first transistor, and a first power coupling module coupled to the first transistor and the electronic circuit for coupling a portion of input signal power to the first transistor. A second transistor is coupled to the first transistor and the power supply to increase the current gain of the adaptive bias circuit, and a second current coupling module is coupled to the second transistor and the electronic circuit to provide adaptive bias current to the electronic circuit.

Abstract: An adaptive bias circuit which provides a more sensitive adaptive bias current with respect to power level is used for biasing an electronic circuit. The adaptive bias circuit has a first transistor coupled to a power supply, a voltage bias circuit coupled to the first transistor and the power supply biasing the first transistor, and a first power coupling module coupled to the first transistor and the electronic circuit for coupling a portion of input signal power to the first transistor. A second transistor is coupled to the first transistor and the power supply to increase the current gain of the adaptive bias circuit, and a second current coupling module is coupled to the second transistor and the electronic circuit to provide adaptive bias current to the electronic circuit.

Abstract: A mixer for down-converting an input signal to an output signal is disclosed. The mixer includes an amplifying circuit and a down-converting circuit. The amplifying circuit is utilized for amplifying the input signal to generate an amplified signal. The down-converting circuit includes a filtering module, a loading module, and a down-converting module. The filtering module is coupled to the amplifying circuit, and is utilized for filtering low-frequency components in the amplified signal. The loading module is coupled to the amplifying circuit and a predetermined voltage level, and is utilized for providing a DC bias voltage to the amplifying circuit. The down-converting module is coupled to the filtering module and the predetermined voltage level, and is utilized for generating the output signal according to a local oscillating signal.

Abstract: A high-efficiency single-to-differential amplifier has a first transistor acting as a first amplification stage. A second transistor, a third transistor, a first choke, a second choke, and a first capacitor form a second single-to-differential amplification stage. The first amplification stage receives and amplifies an input signal, outputs the amplified signal to the second single-to-differential amplification stage through a coupling module, and concurrently provides DC bias current to the second single-to-differential amplification stage through a tank. The second single-to-differential amplification stage reuses DC current of the first amplification stage, amplifies the output signal of the first amplification stage, and transfers it to a differential output.

Abstract: Systems and methods for delivering real-time video imagery to a receiver over a channel. A current video frame is captured and digitized. The digitized frame is divided into a plurality of macroblocks. For each macroblock an intra, inter or skip mode coding mode is determined. Based on instantaneous feedback received from a receiver regarding successfully received video packets for a prior video frame, a quantization parameter is set and the macroblocks are encoded in accordance with their respective selected coding mode. Synchronized error concealment is performed at both the encoder and decoder sides of the system and retransmission of lost video packets, using an adaptive retransmission scheme, are performed in accordance with the instantaneous feedback from the receiver.

Abstract: An active mixer with self-adaptive bias feedback is described and resolves a poor linearity, inconvenient design of a bias circuit, and other defects of a conventional mixer. The dual self-feedback bias structure according to this invention is used. The active mixer with self-adaptive bias feedback has a power supply, an RF input match/drive unit, a local oscillator input match/drive unit, a mixer core unit, a self-adaptive twin bias circuit and an IF output match/buffer unit. This invention improves the linearity of a conventional mixer and does not affect other characteristics. There are fewer components in this invention; an area of the mixer is thus smaller. Further, this invention may improve temperature response, increase yield factor, and lower unit cost. The dual self-feedback bias structure is designed for further application to other semiconductor manufacturing processes, components, and microwave products.

Abstract: A mixer for down-converting an input signal to an output signal is disclosed. The mixer includes an amplifying circuit and a down-converting circuit. The amplifying circuit is utilized for amplifying the input signal to generate an amplified signal. The down-converting circuit includes a filtering module, a loading module, and a down-converting module. The filtering module is coupled to the amplifying circuit, and is utilized for filtering low-frequency components in the amplified signal. The loading module is coupled to the amplifying circuit and a predetermined voltage level, and is utilized for providing a DC bias voltage to the amplifying circuit. The down-converting module is coupled to the filtering module and the predetermined voltage level, and is utilized for generating the output signal according to a local oscillating signal.

Abstract: A linearized bias circuit with adaptation resolves the problem happening to the power amplifier with conventional bias circuit that the DC and AC characteristics of the power amplifier shift or even deteriorate due to a temperature variation. The linearized bias circuit with adaptation has a reference voltage source, a first voltage source, a first resistor, a second resistor, a first NPN transistor, a second NPN transistor, and a third NPN transistor. The present invention has the characteristics of bias current temperature compensation, gain and phase compensations to achieve high linearity for the conventional power amplifier and reducing the DC consumption power. At the same time, the quantity of the required elements and layout area in the present invention are small so that the design complexity can be reduced for improving yield, reducing IC layout area, and reducing cost.

Abstract: high-gain and low-noise low noise amplifier (LNA) includes a differential amplifier, a pre-amplifier and an impedance matching network. The differential amplifier includes a first input end and a second input end coupled to a grounded impedance. The pre-amplifier includes an input end and an output end. The impedance matching network is coupled between the first input end of the differential amplifier and the output end of the pre-amplifier for matching an input impedance of the differential amplifier with an output impedance of the pre-amplifier. The present invention provides a LNA structure with low noise, high gain and easy design.

Abstract: A single-ended input to differential output LNA with a cascode topology of the present invention overcomes a much greater consumption of current and area for the single-ended input to differential output LNA of the prior art. The LNA needs to supply an operating bias for each transistor. The LNA has a few transistors, a few capacitive impedances, and a few inductive impedances. The main objective of the present invention not only reduces costs and conserves area and current consumption, but also has a much higher linearity and gain under the same current consumption when compare to the prior art.

Abstract: A linearized bias circuit with adaptation resolves the problem happening to the power amplifier with conventional bias circuit that the DC and AC characteristics of the power amplifier shift or even deteriorate due to a temperature variation. The linearized bias circuit with adaptation has a reference voltage source, a first voltage source, a first resistor, a second resistor, a first NPN transistor, a second NPN transistor, and a third NPN transistor. The present invention has the characteristics of bias current temperature compensation, gain and phase compensations to achieve high linearity for the conventional power amplifier and reducing the DC consumption power. At the same time, the quantity of the required elements and layout area in the present invention are small so that the design complexity can be reduced for improving yield, reducing IC layout area, and reducing cost.