Patents by Inventor Simon Edwards

Simon Edwards has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180131327
    Abstract: Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit and stacked transistors standby current during operation in the standby mode and to reduce impedance presented to the gates of the stacked transistors during operation in the active mode while maintaining voltage compliance of the stacked transistors during both modes of operation.
    Type: Application
    Filed: August 29, 2017
    Publication date: May 10, 2018
    Inventors: Poojan Wagh, Kashish Pal, Robert Mark Englekirk, Tero Tapio Ranta, Keith Bargroff, Simon Edward Willard
  • Patent number: 9929588
    Abstract: A docking station for a mobile robot comprising a base portion that is locatable on a floor surface and a rear portion that is pivotable with respect to the base portion, thereby permitting a user to place the docking station on the floor in an unfolded configuration but to store the docking station in a folded configuration.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: March 27, 2018
    Assignee: DYSON TECHNOLOGY LIMITED
    Inventors: Simon Edward Ireland, Leanne Joyce Garner, Adam David Lambert
  • Publication number: 20180082524
    Abstract: A wagering game system and its operations are described herein. In some embodiments, the operations can include detecting that one or more wearable computers are within a proximity range to a wagering game machine. In some examples, the operations further include determining one or more characteristics associated with the one or more wearable computers in response to the detecting that the one or more wearable computers are within the proximity range to the wagering game machine. In some examples, the operations further include providing a feature associated with a wagering game based on the one or more characteristics of the one or more wearable computers.
    Type: Application
    Filed: November 28, 2017
    Publication date: March 22, 2018
    Inventors: Michael R. BYTNAR, Michael Vincent DICILLO, Patrick M. GUSTAFSON, Jeremy Michael HORNIK, Gary John OSWALD, Richard Barry ROBBINS, Nickey C. SHIN, Jesse M. SMITH, Simon Edward SUNBLADE, Jamie W. VANN, Muthu VELU, Matthew J. WARD, Steven J. ZOLOTO, Dale Robert BUCHHOLZ, Mark B. GAGNER, Craig Joe SYLLA
  • Patent number: 9918602
    Abstract: A cyclonic separator comprising a cyclone chamber defined between an outer wall and a shroud. The shroud comprises an inlet opening through which fluid enters the cyclone chamber, and a plurality of perforations through which fluid exits the cyclone chamber. Fluid within the cyclone chamber is then free to spiral about the shroud and over the inlet opening.
    Type: Grant
    Filed: April 16, 2012
    Date of Patent: March 20, 2018
    Assignee: Dyson Technology Limited
    Inventors: James Dyson, Jeremy William Crouch, James Stuart Robertson, Peter David Gammack, Simon Edward Ireland
  • Patent number: 9882531
    Abstract: A transistor stack can include a combination of floating and body tied devices. Improved performance of the RF amplifier can be obtained by using a single body tied device as the input transistor of the stack, or as the output transistor of the stack, while other transistors of the stack are floating transistors. Transient response of the RF amplifier can be improved by using all body tied devices in the stack.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: January 30, 2018
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Simon Edward Willard, Chris Olson, Tero Tapio Ranta
  • Publication number: 20180004219
    Abstract: An apparatus for guiding an autonomous vehicle towards a docking station including an autonomous vehicle with a camera-based sensing system, a drive system for driving the autonomous vehicle, and a control system for controlling the drive system. The apparatus includes a docking station including a first fiducial marker and a second fiducial marker, wherein the second fiducial marker is positioned on the docking station to define a predetermined relative spacing with the first fiducial marker, wherein the control system is operable to receive an image provided by the camera-based sensing system, the image including a representation of the first and second fiducial markers, and to control the drive system so as to guide the autonomous vehicle towards the base station based on a difference between the representation of the first and second fiducial markers in the received image and the predetermined relative spacing between the first and second fiducial markers.
    Type: Application
    Filed: August 24, 2017
    Publication date: January 4, 2018
    Applicant: Dyson Technology Limited
    Inventors: Michael David ALDRED, Simon EDWARDS-PARTON
  • Patent number: 9853468
    Abstract: A robotic system comprising a mobile robot including a body housing a rechargeable power source and first electrical contact means disposed on the body and a docking station including second electrical contact means, wherein the mobile robot is dockable on the docking station in order to charge the rechargeable power source. The first electrical contact means includes at least one electrical contact aligned on a first contact axis and the second electrical contact means includes at least one elongate contact, wherein when the robot is docked on the docking station such that electrical contact is established between the first electrical contact means and the electrical contact means. The at least one elongate contact extends in a direction that is transverse to the first contact axis which permits electrical contact to be established between the robot and the docking station while accommodating a degree of lateral and angular misalignment therebetween.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: December 26, 2017
    Assignee: DYSON TECHNOLOGY LIMITED
    Inventor: Simon Edward Ireland
  • Patent number: 9847348
    Abstract: Systems, methods and apparatus for coexistence of high voltage and low voltage devices and circuits on a same integrated circuit fabricated in silicon-on-insulator (SOI) technology are described. In particular, techniques for mitigating back gate effects are described, including using of resistive and/or capacitive couplings to control surface potentials at regions of a substrate used for the SOI fabrication proximate the high voltage and low voltage devices and circuits. In one case, an N-type implant is used to provide a high potential differential with respect to a substrate potential.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: December 19, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Buddhika Abesingha, Simon Edward Willard, Alain Duvallet, Merlin Green, Sivakumar Kumarasamy
  • Patent number: 9839789
    Abstract: An improved user interface for a defibrillator (100) capable of being used with paddle electrodes (180) and adhesive pad electrodes (190). A shock delivery button (110) located on the defibrillator control panel delivers a shock through the pad electrodes. A second shock delivery button (210), located on the paddle electrodes, delivers a shock through the paddle electrodes. Both shock delivery buttons are configured with the same shape, operation and illumination in order to reduce user confusion.
    Type: Grant
    Filed: January 24, 2012
    Date of Patent: December 12, 2017
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Simon Edward Kozin, Anthony Matheson, Constance F. Matheson
  • Patent number: 9843293
    Abstract: Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit and stacked transistors standby current during operation in the standby mode and to reduce impedance presented to the gates of the stacked transistors during operation in the active mode while maintaining voltage compliance of the stacked transistors during both modes of operation.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: December 12, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Poojan Wagh, Kashish Pal, Robert Mark Englekirk, Tero Tapio Ranta, Keith Bargroff, Simon Edward Willard
  • Patent number: 9842858
    Abstract: Systems, methods, and apparatus for an improved body tie construction are described. The improved body tie construction is configured to have a lower resistance body tie exists when the transistor is “off” (Vg approximately 0 volts). When the transistor is “on” (Vg>Vt), the resistance to the body tie is much higher, reducing the loss of performance associated with presence of body tie. Space efficient Body tie constructions adapted for cascode configurations are also described.
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: December 12, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventor: Simon Edward Willard
  • Patent number: 9837412
    Abstract: Systems, methods, and apparatus for an improved protection from charge injection into layers of a device using resistive structures are described. Such resistive structures, named s-contacts, can be made using simpler fabrication methods and less fabrication steps. In a case of metal-oxide-semiconductor (MOS) field effect transistors (FETs), s-contacts can be made with direct connection, or resistive connection, to all regions of the transistors, including the source region, the drain region and the gate.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: December 5, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Befruz Tasbas, Simon Edward Willard, Alain Duvallet, Sinan Goktepeli
  • Publication number: 20170338251
    Abstract: Systems, methods, and apparatus for an improved body tie construction that produces all the benefits of conventional body tie (H-gate, T-gate), without the limitations and degradations associated with those constructions are described. The improved body tie construction is configured to have a lower resistance body tie when the transistor is “off” (Vg approximately 0 volts). When the transistor is “on” (Vg>Vt), the resistance to the body tie is much higher, reducing the loss of performance associated with presence of body tie.
    Type: Application
    Filed: April 10, 2017
    Publication date: November 23, 2017
    Inventor: Simon Edward Willard
  • Publication number: 20170338230
    Abstract: Systems, methods, and apparatus for an improved protection from charge injection into layers of a device using resistive structures are described. Such resistive structures, named s-contacts, can be made using simpler fabrication methods and less fabrication steps. In a case of metal-oxide-semiconductor (MOS) field effect transistors (FETs), s-contacts can be made with direct connection, or resistive connection, to all regions of the transistors, including the source region, the drain region and the gate.
    Type: Application
    Filed: April 14, 2017
    Publication date: November 23, 2017
    Inventors: Befruz Tasbas, Simon Edward Willard, Alain Duvallet, Sinan Goktepeli
  • Patent number: 9791075
    Abstract: A method providing a first tubular workpiece having a first weld surface at an end thereof, and a second tubular workpiece having a second weld surface at an end thereof; aligning the workpieces on a common axis with the weld surfaces facing each other, rotating one workpiece about the axis relative to the other workpiece, and engaging the first and second weld surfaces such that the rotation raises the temperature at the weld surfaces to create a weld interface; and ceasing the rotation and allowing the weld interface to cool to weld the workpieces together at the interface. The first weld surface is an apex region of an annular projection at the end of the first workpiece, on a longitudinal section through the aligned workpieces the annular projection having a profile in which radially inner and outer side surfaces of the annular projection taper towards the apex region.
    Type: Grant
    Filed: August 3, 2015
    Date of Patent: October 17, 2017
    Assignee: ROLLS-ROYCE plc
    Inventors: Simon Edward Bray, Andrew Robert Walpole
  • Patent number: 9726635
    Abstract: A pair of fuel cells are configured as a hydrogen purity monitor. A first cell, acting as a reference cell, is configured to generate electrical current from the electrochemical reaction of hydrogen and oxidant and has a first fuel inlet configured to receive hydrogen from a first hydrogen source. A second fuel cell, acting as a test cell, is configured to generate electrical current from the electrochemical reaction of hydrogen and oxidant and has a second fuel inlet configured to receive hydrogen from a second hydrogen source. A control system is configured to apply an electrical load to each fuel cell and determine an electrical output of each fuel cell. The control system has a comparator for comparing the electrical outputs of the first and second fuel cells and a purity monitor output configured to give an indication of hydrogen purity based on an output of the comparator.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: August 8, 2017
    Assignee: Intelligent Energy Limited
    Inventors: Christopher James Kirk, Simon Edward Foster
  • Publication number: 20170170177
    Abstract: Systems, methods, and apparatus for an improved protection from charge injection into layers of a device using resistive structures are described. Such resistive structures, named s-contacts, can be made using simpler fabrication methods and less fabrication steps. In a case of metal-oxide-semiconductor (MOS) field effect transistors (FETs), s-contacts can be made with direct connection, or resistive connection, to all regions of the transistors, including the source region, the drain region and the gate.
    Type: Application
    Filed: December 9, 2015
    Publication date: June 15, 2017
    Inventors: Befruz Tasbas, Simon Edward Willard, Alain Duvallet, Sinan Goktepeli
  • Patent number: 9675567
    Abstract: Compounds of formula (I): and pharmacologically acceptable salts and pro-drugs thereof, wherein the variables are as defined in the specification, are potassium ion channel modulators, making them particularly useful in treating and preventing conditions such as pain, lower urinary tract disorders and the like.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: June 13, 2017
    Assignee: Ramot at Tel-Aviv University Ltd.
    Inventors: Simon Edwards, Ruth Meriel Kimberley, Richard Edward Armer, Mohammed Nawaz Khan
  • Publication number: 20170141126
    Abstract: Systems, methods, and apparatus for an improved body tie construction are described. The improved body tie construction is configured to have a lower resistance body tie exists when the transistor is “off” (Vg approximately 0 volts). When the transistor is “on” (Vg>Vt), the resistance to the body tie is much higher, reducing the loss of performance associated with presence of body tie. Space efficient Body tie constructions adapted for cascode configurations are also described.
    Type: Application
    Filed: March 23, 2016
    Publication date: May 18, 2017
    Inventor: Simon Edward Willard
  • Publication number: 20170141134
    Abstract: Systems, methods, and apparatus for an improved body tie construction that produces all the benefits of conventional body tie (H-gate, T-gate), without the limitations and degradations associated with those constructions are described. The improved body tie construction is configured to have a lower resistance body tie when the transistor is “off” (Vg approximately 0 volts). When the transistor is “on” (Vg>Vt), the resistance to the body tie is much higher, reducing the loss of performance associated with presence of body tie.
    Type: Application
    Filed: November 18, 2015
    Publication date: May 18, 2017
    Inventor: Simon Edward Willard