Abstract: A graphics processing system for a head mounted display (or other non-standard projection display) comprises a low latency distortion unit which is separate from a graphics processing unit in the graphics processing system. The low latency distortion unit receives pixel data generated by the graphics processing system using a standard projection and performs a mapping operation to introduce distortion which is dependent upon the optical properties of the optical arrangement within the head mounted display. The distorted pixel data which is generated by the low latency distortion unit is then output to the display in the head mounted display.

Abstract: A method of compressing image data comprising a set of image values each representing a position in image-value space so as to define an occupied region thereof. The method comprises selectively applying a series of compression transforms to subsets of the image data items to generate a transformed set of image data items occupying a compacted region of value space. The method further comprises identifying a set of one or more reference data items that quantizes the compacted region in value space. For each image data item in the set of image data items, a sequence of decompression transforms from a fixed set of decompression transforms is identified that generates an approximation of that image data item when applied to a selected one of the one or more reference data items. Each image data item in the set of image data items is encoded as a representation of the identified sequence of decompression transforms for that image data item.

Abstract: A hierarchical acceleration structure for use in a ray tracing system. When generating a node for the hierarchical acceleration structure, the primitives in a particular portion of the 3D scene may be alternatively bounded by different shaped volumes. These bounding volumes or ‘bounding regions’ can be Axis Aligned Bounding Boxes (AABBs), although other bounding volumes can be used. The ray tracing system may use sets of two or more bounding volumes in a 3D scene to bound all the primitives within that portion. The choice of how to create sets of multiple bounding volumes within a portion of the 3D scene may be done by using a binary space partition (BSP). Different sets of bounding regions may present different amounts of surface area for a hypothetical ray entering the portion of the 3D scene dependent upon the expected ray direction or angle.

Abstract: A method and an intersection testing module for performing intersection testing of a ray with a box in a ray tracing system. The ray and the box are defined in a 3D space using a space-coordinate system, and the ray is defined with a ray origin and a ray direction. A ray-coordinate system is used to perform intersection testing, wherein the ray-coordinate system has an origin at the ray origin, and the ray-coordinate system has three basis vectors. A first of the basis vectors is aligned with the ray direction. A second and a third of the basis vectors: (i) are both orthogonal to the first basis vector, (ii) are not parallel with each other, and (iii) have a zero as one component when expressed in the space-coordinate system. A result of performing the intersection testing is outputted for use by the ray tracing system.

Abstract: Methods for converting an n-bit number into an m-bit number for situations where n>m and also for situations where n<m, where n and m are integers. The methods use truncation or bit replication followed by the calculation of an adjustment value which is applied to the replicated number.

Abstract: A method of converting 10-bit pixel data (e.g. 10:10:10:2 data) into 8-bit pixel data involves converting the 10-bit values to 7-bits or 8-bits and generating error values for each of the converted values. Two of the 8-bit output channels comprise a combination of a converted 7-bit value and one of the bits from the fourth input channel. A third 8-bit output channel comprises the converted 8-bit value and the fourth 8-bit output channel comprises the error values. In various examples, the bits of the error values may be interleaved when they are packed into the fourth output channel.

Abstract: A method and an intersection testing module for performing intersection testing of a ray with a convex polygon in a ray tracing system. The ray and the convex polygon are defined in a 3D space using a space-coordinate system. The ray is defined with a ray origin and a ray direction. A ray-coordinate system is used to perform intersection testing, wherein the ray-coordinate system has an origin at the ray origin, and wherein the ray-coordinate system has three basis vectors. A first of the basis vectors is aligned with the ray direction. A second and a third of the basis vectors: (i) are both orthogonal to the first basis vector, (ii) are not parallel with each other, and (iii) have a zero as one component when expressed in the space-coordinate system. A result of performing the intersection testing is outputted for use by the ray tracing system.

Abstract: Intersection testing is performed for a ray with respect to a plurality of convex polygons, each of which is defined by an ordered set of vertices, wherein a shared vertex is used to define at least two of the convex polygons. The vertices of the convex polygons are projected onto a pair of axes orthogonal to the ray direction. A vertex ordering scheme defines an ordering of the projected vertices which is independent of the ordering of the vertices in the ordered sets. For each of the convex polygons, for each edge of the convex polygon defined by two of the projected vertices, a parameter indicative of which side of the edge the ray passes on is determined, wherein if the ray is determined to intersect a point on the edge then the parameter is determined based upon whether the ordering of the projected vertices defining the edge matches the ordering of the vertices in the ordered set of vertices defining the convex polygon.

Abstract: Hardware tessellation units include a sub-division logic block that comprises hardware logic arranged to perform a sub-division of a patch into two (or more) sub-patches. The hardware tessellation units also include a decision logic block that is configured to determine whether a patch is to be sub-divided or not and one or more hardware elements that control the order in which tessellation occurs. In various examples, this hardware element is a patch stack that operates a first-in-last-out scheme and in other examples, there are one or more selection logic blocks that are configured to receive patch data for more than one patch or sub-patch and output the patch data for a selected one of the received patches or sub-patches.

Abstract: A method of data compression in which the total size of the compressed data is determined and based on that determination, the bit depth of the input data may be reduced before the data is compressed. The bit depth that is used may be determined by comparing the calculated total size to one or more pre-defined threshold values to generate a mapping parameter. The mapping parameter is then input to a remapping element that is arranged to perform the conversion of the input data and then output the converted data to a data compression element. The value of the mapping parameter may be encoded into the compressed data so that it can be extracted and used when subsequently decompressing the data.

Abstract: A tessellation method uses vertex tessellation factors. For a quad patch, the method involves comparing the vertex tessellation factors for each vertex of the quad patch to a threshold value and if none exceed the threshold, the quad is sub-divided into two or four triangles. If at least one of the four vertex tessellation factors exceeds the threshold, a recursive or iterative method is used which considers each vertex of the quad patch and determines how to further tessellate the patch dependent upon the value of the vertex tessellation factor of the selected vertex or dependent upon values of the vertex tessellation factors of the selected vertex and a neighbor vertex. A similar method is described for a triangle patch.

Abstract: A method and apparatus for rendering a computer-generated image using a stencil buffer is described. The method divides an arbitrary closed polygonal contour into first and higher level primitives, where first level primitives correspond to contiguous vertices in the arbitrary closed polygonal contour and higher level primitives correspond to the end vertices of consecutive primitives of the immediately preceding primitive level. The method reduces the level of overdraw when rendering the arbitrary polygonal contour using a stencil buffer compared to other image space methods. A method of producing the primitives in an interleaved order, with second and higher level primitives being produced before the final first level primitives of the contour, is described which improves cache hit rate by reusing more vertices between primitives as they are produced.

Abstract: A method and system is provided for culling hidden objects in a tile-based graphics system before they are indicated in a display list for a tile. A rendering space is divided into a plurality of regions which may for example be a plurality of tiles or a plurality of areas into which one or more tiles are divided. Depth thresholds for the regions, which are used to identify hidden objects for culling, are updated when an object entirely covers a region and in dependence on a comparison between a depth value for the object and the depth threshold for the region. For example, if the depth threshold is a maximum depth threshold, the depth threshold may be updated if an object entirely covers the tile and the maximum depth value of the object is less than the maximum depth threshold.

Abstract: A method of compressing image data comprising a set of image values each representing a position in image-value space so as to define an occupied region thereof. The method comprises selectively applying a series of compression transforms to subsets of the image data items to generate a transformed set of image data items occupying a compacted region of value space. The method further comprises identifying a set of one or more reference data items that quantizes the compacted region in value space. For each image data item in the set of image data items, a sequence of decompression transforms from a fixed set of decompression transforms is identified that generates an approximation of that image data item when applied to a selected one of the one or more reference data items. Each image data item in the set of image data items is encoded as a representation of the identified sequence of decompression transforms for that image data item.

Abstract: A lossy method of compressing data, such as image data, which uses wrap-around wavelet compression is described. Each data value is divided into two parts and the first parts, which comprise the most significant bits from the data values, are compressed using wrap-around wavelet compression. Depending upon the target compression ratio and the compression ratio achieved by compressing just the first parts, none, one or more bits from the second parts, or from a data value derived from the second parts, may be appended to the compressed first parts. The method described may be lossy or may be lossless. A corresponding decompression method is also described.

Abstract: A method of converting 10-bit pixel data (e.g. 10:10:10:2 data) into 8-bit pixel data involves converting the 10-bit values to 7-bits or 8-bits and generating error values for each of the converted values. Two of the 8-bit output channels comprise a combination of a converted 7-bit value and one of the bits from the fourth input channel. A third 8-bit output channel comprises the converted 8-bit value and the fourth 8-bit output channel comprises the error values. In various examples, the bits of the error values may be interleaved when they are packed into the fourth output channel.

Abstract: A graphics processing system includes a tiling unit configured to tile a scene into a plurality of tiles. A processing unit identifies tiles of the plurality of tiles that are each associated with at least a predetermined number of primitives. A memory management unit allocates a portion of memory to each of the identified tiles and does not allocate a portion of memory for each of the plurality of tiles that are not identified by the processing unit. A rendering unit renders each of the identified tiles and does not render tiles that are not identified by the processing unit.

Abstract: A tessellation method uses both vertex tessellation factors and displacement factors defined for each vertex of a patch, which may be a quad, a triangle or an isoline. The method is implemented in a computer graphics system and involves calculating a vertex tessellation factor for each corner vertex in one or more input patches. Tessellation is then performed on the plurality of input patches using the vertex tessellation factors. The tessellation operation involves adding one or more new vertices and calculating a displacement factor for each newly added vertex. A world space parameter for each vertex is subsequently determined by calculating a target world space parameter for each vertex and then modifying the target world space parameter for a vertex using the displacement factor for that vertex.

Abstract: A method and an intersection testing module in a ray tracing system for performing intersection testing for a ray with respect to a plurality of convex polygons, each of which is defined by an ordered set of vertices, wherein at least one of the vertices is a shared vertex which is used to define at least two of the convex polygons. The vertices of the convex polygons are projected onto a pair of axes orthogonal to the ray direction. A vertex ordering scheme defines an ordering of the projected vertices which is independent of the ordering of the vertices in the ordered sets.

Abstract: A graphics processing system includes a tiling unit configured to tile a first view of a scene into a plurality of tiles, a processing unit configured to identify a first subset of the tiles that are associated with regions of the scene that are viewable in a second view, and a rendering unit configured to render to a render target each of the identified tiles.