Patents by Inventor Sing Chan

Sing Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6743666
    Abstract: A method of making a semiconductor device includes thickening source and drain regions. After a field effect device having a source region, a drain region, and a gate, is formed, a layer of semiconductor material is deposited on the device by a directional deposition method, such as collimated sputtering. Then the semiconductor material is selectively removed from side walls on either side of the gate, such as by isotropic back etching, leaving thickened semiconductor material in the source and drain regions, and on the gate.
    Type: Grant
    Filed: April 29, 2002
    Date of Patent: June 1, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Simon Siu-Sing Chan
  • Patent number: 6737337
    Abstract: A method of manufacturing a semiconductor device includes forming a buried insulator layer of a semiconductor-on-insulator (SOI) wafer with a dopant material, such as boron, therein. The insulator material with the dopant material may be formed by a number of methods, for example by thermal oxidation of a semiconductor wafer in the presence of an atmosphere containing the dopant material, by co-deposition of the insulator material and the dopant material, or by co-implantation of an insulator material and the dopant material. The dopant material may be the same as a dopant material in at least a region (e.g., a source, drain, or channel region) of a semiconductor material layer which overlies the insulator layer. The dopant material in the buried insulator layer may advantageously reduce the tendency of dopant material to migrate from the overlying material to the insulator layer, such as during manufacturing operations involving heating.
    Type: Grant
    Filed: April 29, 2002
    Date of Patent: May 18, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Simon Siu-Sing Chan, Qi Xiang
  • Patent number: 6670259
    Abstract: The present invention relates to a method of manufacturing a silicon-on-insulator substrate, comprising the steps of (1) providing a silicon-on-insulator semiconductor wafer having at least one surface of a silicon film; (2) implanting an inert atom into the at least one surface to form a damaged surface layer including a gettering site on the silicon film and to leave an undamaged region of the silicon film; (3) subjecting the wafer to conditions to getter at least one impurity from the silicon film into the gettering site; and (4) removing the damaged surface layer.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: December 30, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Simon Siu-Sing Chan
  • Patent number: 6624476
    Abstract: A semiconductor-on-insulator (SOI) device includes a buried insulator layer and an overlying semiconductor layer. Portions of the insulator layer are doped with the same dopant material, for example boron, as is in corresponding portions of the overlying surface semiconductor layer. A peak concentration of the dopant material may be located in the insulator material, or may be located in a lower portion of the surface semiconductor layer. The dopant material in the insulator layer may prevent depletion of dopant material from portions of the surface semiconductor layer, such as from channel portions of NMOS transistors.
    Type: Grant
    Filed: April 29, 2002
    Date of Patent: September 23, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Simon Siu-Sing Chan, Matthew S. Buynoski, Qi Xiang
  • Patent number: 6537866
    Abstract: A method for forming insulating spacers for separating conducting layers in semiconductor wafer fabrication. The spacers are formed by removing portions of a protective photoresist layer through photolithography, and then through etching of exposed portions of the insulating layer. The spacers allow for fabrication of components that are smaller in size than are obtainable through conventional photolithography methods.
    Type: Grant
    Filed: October 18, 2000
    Date of Patent: March 25, 2003
    Assignees: Advanced Micro Devices, Inc., Fujitsu Limited
    Inventors: Jeffrey A. Shields, Tuan D. Pham, Jusuke Ogura, Bharath Rangarajan, Simon Siu-Sing Chan
  • Patent number: 6212054
    Abstract: An apparatus that can be used to jump-start a car that has a weak battery. It includes a battery booster pack or a battery booster cable that is polarity sensitive and can detect proper and improper connections before providing path for electric current. This apparatus eliminates the danger of reverse connections, shorts, fires, spark firing and battery explosion. The apparatus requires no separate switching mechanism to turn power on or power off. It also does not require the imperfect human judgment of any indication device to determine correct or incorrect connection. The clamps detect for the correct polarity and automatically control the power. Power turns on once a good connection has been made. If user makes a wrong connection, there will be no power but its warning signal will go off. Once a clamp is dislodged from the battery terminal, it automatically turns power off without the need to deactivate a switch.
    Type: Grant
    Filed: September 21, 1999
    Date of Patent: April 3, 2001
    Assignee: PowerPro Inc.
    Inventor: Sing Chan
  • Patent number: 5827594
    Abstract: An improved rigid winding core for flexible tapes achieving improved interlocking between adjacently stacked cores by a first interlocking mechanism located on the inner rim and a second, additional, mechanism located on the planar surfaces. The first mechanism comprises a number of clamping teeth each of which comprises a first radial extending portion and a second axial extending portion. The clamping teeth is trapped in position by a retention gap formed on the inner rim. The second mechanism comprises a number of complementary lug and recess pairs which are distributed on the core planes. This improved core discloses a winding core with improved interlocking while at the same time provides considerable material saving comparing to conventional designs.
    Type: Grant
    Filed: January 3, 1997
    Date of Patent: October 27, 1998
    Assignee: Acme Magnetic Tapes Ltd.
    Inventor: Ping-Sing Chan