Patents by Inventor Soichi Yamazaki

Soichi Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080258192
    Abstract: This disclosure concerns a semiconductor device comprising an insulating film provided on a semiconductor substrate; a lower contact formed in the insulating film; a ferroelectric capacitor including a first lower electrode provided on the lower contact and connected to the lower contact, a second lower electrode provided on the first lower electrode and made of SRO (Strontium Ruthenium Oxide), a ferroelectric film including crystals, and an upper electrode provided on the ferroelectric film, grain diameters of the crystals being set to 30 nm to 150 nm by forming the ferroelectric film on the second lower electrode; and a wiring connected to the upper electrode.
    Type: Application
    Filed: April 16, 2008
    Publication date: October 23, 2008
    Inventors: Soichi YAMAZAKI, Koji Yamakawa
  • Patent number: 7413987
    Abstract: There is disclosed a method of manufacturing a semiconductor device, wherein an Si3N4 film is formed as a mask member on the surface of a silicon substrate, then etched to form an STI trench. A solution of perhydrogenated silazane polymer is coated on the surface of the silicon substrate having an STI trench formed thereon to deposit a coated film (PSZ film) thereon. The PSZ film deposited on the mask member is removed, leaving part of the PSZ film inside the trench, wherein the thickness of the PSZ film is controlled to make the height thereof from the bottom of the STI trench become 600 nm or less. Thereafter, the PSZ film is heat-treated in a water vapor-containing atmosphere to convert the PSZ film into a silicon oxide film through a chemical reaction of the PSZ film. Subsequently, the silicon oxide film is heat-treated to densify the silicon oxide film.
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: August 19, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuhiko Hieda, Atsuko Kawasaki, Masahiro Kiyotoshi, Katsuhiko Tachibana, Soichi Yamazaki
  • Publication number: 20080153023
    Abstract: Disclosed is a toner containing resin mother particles and oil, in which the volume-average particle diameter of the resin mother particles is not less than 2 ?m but less than 4 ?m, (volume-average particle diameter of the resin mother particles)/(number-average particle diameter of the resin mother particles) is more than 1 but less than 1.1, the oil is silicone oil or fluorine oil, and the content of the silicone oil or fluorine oil is not less than 0.05% by mass but less than 2% by mass relative to the resin mother particles.
    Type: Application
    Filed: December 12, 2007
    Publication date: June 26, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Soichi YAMAZAKI, Ken IKUMA
  • Patent number: 7378329
    Abstract: Disclosed is a method for manufacturing a semiconductor device, comprising forming an insulating film above a semiconductor substrate having an element formed thereon, forming an anti-reflection layer that is impermeable to hydrogen on the insulating film, the anti-reflection layer comprising a layer formed of at least one material selected from the group consisting of silicon nitride, silicon oxynitride, chromium oxide, CrOxFy, CrAlxOy, AlSixOy, ZrSixOy, silicon oxycarbide, carbon, chromium nitride, titanium nitride, tantalum nitride, aluminum nitride, TiAlxNy, TaAlxNy, TiSixNy, AlSixNy (where x and y denote the component ratio), and silicon carbide, forming a resist pattern on the anti-reflection layer, forming a hole in the insulating film with the resist pattern used as a mask, burying a conductive material in the hole to form a plug, removing the resist pattern, and forming a ferroelectric capacitor above the anti-reflection layer.
    Type: Grant
    Filed: September 3, 2004
    Date of Patent: May 27, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Keisuke Nakazawa, Soichi Yamazaki
  • Patent number: 7358023
    Abstract: The invention provides a method for producing a toner comprising: a step of preparing a powder for production of the toner from a raw material containing a resin as a main component, a coloring agent, and a crystalline polyester having higher crystallinity than the resin as an accessory component, and a thermal conglobation step of conglobating the powder for production of the toner with heat. The invention also provides a method for producing a toner from a kneaded material obtained by kneading a raw material containing a resin and a coloring agent, wherein the resin comprises at least a first polyester resin and a second polyester resin different from the first polyester resin, and wherein when the coefficient of static friction of the first polyester resin is taken as ?1, the coefficient of static friction of the second polyester resin as ?2, the softening point of the first polyester resin as Ts1 (° C.) and the softening point of the second polyester resin as Ts2 (° C.
    Type: Grant
    Filed: March 14, 2003
    Date of Patent: April 15, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Soichi Yamazaki, Hiroyuki Murakami, Masahide Nakamura
  • Publication number: 20070231948
    Abstract: A method of manufacturing a semiconductor device, including forming a capacitor above a semiconductor substrate, the capacitor including a dielectric film containing Pb, Zr, Ti and O. Forming the capacitor includes forming a crystallized film which contains Pb, Sr, Zr, Ti, Ru and O.
    Type: Application
    Filed: May 25, 2007
    Publication date: October 4, 2007
    Applicant: KABUSHHIKI KAISHA TOSHIBA
    Inventors: Keisuke Nakazawa, Koji Yamakawa, Katsuaki Natori, Soichi Yamazaki, Hiroshi Itokawa, Hiroyuki Kanaya
  • Publication number: 20070231927
    Abstract: A manufacturing method of a semiconductor device of an embodiment of the present invention includes: forming a lower electrode film for a capacitor above a substrate; forming a ferroelectric film on the lower electrode film by deposition-simultaneous crystallization; forming a dummy film on the ferroelectric film; removing the dummy film and a part of the ferroelectric film through a planarizing process to planarize the surface of the ferroelectric film; and forming an upper electrode film for the capacitor on the ferroelectric film.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 4, 2007
    Inventors: Koji Yamakawa, Masahiro Kiyotoshi, Soichi Yamazaki
  • Publication number: 20070215974
    Abstract: According to an aspect of the invention, there is provided a semiconductor device including a semiconductor substrate, a lower electrode film formed on the semiconductor substrate, a dielectric film formed on the lower electrode film, and an upper electrode film formed on the dielectric film, wherein the lower electrode film, the dielectric film and the upper electrode film construct a capacitor in a predetermined region on the semiconductor substrate, the dielectric film is separated from the upper electrode film outside the predetermined region, and the dielectric film is formed continuously with respect to an adjacent cell.
    Type: Application
    Filed: February 15, 2007
    Publication date: September 20, 2007
    Inventors: Soichi Yamazaki, Koji Yamakawa
  • Patent number: 7233040
    Abstract: Disclosed is a semiconductor device comprising a semiconductor substrate, and a capacitor provided above the semiconductor substrate and including a film which contains Pb, Sr, Zr, Ti, Ru and O and a dielectric film which contains Pb, Zr, Ti and O and which is provided on the film containing Pb, Sr, Zr, Ti, Ru and O.
    Type: Grant
    Filed: April 28, 2004
    Date of Patent: June 19, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Keisuke Nakazawa, Koji Yamakawa, Katsuaki Natori, Soichi Yamazaki, Hiroshi Itokawa, Hiroyuki Kanaya
  • Publication number: 20070096180
    Abstract: A semiconductor device includes a semiconductor substrate, and a ferroelectric capacitor provided on the semiconductor substrate, the ferroelectric capacitor comprising a lower electrode, a first ferroelectric film provided on the lower electrode including Pb(ZrxTi1-x)O3 and having a tetragonal crystal system whose crystal direction is oriented in a <111> direction, a second ferroelectric film provided on the first ferroelectric film including Pb(ZryTi1-y)O3 and having a tetragonal crystal system whose crystal direction is oriented in the <111> direction, and an upper electrode provided on the second ferroelectric film.
    Type: Application
    Filed: September 21, 2006
    Publication date: May 3, 2007
    Inventors: Koji Yamakawa, Soichi Yamazaki, Osamu Hidaka, Osamu Arisumi
  • Publication number: 20070080383
    Abstract: A semiconductor device according to an embodiment of the present invention includes a semiconductor substrate; a ferroelectric capacitor arranged above the semiconductor substrate; an insulating protecting film covering a side surface of the ferroelectric capacitor; and a side wall film formed on a side surface of the ferroelectric capacitor through the protecting film and giving tensile stress to the ferroelectric capacitor in a direction of an electric field applied to the ferroelectric capacitor.
    Type: Application
    Filed: July 10, 2006
    Publication date: April 12, 2007
    Inventors: Koji Yamakawa, Soichi Yamazaki
  • Patent number: 7189485
    Abstract: A toner having high mechanical strength and being capable of exhibiting a sufficient fixing property in a wide temperature range is provided. Further, a fixing device and an image forming apparatus in which such a toner can be suitably used are provided. The toner contains polyester-based resin as a main resin component, and the acid value of the toner is 8.0 KOHmg/g or less. The polyester-based resin includes block polyester mainly composed of a block copolymer, and amorphous polyester having crystallinity lower than that of the block polyester. The block polyester has a crystalline block obtained by the condensation of a diol component with a dicarboxylic acid component and an amorphous block having crystallinity lower than that of the crystalline block.
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: March 13, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Soichi Yamazaki, Hiroyuki Murakami
  • Publication number: 20060231880
    Abstract: According to an aspect of the invention, there is provided a semiconductor device including a semiconductor substrate, and a capacitor formed above the semiconductor substrate by sandwiching a dielectric film between a lower electrode and upper electrode, wherein the upper electrode has a stacked structure including a first MOx type conductive oxide film (M is a metal element, O is an oxygen element, and x>0) having a crystal structure, and a crystal grain size of the first MOx type conductive oxide film is 5 to 100 nm.
    Type: Application
    Filed: April 7, 2006
    Publication date: October 19, 2006
    Inventors: Koji Yamakawa, Soichi Yamazaki, Osamu Hidaka
  • Publication number: 20060234442
    Abstract: According to an aspect of the invention, there is provided a semiconductor device comprising a capacitor formed above a semiconductor substrate by sandwiching a dielectric film between a lower electrode and an upper electrode including an electrode film which contains an MOx type conductive oxide (M is a metal element, O is an oxygen element, and x>0), and a contact connected to the upper electrode, wherein a film thickness of the electrode film immediately below the contact is smaller than a film thickness of the electrode film in the other portion.
    Type: Application
    Filed: April 14, 2006
    Publication date: October 19, 2006
    Inventors: Soichi Yamazaki, Koji Yamakawa
  • Publication number: 20060205233
    Abstract: There is disclosed a method of manufacturing a semiconductor device, wherein an Si3N4 film is formed as a mask member on the surface of a silicon substrate, then etched to form an STI trench. A solution of perhydrogenated silazane polymer is coated on the surface of the silicon substrate having an STI trench formed thereon to deposit a coated film (PSZ film) thereon. The PSZ film deposited on the mask member is removed, leaving part of the PSZ film inside the trench, wherein the thickness of the PSZ film is controlled to make the height thereof from the bottom of the STI trench become 600 nm or less. Thereafter, the PSZ film is heat-treated in a water vapor-containing atmosphere to convert the PSZ film into a silicon oxide film through a chemical reaction of the PSZ film. Subsequently, the silicon oxide film is heat-treated to densify the silicon oxide film.
    Type: Application
    Filed: May 10, 2006
    Publication date: September 14, 2006
    Inventors: Katsuhiko Hieda, Atsuko Kawasaki, Masahiro Kiyotoshi, Katsuhiko Tachibana, Soichi Yamazaki
  • Patent number: 7105261
    Abstract: A toner having high mechanical strength and being capable of exhibiting a sufficient fixing property in a wide temperature range is provided. Further, a fixing device and an image forming apparatus in which such a toner can be suitably used are also provided. The toner contains polyester-based resin as a main resin component. The polyester-based resin includes block polyester mainly composed of a block copolymer, and amorphous polyester having crystallinity lower than that of the block polyester. The block polyester has a crystalline block obtained by the condensation of a diol component with a dicarboxylic acid component, and an amorphous block having crystallinity lower than that of the crystalline block. The compounding ratio between the block polyester and the amorphous polyester is in the range of 5:95 to 45:55 in weight ratio.
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: September 12, 2006
    Assignee: Seiko Epson Corporation
    Inventors: Soichi Yamazaki, Hiroyuki Murakami
  • Patent number: 7083889
    Abstract: A toner having high mechanical strength and being capable of exhibiting a sufficient fixing property in a wide temperature range is provided. Further, a fixing device and an image forming apparatus in which such a toner can be suitably used are also provided. The toner is composed of a material containing a resin as a main component and rutile-anatase type titanium oxide. The resin is mainly composed of polyester-based resin. The polyester-based resin includes block polyester mainly composed of a block copolymer, and amorphous polyester having crystallinity lower than that of the block polyester. The block polyester has a crystalline block obtained by the condensation of a diol component with a dicarboxylic acid component, and an amorphous block having crystallinity lower than that of the crystalline block. The compounding ratio between the block polyester and the amorphous polyester is in the range of 5:95 to 45:55 in weight ratio.
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: August 1, 2006
    Assignee: Seiko Epson Corporation
    Inventors: Soichi Yamazaki, Hiroyuki Murakami
  • Patent number: 7071107
    Abstract: There is disclosed a method of manufacturing a semiconductor device, wherein an Si3N4 film is formed as a mask member on the surface of a silicon substrate, then etched to form an STI trench. A solution of perhydrogenated silazane polymer is coated on the surface of the silicon substrate having an STI trench formed thereon to deposit a coated film (PSZ film) thereon. The PSZ film deposited on the mask member is removed, leaving part of the PSZ film inside the trench, wherein the thickness of the PSZ film is controlled to make the height thereof from the bottom of the STI trench become 600 nm or less. Thereafter, the PSZ film is heat-treated in a water vapor-containing atmosphere to convert the PSZ film into a silicon oxide film through a chemical reaction of the PSZ film. Subsequently, the silicon oxide film is heat-treated to densify the silicon oxide film.
    Type: Grant
    Filed: October 1, 2003
    Date of Patent: July 4, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuhiko Hieda, Atsuko Kawasaki, Masahiro Kiyotoshi, Katsuhiko Tachibana, Soichi Yamazaki
  • Patent number: 6995417
    Abstract: Disclosed is a semiconductor device comprising a semiconductor substrate, an insulating region provided on the semiconductor substrate, a first capacitor provided above the insulating region, a second capacitor provided above the insulating region and adjacent to the first capacitor, a conductive hydrogen-barrier film which prevents diffusion of hydrogen into the first and second capacitors and connects a bottom electrode of the first capacitor with a bottom electrode of the second capacitor, the conductive hydrogen-barrier film having a first portion interposing between the insulating region and the first capacitor and between the insulating region and the second capacitor.
    Type: Grant
    Filed: August 25, 2004
    Date of Patent: February 7, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Soichi Yamazaki, Koji Yamakawa
  • Publication number: 20050277208
    Abstract: Disclosed is a method for manufacturing a semiconductor device, comprising forming an insulating film above a semiconductor substrate having an element formed thereon, forming an anti-reflection layer that is impermeable to hydrogen on the insulating film, the anti-reflection layer comprising a layer formed of at least one material selected from the group consisting of silicon nitride, silicon oxynitride, chromium oxide, CrOxFy, CrAlxOy, AlSixOy, ZrSixOy, silicon oxycarbide, carbon, chromium nitride, titanium nitride, tantalum nitride, aluminum nitride, TiAlxNy, TaAlxNy, TiSixNy, AlSixNy (where x and y denote the component ratio), and silicon carbide, forming a resist pattern on the anti-reflection layer, forming a hole in the insulating film with the resist pattern used as a mask, burying a conductive material in the hole to form a plug, removing the resist pattern, and forming a ferroelectric capacitor above the anti-reflection layer.
    Type: Application
    Filed: September 3, 2004
    Publication date: December 15, 2005
    Inventors: Keisuke Nakazawa, Soichi Yamazaki