Patents by Inventor Son V. Nguyen

Son V. Nguyen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9312224
    Abstract: A porous low k dielectric material containing atoms of at least Si, C, N and H (C and/or O may also be present) is used to provide an interconnect structure having reduced BEOL capacitance and resistance. The porous low k dielectric material is used as an interconnect dielectric material in which at least one interconnect metal-containing structure is embedded therein. The porous low k dielectric material has metal diffusion barrier properties due to the presence of nitrogen as an elemental constituent of the porous low k dielectric material. As such, the porous low k dielectric material can eliminate the need of a diffusion barrier liner, or reduce the thickness of the diffusion barrier liner that is typically formed between an interconnect dielectric material and the embedded interconnect metal structure.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: April 12, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Donald F. Canaperi, Alfred Grill, Thomas J. Haigh, Son V. Nguyen, Takeshi Nogami, Deepika Priyadarshini, Hosadurga Shobha, Matthew T. Shoudy
  • Publication number: 20160064307
    Abstract: A semiconductor assembly for use with forced liquid and gas cooling. A relatively rigid nano-structure (for example, array of elongated nanowires) extends from an interior surface of a cap toward a top surface of a semiconductor chip, but, because of the rigidness and structural integrity of the nano-structure built into the cap, and of the cap itself, the nano-structure is reliably spaced apart from the top surface of the chip, which helps allow for appropriate cooling fluid flows. The cap piece and nano-structures built into the cap may be made of silicon or silicon compounds.
    Type: Application
    Filed: November 12, 2015
    Publication date: March 3, 2016
    Inventors: Wei Lin, Son V. Nguyen, Spyridon Skordas, Tuan A. Vo
  • Patent number: 9275952
    Abstract: An electrical device including an opening in a low-k dielectric material, and a copper including structure present within the opening for transmitting electrical current. A liner is present between the opening and the copper including structure. The liner includes a superlattice structure comprised of a metal oxide layer, a metal layer present on the metal oxide layer, and a metal nitride layer that is present on the metal layer. A first layer of the superlattice structure that is in direct contact with the low-k dielectric material is one of said metal oxide layer and a final layer of the superlattice structure that is in direct contact with the copper including structure is one of the metal nitride layers.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: March 1, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Donald F. Canaperi, Daniel C. Edelstein, Alfred Grill, Son V. Nguyen, Takeshi Nogami, Deepika Priyadarshini, Hosadurga Shobha
  • Publication number: 20160056076
    Abstract: Low capacitance and high reliability interconnect structures and methods of manufacture are disclosed. The method includes forming a copper based interconnect structure in an opening of a dielectric material. The method further includes forming a capping layer on the copper based interconnect structure. The method further includes oxidizing the capping layer and any residual material formed on a surface of the dielectric material. The method further includes forming a barrier layer on the capping layer by outdiffusing a material from the copper based interconnect structure to a surface of the capping layer. The method further includes removing the residual material, while the barrier layer on the surface of the capping layer protects the capping layer.
    Type: Application
    Filed: August 22, 2014
    Publication date: February 25, 2016
    Inventors: Daniel C. EDELSTEIN, Son V. NGUYEN, Takeshi NOGAMI, Deepika PRIYADARSHINI, Hosadurga K. SHOBHA
  • Publication number: 20160056112
    Abstract: Low capacitance and high reliability interconnect structures and methods of manufacture are disclosed. The method includes forming a copper based interconnect structure in an opening of a dielectric material. The method further includes forming a capping layer on the copper based interconnect structure. The method further includes oxidizing the capping layer and any residual material formed on a surface of the dielectric material. The method further includes forming a barrier layer on the capping layer by outdiffusing a material from the copper based interconnect structure to a surface of the capping layer. The method further includes removing the residual material, while the barrier layer on the surface of the capping layer protects the capping layer.
    Type: Application
    Filed: October 14, 2015
    Publication date: February 25, 2016
    Inventors: Daniel C. EDELSTEIN, Son V. NGUYEN, Takeshi NOGAMI, Deepika PRIYADARSHINI, Hosadurga K. SHOBHA
  • Patent number: 9263366
    Abstract: A semiconductor assembly for use with forced liquid and gas cooling. A relatively rigid nano-structure (for example, array of elongated nanowires) extends from an interior surface of a cap toward a top surface of a semiconductor chip, but, because of the rigidness and structural integrity of the nano-structure built into the cap, and of the cap itself, the nano-structure is reliably spaced apart from the top surface of the chip, which helps allow for appropriate cooling fluid flows. The cap piece and nano-structures built into the cap may be made of silicon or silicon compounds.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: February 16, 2016
    Assignee: International Business Machines Corporation
    Inventors: Wei Lin, Son V. Nguyen, Spyridon Skordas, Tuan A. Vo
  • Publication number: 20160035618
    Abstract: An electrical device including an opening in a low-k dielectric material, and a copper including structure present within the opening for transmitting electrical current. A liner is present between the opening and the copper including structure. The liner includes a superlattice structure comprised of a metal oxide layer, a metal layer present on the metal oxide layer, and a metal nitride layer that is present on the metal layer. A first layer of the superlattice structure that is in direct contact with the low-k dielectric material is one of said metal oxide layer and a final layer of the superlattice structure that is in direct contact with the copper including structure is one of the metal nitride layers.
    Type: Application
    Filed: October 15, 2015
    Publication date: February 4, 2016
    Inventors: Donald F. Canaperi, Daniel C. Edelstein, Alfred Grill, Son V. Nguyen, Takeshi Nogami, Deepika Priyadarshini, Hosadurga Shobha
  • Patent number: 9241792
    Abstract: A two-part implantable heart valve and procedure are disclosed that allow expansion and positioning of a first part of the implantable heart valve having a temporary or transient valvular structure. A second part of the implantable heart valve is deployed within the first part and attaches thereto. The valvular structure of the second part then acts to function as the heart valve replacement. A tool or system is provided for determining an adequate percutaneous heart valve size for a given stenotic valve. A balloon can be inflated inside the stenotic valve to a desired pressure. When this pressure is reached an angiographic image is taken and the balloon diameter is measured at a waist area created by contact between the balloon and the stenotic valve. The diameter represents the minimum percutaneous heart valve diameter to be implanted.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: January 26, 2016
    Assignee: Edwards Lifesciences Corporation
    Inventors: Netanel Benichou, Son V. Nguyen, Benjamin Spenser
  • Publication number: 20160005597
    Abstract: Disclosed herein is an ultra-low dielectric (k) film and methods of making thereof. A ultra-low k film has a covalently bonded network comprising atoms of silicon, oxygen, carbon, and hydrogen, a cyclotrisilane structure, and a plurality of pores having a pore size distribution (PSD) of less than about 1.1 nanometers (nm). The ultra-low k film has a k value of less than about 2.4 and at least about 28 atomic percent of carbon.
    Type: Application
    Filed: September 8, 2015
    Publication date: January 7, 2016
    Inventors: Donald F. Canaperi, Son V. Nguyen, Deepika Priyadarshini, Hosadurga K. Shobha
  • Patent number: 9214332
    Abstract: A low k dielectric material with enhanced electrical and mechanical properties is provided which, in some applications, can also reduce the capacitance of a semiconductor device. The low k dielectric material includes CNT nanotubes that are randomly dispersed within a low k dielectric material matrix. The low k dielectric material can be used in a variety of electronic devices including, for example, as an insulator layer within a back end of line interconnect structure.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: December 15, 2015
    Assignee: International Business Machines Corporation
    Inventors: Donald F. Canaperi, Alfred Grill, Son V. Nguyen, Deepika Priyadarshini, Hosadurga Shobha
  • Patent number: 9209017
    Abstract: Disclosed herein is an ultra-low dielectric (k) film and methods of making thereof. A ultra-low k film has a covalently bonded network comprising atoms of silicon, oxygen, carbon, and hydrogen, a cyclotrisilane structure, and a plurality of pores having a pore size distribution (PSD) of less than about 1.1 nanometers (nm). The ultra-low k film has a k value of less than about 2.4 and at least about 28 atomic percent of carbon.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: December 8, 2015
    Assignee: International Business Machines Corporation
    Inventors: Donald F. Canaperi, Son V. Nguyen, Deepika Priyadarshini, Hosadurga K. Shobha
  • Publication number: 20150348868
    Abstract: A semiconductor assembly for use with forced liquid and gas cooling. A relatively rigid nano-structure (for example, array of elongated nanowires) extends from an interior surface of a cap toward a top surface of a semiconductor chip, but, because of the rigidness and structural integrity of the nano-structure built into the cap, and of the cap itself, the nano-structure is reliably spaced apart from the top surface of the chip, which helps allow for appropriate cooling fluid flows. The cap piece and nano-structures built into the cap may be made of silicon or silicon compounds.
    Type: Application
    Filed: May 30, 2014
    Publication date: December 3, 2015
    Applicant: International Business Machines Corporation
    Inventors: Wei Lin, Son V. Nguyen, Spyridon Skordas, Tuan A. Vo
  • Publication number: 20150320556
    Abstract: Embodiments of a radially collapsible and expandable prosthetic heart valve are disclosed. The prosthetic valve can comprise an annular frame, leaflets, an inner skirt, and an outer skirt. The outer skirt can be secured to the outside of the inflow end portion of the frame, the outer skirt having longitudinal slack that buckles outward radially when the valve is in the expanded configuration and which lies flat when the valve is in the collapsed configuration. In some embodiments, the outer skirt is stiffer in the axial direction of the valve than in the circumferential direction of the valve. In additional embodiments, the outer skirt comprises a self-expandable fabric comprising fibers made of a shape memory material having a shape memory set to enhance the radially outward buckling of the outer skirt. Methods of crimping such valves to a collapsed or partially collapsed configuration are also disclosed.
    Type: Application
    Filed: May 5, 2015
    Publication date: November 12, 2015
    Inventors: Tamir S. Levi, Ron Sharoni, Elena Sherman, Oren H. Wintner, Kevin D. Rupp, Son V. Nguyen, Ajay Chadha, Jeff Lindstrom
  • Publication number: 20150279667
    Abstract: Disclosed herein is an ultra-low dielectric (k) film and methods of making thereof. A ultra-low k film has a covalently bonded network comprising atoms of silicon, oxygen, carbon, and hydrogen, a cyclotrisilane structure, and a plurality of pores having a pore size distribution (PSD) of less than about 1.1 nanometers (nm). The ultra-low k film has a k value of less than about 2.4 and at least about 28 atomic percent of carbon.
    Type: Application
    Filed: March 26, 2014
    Publication date: October 1, 2015
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Donald F. Canaperi, Son V. Nguyen, Deepika Priyadarshini, Hosadurga K. Shobha
  • Publication number: 20150270124
    Abstract: A low k dielectric material with enhanced electrical and mechanical properties is provided which, in some applications, can also reduce the capacitance of a semiconductor device. The low k dielectric material includes CNT nanotubes that are randomly dispersed within a low k dielectric material matrix. The low k dielectric material can be used in a variety of electronic devices including, for example, as an insulator layer within a back end of line interconnect structure.
    Type: Application
    Filed: March 20, 2014
    Publication date: September 24, 2015
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Donald F. Canaperi, Alfred Grill, Son V. Nguyen, Deepika Priyadarshini, Hosadurga Shobha
  • Patent number: 9111761
    Abstract: An in-situ process is described incorporating plasma enhanced chemical vapor deposition comprising flowing at least one of a Si, Si+C, B, Si+B, Si?B+C, and B+C containing precursor, and a N containing precursors at first times and removing the N precursor at second times and starting the flow of an oxidant gas and a porogen gas into the chamber. A dielectric layer is described comprising a network having inorganic random three dimensional covalent bonding throughout the network which contains at least one SiCN, SiCNH, SiN, SiNH, BN, BNH, CBN, CBNH, BSiN, BSiNH, SiCBN and SiCBNH as a first component and a low k dielectric as a second component adjacent thereto.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: August 18, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen M. Gates, Alfred Grill, Son V. Nguyen, Satyanarayana V. Nitta
  • Publication number: 20150214157
    Abstract: An electrical device comprising including an opening in a low-k dielectric material, and a copper including structure present within the opening for transmitting electrical current. A liner is present between the opening and the copper including structure. The liner includes a superlattice structure comprised of a metal oxide layer, a metal layer present on the metal oxide layer, and a metal nitride layer that is present on the metal layer. A first layer of the superlattice structure that is in direct contact with the low-k dielectric material is one of said metal oxide layer and a final layer of the superlattice structure that is in direct contact with the copper including structure is one of the metal nitride layers.
    Type: Application
    Filed: January 24, 2014
    Publication date: July 30, 2015
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Donald F. Canaperi, Daniel C. Edelstein, Alfred Grill, Son V. Nguyen, Takeshi Nogami, Deepika Priyadarshini, Hosadurga Shobha
  • Patent number: 9087876
    Abstract: A vertical stack including a dielectric hard mask layer and a titanium nitride layer is formed over an interconnect-level dielectric material layer such as an organosilicate glass layer. The titanium nitride layer may be partially or fully converted into a titanium oxynitride layer, which is subsequently patterned with a first pattern. Alternately, the titanium nitride layer, with or without a titanium oxynitride layer thereupon, may be patterned with a line pattern, and physically exposed surface portions of the titanium nitride layer may be converted into titanium oxynitride. Titanium oxynitride provides etch resistance during transfer of a combined first and second pattern, but can be readily removed by a wet etch without causing surface damages to copper surfaces. A chamfer may be formed in the interconnect-level dielectric material layer by an anisotropic etch that employs any remnant portion of titanium nitride as an etch mask.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: July 21, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Son V. Nguyen, Tuan A. Vo, Christopher J. Waskiewicz
  • Publication number: 20150191824
    Abstract: A deposition apparatus for depositing a material on a substrate is provided. The deposition apparatus has a processing chamber defining a processing space in which the substrate is arranged, an ultraviolet radiation assembly configured to emit ultraviolet radiation and a microwave radiation assembly configured to emit microwave radiation into an excitation space that can be the same as the processing space, and a gas feed assembly configured to feed a precursor gas into the processing space and a reactive gas into the excitation space. The ultraviolet radiation assembly and the microwave radiation assembly are operated in combination to excite the reactive gas in the excitation space. The material is deposited on the substrate from the reaction of the excited reactive gas and the precursor gas. A method for using the deposition apparatus to deposit a material on a substrate is provided.
    Type: Application
    Filed: January 7, 2014
    Publication date: July 9, 2015
    Applicant: International Business Machines Corporation
    Inventors: Alfred Grill, Son V. Nguyen, Deepika Priyadarshini
  • Publication number: 20150162239
    Abstract: A vertical stack including a dielectric hard mask layer and a titanium nitride layer is formed over an interconnect-level dielectric material layer such as an organosilicate glass layer. The titanium nitride layer may be partially or fully converted into a titanium oxynitride layer, which is subsequently patterned with a first pattern. Alternately, the titanium nitride layer, with or without a titanium oxynitride layer thereupon, may be patterned with a line pattern, and physically exposed surface portions of the titanium nitride layer may be converted into titanium oxynitride. Titanium oxynitride provides etch resistance during transfer of a combined first and second pattern, but can be readily removed by a wet etch without causing surface damages to copper surfaces. A chamfer may be formed in the interconnect-level dielectric material layer by an anisotropic etch that employs any remnant portion of titanium nitride as an etch mask.
    Type: Application
    Filed: February 13, 2015
    Publication date: June 11, 2015
    Inventors: Son V. Nguyen, Tuan A. Vo, Christopher J. Waskiewicz