Abstract: A composite electronic component includes a composite body in which a multilayer ceramic capacitor and a ceramic chip are coupled to each other, the multilayer ceramic capacitor including a body having internal electrodes stacked to face each other and a plurality of dielectric layers interposed therebetween, and first and second external electrodes disposed on both end portions of the body, and the ceramic chip being disposed on a lower portion of the multilayer ceramic capacitor, wherein the ceramic chip has a double-step shape and includes two ceramic chips having different lengths to each other and coupled in a thickness direction of the ceramic chip.

Abstract: A multi-layered ceramic capacitor capable of realizing an improved process yield and miniaturization while having an overvoltage protection function may be provided. The multi-layered ceramic capacitor may include a ceramic body including a first internal electrode, a second internal electrode, a dielectric layer, and an overvoltage protection layer; and an external electrode disposed at both ends of the ceramic body, wherein the overvoltage protection layer may be disposed between the first internal electrode and the second internal electrode.

Abstract: An electronic component includes a multilayer capacitor including a capacitor body, and an external electrode disposed on an external surface of the capacitor body, an interposer including an interposer body, and an external terminals disposed on an external surface of the interposer body, and an encapsulation portion disposed to cover the multilayer capacitor. The external terminal includes a bonding portion disposed on a first surface of the interposer body to be electrically connected to the external electrode, a mounting portion disposed on a second surface of the interposer opposing the first surface, and a connection portion disposed on an end surface of the interposer to electrically connect the bonding portion to the mounting portion. A thickness of the encapsulation portion is within a range from 0.001 to 0.01 of a length of the electronic component.

Abstract: A composite electronic component includes a composite body including: a multilayer ceramic capacitor including a first ceramic body including a plurality of dielectric layers and first and second internal electrodes disposed to face each other with respective dielectric layers interposed therebetween and stacked to be perpendicular to a lower surface of the first ceramic body, and a ceramic chip being coupled to the multilayer ceramic capacitor and disposed on a lower portion of the multilayer ceramic capacitor, the ceramic chip including a second ceramic body, first and second terminal electrodes disposed on upper and lower portions of the second ceramic body and connected to the first and second external electrodes, respectively.

Abstract: A composite electronic component includes a composite body that includes a multilayer ceramic capacitor and a ceramic chip coupled to each other. The multilayer ceramic capacitor includes a first ceramic body in which a plurality of dielectric layers and internal electrodes disposed to face each other with respective dielectric layers interposed therebetween are stacked, and first and second external electrodes are disposed on both end portions of the first ceramic body. The ceramic chip is disposed on a lower portion of the multilayer ceramic capacitor and includes a second ceramic body and first and second terminal electrodes disposed on both end portions of the second ceramic body and connected to the first and second external electrodes, respectively. A plurality of electrodes are disposed in the second ceramic body.

Abstract: A composite electronic component includes: a composite body including a multilayer ceramic capacitor coupled to a ceramic chip, the multilayer ceramic capacitor including a first ceramic body in which a plurality of dielectric layers and internal electrodes disposed to face each other with each of the dielectric layers interposed therebetween are stacked and first and second external electrodes disposed on opposite end portions of the first ceramic body in a length direction, respectively, and the ceramic chip including a second ceramic body including ceramic and first and second terminal electrodes, wherein a ratio of a length of the ceramic chip to a length of the multilayer ceramic capacitor is 0.7 to 1.0, and a ratio of a sum of a length of the first terminal electrode and a length of the second terminal electrode to the length of the ceramic chip is 0.3 to 0.6.

Abstract: A composite electronic component includes a composite body in which a multilayer ceramic capacitor and a ceramic chip are coupled to each other, the multilayer ceramic capacitor including a first ceramic body in which a plurality of dielectric layers and internal electrodes disposed to face each other with respective dielectric layers interposed therebetween are stacked, and first and second external electrodes disposed on both end portions of the first ceramic body, and the ceramic chip being disposed on a lower portion of the multilayer ceramic capacitor and formed of a ceramic material having substantially no piezoelectric property, wherein a ratio (T/L) of thickness (T) of the ceramic chip to length (L) of the multilayer ceramic capacitor is selected to minimize vibration of the ceramic chip.

Abstract: An electronic component includes: a plurality of multilayer capacitors stacked in multiple rows and columns and each having external electrodes on both ends thereof in a first direction; and a board including a body and a connection portion. The connection portion includes: a plurality of positive electrode land patterns; a plurality of negative electrode land patterns; positive and negative electrode terminal patterns formed on a lower surface of the body to be spaced apart from each other in the first direction; a positive electrode connection portion connecting the plurality of positive electrode land patterns to the positive electrode terminal pattern; and a negative electrode connection portion connecting the plurality of negative electrode land patterns to the negative electrode terminal pattern.

Abstract: A multilayer capacitor includes: a capacitor body including an active region including a plurality of first and second internal electrodes alternately exposed, respectively, through opposite end surfaces of the capacitor body in a length direction, and upper and lower cover regions disposed on upper and lower surfaces of the active region, respectively; and first and second external electrodes formed on the opposite end surfaces of the capacitor body in the length direction, respectively. The lower cover region of the capacitor body may have a space portion.

Abstract: A multilayer electronic component includes a capacitor body including a plurality of dielectric layers and a plurality of first and second internal electrodes and having first to sixth surfaces, the first and second internal electrodes being exposed through the third and fourth surfaces, respectively; first and second external electrodes including first and second connected portions respectively disposed on the third and fourth surfaces of the capacitor body and first and second band portions respectively extending from the first and second connected portions to portions of the first surface of the capacitor body, respectively; a first connection terminal disposed on the first band portion; and a second connection terminal disposed on the second band portion, wherein 0.05?A1/A1?0.504, where A1 is an area of the first or second connection terminal in a thickness-width direction, and A2 is an area of the first or second band portion in a width-length direction.

Abstract: A multilayer electronic component include a multilayer capacitor including a capacitor body and first and second external electrodes disposed on ends of the capacitor body, respectively; an alumina chip including a chip body and first and second external terminals disposed on ends of the chip body, respectively, the first and second external terminals being in contact with the first and second external electrodes, respectively; a first plating layer covering the first external electrode and the first external terminal; and a second plating layer covering the second external electrode and the second external terminal. The first and second plating layers each include a nickel plating layer a tin plating layer disposed on the first external electrode and the first external terminal and on the second external electrode and the second external terminal, respectively.

Abstract: The composite electronic component includes: the capacitor including a body in which a plurality of dielectric layers and internal electrodes facing each other, with the dielectric layer interposed therebetween, are stacked, and the ESD protection device including first and second lead electrodes disposed on the body of the capacitor, a discharge part disposed between the first and second lead electrodes, and a protection layer disposed on the first and second lead electrodes and the discharge part; an input terminal connected to the internal electrode of the capacitor and the first lead electrode of the ESD protection device; and a ground terminal connected to the internal electrode of the capacitor and the second lead electrode of the ESD protection device. G2/G1<4.0 is satisfied, in which G1 is a distance between the internal electrodes adjacent to each other and G2 is a distance between the first and second lead electrodes.

Abstract: An electronic component includes: a plurality of multilayer capacitors stacked in multiple rows and columns and each having external electrodes on both ends thereof in a first direction; and a board including a body and a connection portion. The connection portion includes: a plurality of positive electrode land patterns; a plurality of negative electrode land patterns; positive and negative electrode terminal patterns formed on a lower surface of the body to be spaced apart from each other in the first direction; a positive electrode connection portion connecting the plurality of positive electrode land patterns to the positive electrode terminal pattern; and a negative electrode connection portion connecting the plurality of negative electrode land patterns to the negative electrode terminal pattern.

Abstract: A multilayer electronic component includes a capacitor body including a plurality of dielectric layers and a plurality of first and second internal electrodes alternately disposed with respective dielectric layers interposed therebetween. One end of each of the first and second internal electrodes extends, respectively, to a third or fourth surface of the capacitor body. First and second external electrodes respectively include first and second connected portions disposed on the third and fourth surfaces, and first and second band portions respectively extended from the first and second connected portions to portions of a first surface of the capacitor body. A first connection terminal is disposed on the first band portion to provide a first solder accommodating portion, and a second connection terminal is disposed on the second band portion to provide a second solder accommodating portion.

Abstract: An electronic component includes: a multilayer capacitor including a capacitor body and a pair of external electrodes, an interposer including an interposer body and a pair of external terminals, and an adhesive layer disposed on facing boundaries of the multilayer capacitor and the interposer; wherein the external terminals include bonding portions disposed on a top surface of the interposer body and connected to the external electrodes via the adhesive layer, mounting portions disposed on a bottom surface of the interposer body, and connection portions disposed on end surfaces of the interposer body to connect the bonding portions and the mounting portions to each other; wherein 0.1?t/T?0.3 in which dimension “t” is a maximum height of the adhesive layer and dimension “T” is a height of the electronic component.

Abstract: A multilayer capacitor in which acoustic noise is reduced has an area of overlap between internal electrodes in an active region of a lower portion of a capacitor body that is smaller than an area of overlap between internal electrodes in an active region of an upper portion of the capacitor body. The multilayer capacitor can be bonded to a board by relatively small solders such that the lower portion is adjacent the board. Deviations between areas of overlap of adjacent internal electrodes in the upper and lower portions of the active region are minimized to reduce piezoelectric deformation of the capacitor body.

Abstract: A composite electronic component includes a multilayer capacitor including a capacitor body, which includes first and second internal electrodes facing each other and a plurality of dielectric layers each interposed therebetween and first and second external electrodes disposed on opposing ends of the capacitor body, a high-rigidity chip including a substrate disposed on a lower side of the multilayer capacitor and first and second discharge electrodes disposed on the substrate and spaced apart from each other, the first and second discharge electrodes being connected to the first and second external electrodes, respectively, and extending to an upper or lower surface of the substrate, and an sealing part covering the first and second discharge electrodes and including a space portion, which is provided between the first and second discharge portions.

Abstract: An electronic component includes: a plurality of multilayer capacitors stacked in multiple rows and columns and each having external electrodes on both ends thereof in a first direction; and a board including a body and a connection portion. The connection portion includes: a plurality of positive electrode land patterns; a plurality of negative electrode land patterns; positive and negative electrode terminal patterns formed on a lower surface of the body to be spaced apart from each other in the first direction; a positive electrode connection portion connecting the plurality of positive electrode land patterns to the positive electrode terminal pattern; and a negative electrode connection portion connecting the plurality of negative electrode land patterns to the negative electrode terminal pattern.

Abstract: A multilayer electronic component includes a capacitor body including a plurality of dielectric layers and a plurality of first and second internal electrodes alternately disposed with respective dielectric layers interposed therebetween. One end of each of the first and second internal electrodes extends, respectively, to a third or fourth surface of the capacitor body. First and second external electrodes respectively include first and second connected portions disposed on the third and fourth surfaces, and first and second band portions respectively extended from the first and second connected portions to portions of a first surface of the capacitor body. A first connection terminal is disposed on the first band portion to provide a first solder accommodating portion, and a second connection terminal is disposed on the second band portion to provide a second solder accommodating portion.

Abstract: A multilayer electronic component includes a capacitor body including a plurality of dielectric layers and a plurality of first and second internal electrodes alternately disposed with respective dielectric layers interposed therebetween. One end of each of the first and second internal electrodes extends, respectively, to a third or fourth surface of the capacitor body. First and second external electrodes respectively include first and second connected portions disposed on the third and fourth surfaces, and first and second band portions respectively extended from the first and second connected portions to portions of a first surface of the capacitor body. A first connection terminal is disposed on the first band portion to provide a first solder accommodating portion, and a second connection terminal is disposed on the second band portion to provide a second solder accommodating portion.