Abstract: In a semiconductor device and a method of making the same, the semiconductor device comprises a substrate including a first region and a second region. At least one first gate structure is on the substrate in the first region, the at least one first gate structure including a first gate insulating layer and a first gate electrode layer on the first gate insulating layer. At least one isolating structure is in the substrate in the second region, a top surface of the isolating structure being lower in height than a top surface of the substrate. At least one resistor pattern is on the at least one isolating structure.

Abstract: In a semiconductor device and a method of making the same, the semiconductor device comprises a substrate including a first region and a second region. At least one first gate structure is on the substrate in the first region, the at least one first gate structure including a first gate insulating layer and a first gate electrode layer on the first gate insulating layer. At least one isolating structure is in the substrate in the second region, a top surface of the isolating structure being lower in height than a top surface of the substrate. At least one resistor pattern is on the at least one isolating structure.

Abstract: A structure of a semiconductor chip package is provided. The semiconductor chip package includes: a substrate; a semiconductor chip mounted on a first surface of the substrate; a plurality of electrode pads on a second surface, different from the first surface, of the substrate; and an electrostatic discharge protection pad overlapping a portion of a first electrode pad and a portion of a second electrode pad among the plurality of electrode pads.

Abstract: Provided is a rate matching apparatus. The rate matching apparatus includes interleavers, dummy bit removers, a bit collector, a memory and a selector. The interleavers interleave code blocks, respectively. The dummy bit removers remove dummy bits of the interleaved code blocks, respectively. The bit collector collects code blocks with the dummy bits removed by bit units, and divides a collected data bit stream into systematic data and parity data. The memory stores the systematic data and the parity data in parallel. The selector outputs in parallel a plurality of data bits which are selected from the systematic data and parity data of the memory.

Abstract: Provided are a divider having a small area and an improved operation speed and a method of operating the same. The divider includes a memory, a controller, and a multiplier. The memory is configured to store table values included in a predetermined range. The controller is configured to receive a divisor, generate an address expressed in a plurality of bits according to the bits except the most significant bit of the divisor, and receive the table value corresponding to the address from the memory. The multiplier is configured to receive a dividend and calculate an initial value by multiplying the dividend and the table value corresponding to the address. Herein, the controller determines an exponent of the divisor and right-shifts the initial value by the exponent of the divisor.

Abstract: According to an embodiment, the invention provides a method for decrypting content, the comprising: receiving the content without a source encryption key from a source device connected to the electric reproducing device, the content having been encrypted with the source encryption key in the source device; performing a first addition operation by using a first device internal key and an ID, the first device internal key being associated with the electric reproducing device; generating a device encryption key based on an output of the first addition operation and a second device internal key by using a predetermined encryption algorithm, wherein the second device internal key is associated with the electric reproducing device; decrypting the content using the device encryption key; decoding the decrypted content; and outputting the decoded content.

Abstract: In a method of forming a pattern structure, a cut-off portion of the node-separated line of a semiconductor device is formed by a double patterning process by using a connection portion of the sacrificial mask pattern and the mask pattern to thereby improve alignment margin. The alignment margin between the mask pattern and the sacrificial mask pattern is increased to an amount of the length of the connection portion of the sacrificial mask pattern. The lines adjacent to the node-separated line include a protrusion portion protruding toward the cut-off portion of the separated line.

Abstract: Embodiments of the present invention may provide a module for detecting a vehicle crash. The module includes a housing mounted to a vehicular frame member at one end portion thereof. The module includes first and second rods housed in the housing. The first rod is contacted to the frame member at one end thereof through the one end portion of the housing. The second rod is contacted to the opposite end of the first rod and being disposed between the first rod and the opposite end portion of the housing. The module includes first and second sensors mounted to the first and second rods respectively for detecting a crash by sequentially measuring stress wave caused by the crash. The first sensor detects a stress wave propagating through the first rod and outputting a signal. The second sensor detects a stress wave propagating through the second rod and outputting a signal.

Abstract: A semiconductor chip bonding apparatus maintains a semiconductor chip in a parallel state with respect to a lead frame when applying a bonding load.

Abstract: A semiconductor chip for a tape automated bonding (TAB) package is disclosed. The semiconductor chip comprises a connection surface including a set of input pads connected to internal circuitry of the chip and for conveying external signals to the internal circuitry, the set of input pads comprising all of the input pads on the chip. The connection surface includes a set of output pads connected to internal circuitry of the chip and for conveying internal chip signals to outside the chip, the set of output pads comprising all of the output pads on the chip. The connection surface includes a first edge and a second edge that are substantially parallel to each other and are opposite each other on a respective first side and second side of the chip, and a third edge and fourth edge that are substantially perpendicular to the first and second edges, and are opposite each other on a respective third side and fourth side of the chip.

Abstract: A radio frequency identification reader and a radio frequency identification tag that use an ultrahigh frequency band, and action methods of the radio frequency identification reader and the radio frequency identification tag. The radio frequency identification reader includes: a data generator generating data to be transmitted to a radio frequency identification tag; if a command to control the radio frequency identification tag has to be authenticated, a reader controller controlling the data generator to generate the data including an authentication code; and a reader transmitter transmitting the data to the radio frequency identification tag. As a result, securing of communications of a specific command between the radio frequency identification reader and the radio frequency identification tag can be reinforced.

Abstract: Provided are a method and apparatus for derate matching a rate-matched data. The received data is deinterleaved and derate matched at a time, without using input buffers or constructing input buffers in parallel. Thus, a total process time necessary for the deinterleaving process and the derate matching process is reduced, and the use of memories such as the input buffers is minimized.

Abstract: Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component.

Abstract: Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component.

Abstract: Provided is a decoding apparatus and method using orthogonal space-time block codes (OSTBCs) robust against timing errors. The decoding apparatus may include: a cyclic prefix removal unit to receive a signal, and to remove a cyclic prefix in the signal; an inverse discrete Fourier transform (IDFT) unit to apply an IDFT to the signal with the removed cyclic prefix; a guard band removal unit to remove a guard band in the inverse discrete Fourier transformed signal, and to generate a complex matrix; a channel estimation unit to transmit a carrier corresponding to the complex matrix and channel status information associated with transmit and receive antennas; and a decoder to calculate a channel status vector with respect to a complex symbol included in the complex matrix, using the channel status information, and to calculate an inner product between the channel status vector and the complex matrix, to restore the complex symbol.

Abstract: According to an embodiment, the invention provides a method for decrypting content, the comprising: receiving the content without a source encryption key from a source device connected to the electric reproducing device, the content having been encrypted with the source encryption key in the source device; performing a first addition operation by using a first device internal key and an ID, the first device internal key being associated with the electric reproducing device; generating a device encryption key based on an output of the first addition operation and a second device internal key by using a predetermined encryption algorithm, wherein the second device internal key is associated with the electric reproducing device; decrypting the content using the device encryption key; decoding the decrypted content; and outputting the decoded content.

Abstract: A de-rate matching device in a communication system divides received data into a plurality of blocks, and simultaneously de-rate-matches data in the respective blocks.

Abstract: The invention is directed to a digital data delivery system including a digital data server configured to deliver first key encrypted digital data to a source device, and the first key encrypted digital data is encrypted using a first key. The source device is configured to generate decrypted digital data by decrypting the first key encrypted digital data using the first key, generate second key encrypted digital data by encrypting the decrypted digital data using a second key, and deliver the second key encrypted digital data to a digital data playing device. The first key is thereby based on one or more registration attributes of a user of the digital data server, and the second key is based on one or more attributes of the digital data playing device.

Abstract: Disclosed herein is a measurement apparatus for improving performances of standard cells in a standard cell library when verifying performance of the standard cell library through a ring oscillator among various test element groups (TEGs). The measurement apparatus includes a ring oscillator block activated in response to an enable signal externally inputted thereto for outputting measurement result values, a decoder for selectively outputting one or more of the measurement result values from the ring oscillator block, and a statistics assistor for receiving output values from the decoder for a predetermined period and outputting a maximum value, a minimum value and an average value of the received values.

Abstract: Disclosed herein is a measurement apparatus for improving performances of standard cells in a standard cell library when verifying performance of the standard cell library through a ring oscillator among various test element groups (TEGs). A built-in circuit is used to measure and verify performance of the standard cell library through a TEG. Therefore, it is possible to effectively improve performances of the standard cells in the standard cell library. Particularly, it is possible to not only remove human errors or internal errors of equipment, but also perform the measurement more readily, rapidly and accurately. Further, it is possible to curtail the use of high-performance equipment or manpower and time required in a measurement process.