Patents by Inventor Srivatsan Parthasarathy

Srivatsan Parthasarathy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140289720
    Abstract: Techniques are described to allow substation of blocks into a virtual machine image of an executing virtual machine. A patch may be applied to a first virtual machine image. One or more blocks modified by the patch are identified and copied to a host having a virtual machine executing from a virtual machine image that is based on the first virtual machine image (prior to the patch). While the virtual machine is executing, the substitution blocks are applied (supersede) corresponding original blocks in the virtual machine image. A guest operating system in the virtual machine may either begin using an executable file in a substitution block. In addition, the guest operating system may be forced to flush from memory and cache executable code replaced by the substitution block.
    Type: Application
    Filed: June 7, 2014
    Publication date: September 25, 2014
    Inventors: Robert Fries, Srivatsan Parthasarathy
  • Patent number: 8829570
    Abstract: A switching device for heterojunction integrated circuits is disclosed. According to one aspect, the switching device is configured to protect a circuit from an electro-static discharge (ESD) event. The switching device includes a second base contact region that is configured to be electrically floating, a first base contact region and a collector contact region that are coupled to a first input terminal of the switching device, and an emitter contact region that is coupled to a second input terminal of the switching device. Due in part to capacitive coupling between the first base contact region and the second base contact region, the switching device exhibits a low transient trigger voltage and a fast response to ESD events. Further, the switching device exhibits a high DC trigger voltage (for example, greater than 20V), while maintaining relatively low leakage current during operation (for example, less than about 0.5 ?A at 20V DC.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: September 9, 2014
    Assignee: Analog Devices, Inc.
    Inventors: Srivatsan Parthasarathy, Javier A. Salcedo, Shuyun Zhang
  • Patent number: 8819660
    Abstract: Techniques are described to allow substation of blocks into a virtual machine image of an executing virtual machine. A patch may be applied to a first virtual machine image. One or more blocks modified by the patch are identified and copied to a host having a virtual machine executing from a virtual machine image that is based on the first virtual machine image (prior to the patch). While the virtual machine is executing, the substitution blocks are applied (supersede) corresponding original blocks in the virtual machine image. A guest operating system in the virtual machine may either begin using an executable file in a substitution block. In addition, the guest operating system may be forced to flush from memory and cache executable code replaced by the substitution block.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: August 26, 2014
    Assignee: Microsoft Corporation
    Inventors: Robert Fries, Srivatsan Parthasarathy
  • Patent number: 8813172
    Abstract: Data management techniques are provided for handling information resources. A data management process can account for attributes of information resources by analyzing or interpreting the workspace location, source, channel and device associated with an information resource, and effectuating policies, based on the attributes. Rules govern the attribute determination and policies for access restriction to the information resource. The attributes and policies determined are tagged to the information resource and is dynamically updated based on the attributes related to the information resource within different workspaces, such as a corporate workspace and a personal workspace.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: August 19, 2014
    Assignee: Microsoft Corporation
    Inventors: Edward Reus, Scott Field, Michael Joseph Healy, Joseph Dadzie, Srivatsan Parthasarathy
  • Patent number: 8762508
    Abstract: Configuration drift refers to changes made over time that cause a computer or service to deviate from a desired configuration. Configuration drift of a group of machines can be managed by defining configuration intent. Intent is defined by defining a configuration baseline comprised of a collection of related configuration rules. Configuration rules include settings, and targets which can be any managed entity that enables reporting of non-compliance at a more granular level. A configuration baseline can be completed by reading configuration rules from one or more well-configured computers. Configuration drift is assessed by comparing actual values to the configuration baseline values and is reported at a managed entity level instead of at a machine level. Remediation, returning the computer to a state of compliance with the configuration baseline, can be performed on demand.
    Type: Grant
    Filed: March 11, 2010
    Date of Patent: June 24, 2014
    Assignee: Microsoft Corporation
    Inventors: Shon K. Shah, Prasanna H. Sridhar, James P. Finnigan, Srivatsan Parthasarathy, Alan H. Goodman
  • Publication number: 20140167105
    Abstract: Apparatus and methods for monolithic data conversion interface protection are provided herein. In certain implementations, a protection device includes a first silicon controlled rectifier (SCR) and a first diode for providing protection between a signal node and a power high supply node, a second SCR and a second diode for providing protection between the signal node and a power low supply node, and a third SCR and a third diode for providing protection between the power high supply node and the power low supply node. The SCR and diode structures are integrated in a common circuit layout, such that certain wells and active regions are shared between structures. Configuring the protection device in this manner enables in-suit input/output interface protection using a single cell. The protection device is suitable for monolithic data conversion interface protection in sub 3V operation.
    Type: Application
    Filed: October 31, 2013
    Publication date: June 19, 2014
    Applicant: Analog Devices, Inc.
    Inventors: Javier Alejandro Salcedo, Srivatsan Parthasarathy
  • Publication number: 20140143775
    Abstract: Techniques for analyzing virtual machine images are described. In one embodiment, a subset of settings is extracted from one or more virtual machine images, the virtual machine images store therein values of the settings. The settings are used by software executing in virtual machines of the virtual machine images, respectively. A target one of the virtual machine images is selected and target values of the settings are obtained from the target virtual machine image. Sample values of the settings are obtained from a plurality of virtual machine images. The subset formed by identifying similarities and differences of the values between the virtual machine images.
    Type: Application
    Filed: December 11, 2013
    Publication date: May 22, 2014
    Applicant: Microsoft Corporation
    Inventors: Robert Fries, Galen Hunt, Srivatsan Parthasarathy
  • Patent number: 8730630
    Abstract: Apparatuses and methods for providing transient electrical event protection are disclosed. In one embodiment, an apparatus comprises a detection and timing circuit, a current amplification circuit, and a clamping circuit. The detection and timing circuit is configured to detect a presence or absence of a transient electrical event at a first node, and to generate a first current for a first duration upon detection of the transient electrical event. The current amplification circuit is configured to receive the first current from the detection and timing circuit and to amplify the first current to generate a second current. The clamping circuit is electrically connected between the first node and a second node and receives the second current for activation. The clamping circuit is configured to activate a low impedance path between the first and second nodes in response to the second current, and to otherwise deactivate the low impedance path.
    Type: Grant
    Filed: April 15, 2013
    Date of Patent: May 20, 2014
    Assignee: Analog Devices, Inc.
    Inventors: Srivatsan Parthasarathy, Javier A. Salcedo
  • Publication number: 20140133055
    Abstract: Apparatus and methods for active detection, timing, and protection related to transient electrical events are disclosed. A detection circuit can generate a first activation signal in response to a transient electrical stress event across a first node and a second node. A blocking circuit is configured to bias the base of a first driver bipolar transistor to slow down discharge of accumulated base charge of a first driver bipolar transistor, which permits the first driver bipolar transistor to remain activated for a longer period of time than had the base of the first driver bipolar transistor been biased to the same voltage as the emitter of the first bipolar transistor. Shut-off circuitry can be included in some embodiments to prevent a discharge circuit from activating during normal operating conditions.
    Type: Application
    Filed: November 9, 2012
    Publication date: May 15, 2014
    Applicant: ANALOG DEVICES, INC.
    Inventors: Srivatsan Parthasarathy, Javier Alejandro Salcedo
  • Patent number: 8723227
    Abstract: A protection clamp is provided between a first terminal and a second terminal, and includes a multi-gate high electron mobility transistor (HEMT), a current limiting circuit, and a forward trigger control circuit. The multi-gate HEMT includes a drain/source, a source/drain, a first depletion-mode (D-mode) gate, a second D-mode gate, and an enhancement-mode (E-mode) gate disposed between the first and second D-mode gates. The drain/source and the first D-mode gate are connected to the first terminal and the source/drain and the second D-mode gate are connected to the second terminal. The forward trigger control and the current limiting circuits are coupled between the E-mode gate and the first and second terminals, respectively. The forward trigger control circuit provides an activation voltage to the E-mode gate when a voltage of the first terminal exceeds a voltage of the second terminal by a forward trigger voltage.
    Type: Grant
    Filed: September 24, 2012
    Date of Patent: May 13, 2014
    Assignee: Analog Devices, Inc.
    Inventors: Srivatsan Parthasarathy, Javier Alejandro Salcedo, Shuyun Zhang
  • Publication number: 20140110825
    Abstract: Compound semiconductor lateral PNP bipolar transistors are fabricated based on processes traditionally used for formation of compound semiconductor NPN heterojunction bipolar transistors and hence such PNP bipolar transistors can be fabricated inexpensively using existing fabrication technologies. In particular, GaAs-based lateral PNP bipolar transistors are fabricated using GaAs-based NPN heterojunction bipolar transistor fabrication processes.
    Type: Application
    Filed: October 18, 2012
    Publication date: April 24, 2014
    Applicant: ANALOG DEVICES, INC.
    Inventors: Srivatsan Parthasarathy, Javier Alejandro Salcedo, Shuyun Zhang
  • Publication number: 20140109083
    Abstract: Deployment and servicing tasks associated with multi-tier, distributed applications, application environments and data centers are automated so that a person does not have to manually perform these tasks. All of the information describing and defining the distributed service is modeled and stored in a re-useable service template that can be used to drive an automated system to programmatically deploy and manage the service over time. Deployment and servicing of a distributed application can be automated using re-useable models that capture hardware and workload definitions. The re-useable models in the form of service templates enable delta-based servicing of the application. The service can be deployed to one or more physical machines, one or more virtual machines or to a combination thereof. A default deployment plan can be customized with instance-specific customizations of service parameters.
    Type: Application
    Filed: December 13, 2013
    Publication date: April 17, 2014
    Applicant: MICROSOFT CORPORATION
    Inventors: WILLIAM L. SCHEIDEL, ROBERT M. FRIES, SRIVATSAN PARTHASARATHY, ALAN C. SHI, JAMES P. FINNIGAN
  • Patent number: 8694986
    Abstract: The present invention extends to methods, systems, and computer program products for providing update notifications on distributed application objects. When a new version of an object is created that another object depends on, a notification can be added to the dependent object to alert a person that manages the dependent object of the creation of the updated object. Dependent objects can include template objects, such as virtual machine template objects that refer to virtual disk objects and service template objects that refer to one or more virtual machine template objects, as well as service instance objects that represent service instances that are instantiated from template objects. Versions of objects within a family can be identified by sharing a family name and having different releases. A timestamp is used to represent when an object is released to determine which version of an object is the newest version in a family.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: April 8, 2014
    Assignee: Microsoft Corporation
    Inventors: Alan Shi, Srivatsan Parthasarathy, Biddappa Nanaiah Berera, Rajeet Nair, Rakesh Malhotra, Michael Michael, Eric Joseph Winner
  • Patent number: 8689203
    Abstract: Software update techniques are described. In at least one implementation, updates are filtered based on criticality to operation of one or more items of software. A plurality of identities are published to a plurality of computing devices, each for a respective one of the updates that are filtered as being critical to the operation of the one or more items of software. The updates that are not filtered as being critical to the operation of the one or more items of software are made available via polling.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: April 1, 2014
    Assignee: Microsoft Corporation
    Inventor: Srivatsan Parthasarathy
  • Publication number: 20140084331
    Abstract: A protection clamp is provided between a first terminal and a second terminal, and includes a multi-gate high electron mobility transistor (HEMT), a current limiting circuit, and a forward trigger control circuit. The multi-gate HEMT includes a drain/source, a source/drain, a first depletion-mode (D-mode) gate, a second D-mode gate, and an enhancement-mode (E-mode) gate disposed between the first and second D-mode gates. The drain/source and the first D-mode gate are connected to the first terminal and the source/drain and the second D-mode gate are connected to the second terminal. The forward trigger control and the current limiting circuits are coupled between the E-mode gate and the first and second terminals, respectively. The forward trigger control circuit provides an activation voltage to the E-mode gate when a voltage of the first terminal exceeds a voltage of the second terminal by a forward trigger voltage.
    Type: Application
    Filed: September 24, 2012
    Publication date: March 27, 2014
    Applicant: ANALOG DEVICES, INC.
    Inventors: Srivatsan Parthasarathy, Javier Alejandro Salcedo, Shuyun Zhang
  • Publication number: 20140084347
    Abstract: A protection circuit including a multi-gate high electron mobility transistor (HEMT), a forward conduction control block, and a reverse conduction control block is provided between a first terminal and a second terminal. The multi-gate HEMT includes an explicit drain/source, a first depletion-mode (D-mode) gate, a first enhancement-mode (E-mode) gate, a second E-mode gate, a second D-mode gate, and an explicit source/drain. The drain/source and the first D-mode gate are connected to the first terminal and the source/drain and the second D-mode gate are connected to the second terminal. The forward conduction control block turns on the second E-mode gate when a voltage difference between the first and second terminals is greater than a forward conduction trigger voltage, and the reverse conduction control block turns on the first E-mode gate when the voltage difference is more negative than a reverse conduction trigger voltage.
    Type: Application
    Filed: September 24, 2012
    Publication date: March 27, 2014
    Applicant: ANALOG DEVICES, INC.
    Inventors: Javier Alejandro Salcedo, Srivatsan Parthasarathy, Shuyun Zhang
  • Publication number: 20140071566
    Abstract: In one embodiment, an apparatus includes a package that encompasses at least a first integrated circuit die and a second integrated circuit die. The first integrated circuit die is attached to the package and includes one or more electrical overstress/electrostatic discharge (EOS/ESD) protection circuits. The second integrated circuit die is attached to the package and electrically coupled to the first integrated circuit die such that at least one component of the second integrated circuit die is protected from EOS/ESD by the first integrated circuit die.
    Type: Application
    Filed: September 11, 2012
    Publication date: March 13, 2014
    Applicant: ANALOG DEVICES, INC.
    Inventors: Srivatsan PARTHASARATHY, Charly EL-KHOURY, Francisco SANTOS, Nathan R. Carter
  • Patent number: 8645950
    Abstract: Techniques for analyzing virtual machine images are described. In one embodiment, a subset of settings is extracted from one or more virtual machine images, the virtual machine images store therein values of the settings. The settings are used by software executing in virtual machines of the virtual machine images, respectively. A target one of the virtual machine images is selected and target values of the settings are obtained from the target virtual machine image. Sample values of the settings are obtained from a plurality of virtual machine images. The subset formed by identifying similarities and differences of the values between the virtual machine images.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: February 4, 2014
    Assignee: Microsoft Corporation
    Inventors: Robert Fries, Srivatsan Parthasarathy, Galen Hunt
  • Patent number: 8627309
    Abstract: Deployment and servicing tasks associated with multi-tier, distributed applications, application environments and data centers are automated so that a person does not have to manually perform these tasks. All of the information describing and defining the distributed service is modeled and stored in a re-useable service template that can be used to drive an automated system to programmatically deploy and manage the service over time. Deployment and servicing of a distributed application can be automated using re-useable models that capture hardware and workload definitions. The re-useable models in the form of service templates enable delta-based servicing of the application. The service can be deployed to one or more physical machines, one or more virtual machines or to a combination thereof. A default deployment plan can be customized with instance-specific customizations of service parameters.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: January 7, 2014
    Assignee: Microsoft Corporation
    Inventors: William L. Scheidel, Robert M. Fries, Srivatsan Parthasarathy, Alan C. Shi, James P. Finnigan
  • Publication number: 20130339950
    Abstract: A system in which a virtual machine manager determines tasks that are to be performed on virtual machines executing on a host computing system. The host computing system further executes an intermediary virtual machine task management module that receives virtual machine tasks from the virtual machine manager. Upon request from the virtual machines, the intermediary module identifies the tasks that are to be performed on the requesting virtual machine to the requesting virtual machine. The virtual machines may perhaps also initiate the performance of such identified tasks. Since the virtual machine itself is initiating contact with the intermediary module, and is not interacting directly with the virtual machine manager, the virtual machine manager need not be in the same sphere of trust as the virtual machine.
    Type: Application
    Filed: June 19, 2012
    Publication date: December 19, 2013
    Applicant: Microsoft Corporation
    Inventors: Aravind Ramarathinam, Srivatsan Parthasarathy