Patents by Inventor Stefan Dietrich

Stefan Dietrich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240028450
    Abstract: Methods, systems, and devices for bit and signal level mapping are described to enable a memory device to transmit or receive a multi-symbol signal that includes more than two (2) physical levels. Some cyclic redundancy check (CRC) calculations may generate one or more bits of CRC output per symbol of an associated signal and the output may be transmitted via a multi-symbol signal by converting one or more CRC output bit to a physical level of the signal. The conversion, or mapping, process may be performed such that the physical levels of the signal avoid a transition between a highest physical level and lowest physical level. For example, a modulation scheme or mapping process may be configured to map different values of CRC output bits to different physical levels, where the different physical levels are separated by one other physical level associated with the signal or the modulation scheme.
    Type: Application
    Filed: June 23, 2023
    Publication date: January 25, 2024
    Inventors: Stefan Dietrich, Martin Brox, Michael Dieter Richter, Thomas Hein, Ronny Schneider, Natalija Jovanovic
  • Patent number: 11870616
    Abstract: Methods, systems, and devices for postamble for multi-level signal modulation are described. One or more channels of a bus may be driven with a multi-level signal having at least two (2) distinct signal levels. After driving the bus with the multi-level signal, at least one (1) of the channels may be terminated. In some examples, the channel may be terminated to a relatively high signal level. Before termination, the channel may be driven with a postamble having an intermediate signal level. Driving the channel to an intermediate signal level before terminating the channel (e.g., to a high signal level) may avoid maximum transitions of the signal. For example, transitions between a lowest potential signal level and the high signal level (e.g., the termination level) may be avoided.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: January 9, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Stefan Dietrich, Natalija Jovanovic, Ronny Schneider, Martin Brox, Thomas Hein, Michael Dieter Richter
  • Patent number: 11863073
    Abstract: A DC-DC converter includes an output terminal, a reference voltage source, an error amplifier, and a compensation circuit. The error amplifier is coupled to the output terminal and the reference voltage source. The error amplifier is configured to generate an error signal representative of a difference between a voltage at the output terminal and a reference voltage provided by the reference voltage source. The compensation circuit is coupled to the error amplifier. The compensation circuit includes a resistor, a capacitor, and a switch control circuit. The resistor is coupled to the error amplifier. The capacitor is coupled to the resistor. The switch control circuit is configured to modulate connection of the resistor to the capacitor based on a switching frequency of the DC-DC converter.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: January 2, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Narayanan Seetharaman, Julian Leonhard Becker Ferreira, Puneet Sareen, Stefan Dietrich
  • Publication number: 20230310020
    Abstract: A surgical generator configured to output a high-frequency alternating voltage to a surgical ultrasound instrument. An oscillator generates a driving oscillation for an inverter generating high-frequency voltage being for the surgical instrument. A matching-coil emulation device includes a correction device acting on the driving oscillation. The correction device includes a mixing unit and a feedback circuit, modifying the driving oscillation supplied to the inverter. An estimator calculates a virtual current which would flow in the emulated matching-coil if it were present, based on this and a measured output voltage an artificial phase shift is determined for steering of the oscillator. Thereby, the transfer function is reshaped mimicking that of a physical matching coil. Accordingly, a bulky matching coil that must be precisely tuned to the ultrasound instrument and restricts use of newer and different ultrasound instruments is no longer needed.
    Type: Application
    Filed: February 14, 2023
    Publication date: October 5, 2023
    Applicant: OLYMPUS WINTER & IBE GMBH
    Inventors: Jelle DIJKSTRA, Stefan DIETRICH, Dimitri BECKER
  • Publication number: 20230301701
    Abstract: An electrosurgical generator includes a control unit, an electrosurgical function unit, and a user interface unit, wherein the electrosurgical function unit is configured to provide an electrosurgical therapy signal to one or more electrosurgical devices, the control unit is configured to control operation of the electrosurgical function and user interface units, and the user interface unit is configured to receive status information data from the control unit and to output that information to a user and allow input of user input data and to communicate that data to the control unit; wherein the user interface unit includes a proximity sensor configured to detect the presence of a user within a predetermined proximity of the user interface unit and to output a detection signal to the control unit, and the control unit is configured to switch the electrosurgical generator between first and second operational modes in response to the signal.
    Type: Application
    Filed: February 14, 2023
    Publication date: September 28, 2023
    Applicant: OLYMPUS WINTER & IBE GMBH
    Inventors: Stefan DIETRICH, Jens KRÜGER, Fabian JANICH, Fabian STOPP, Anne KWIK
  • Publication number: 20230306836
    Abstract: A surgical device system, and methods for operating a surgical device system, includes: at least one surgical instrument, a surgical generator for providing surgical energy to at least one surgical instrument, and at least one supplementary device for providing a supplementary function to at least one of the surgical generator and/or the at least one surgical instrument; the surgical generator being configured to wirelessly communicate with the at least one supplementary device, wherein the surgical generator and the at least one supplementary device are configured to establish a first communication channel for exchanging operational data, the first communication being defined by a number of first communication channel parameters; and wherein the surgical generator the at least one supplementary device are configured to establish a second communication channel for exchanging first communication channel parameters.
    Type: Application
    Filed: March 16, 2023
    Publication date: September 28, 2023
    Applicant: OLYMPUS WINTER & IBE GMBH
    Inventors: Stefan DIETRICH, Felix KÖHNECKE
  • Publication number: 20230289701
    Abstract: The present disclosure may provide methods, systems, and apparatuses for training a remote workplace culture assessment model comprising a neural network. An assessment may be sent to a user device corresponding to a user of a workplace. The assessment may include a test statement. A user response to the test statement may be received. The user response and test statement may be applied to the remote workplace culture assessment model, thereby yielding a statement strength, a statement correlation, and a remote workplace culture profile. The weighting input of the remote workplace culture assessment model may be changed based on the statement strength and the statement correlation, thereby training the remote workplace culture assessment model.
    Type: Application
    Filed: October 25, 2022
    Publication date: September 14, 2023
    Inventors: Thomas P. Bradbury, Stefan Dietrich
  • Patent number: 11726865
    Abstract: Methods, systems, and devices for bit and signal level mapping are described to enable a memory device to transmit or receive a multi-symbol signal that includes more than two (2) physical levels. Some cyclic redundancy check (CRC) calculations generate one or more bits of CRC output per symbol of an associated signal and the output are transmitted via a multi-symbol signal by converting one or more CRC output bit to a physical level of the signal. The conversion, or mapping, process is performed such that the physical levels of the signal avoid a transition between a highest physical level and lowest physical level. For example, a modulation scheme or mapping process is configured to map different values of CRC output bits to different physical levels, where the different physical levels are separated by one other physical level associated with the signal or the modulation scheme.
    Type: Grant
    Filed: April 21, 2022
    Date of Patent: August 15, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Stefan Dietrich, Martin Brox, Michael Dieter Richter, Thomas Hein, Ronny Schneider, Natalija Jovanovic
  • Publication number: 20230188248
    Abstract: Methods, systems, and devices for data inversion techniques are described to enable a memory device to transmit or receive a multi-symbol signal that includes more than two (2) physical levels. Some portions of some multi-symbol signals may be inverted. A transmitting device may determine to invert one or more data symbols based on one or more parameters. A receiving device may determine that one or more data symbols are inverted and may re-invert the one or more data symbols (e.g., to an original value). When receiving or transmitting a multi-symbol signal, a device may invert or re-invert a data symbol by changing a value of one bit of the data symbol. Additionally or alternatively, a device may invert or re-invert a data symbol of a multi-symbol signal by inverting a physical level of the signal across an axis located between or associated with one or more physical levels.
    Type: Application
    Filed: February 10, 2023
    Publication date: June 15, 2023
    Inventors: Stefan Dietrich, Thomas Hein, Natalija Jovanovic, Ronny Schneider, Michael Dieter Richter, Martin Brox
  • Patent number: 11675656
    Abstract: Methods, systems, and devices related to error detection code generation techniques are described. A memory device may identify a first set of bits for transmission to a host device and calculate an error detection code associated with the first set of bits. Prior to transmitting the first set of bits, the memory device may modify one or more bits of the first set of bits to generate a second set of bits for transmission from the memory device to the host device. The memory device may modify one or more bits of the first error detection code to generate a second error detection code based on a parity of the modified one or more bits of the first set of bits. The memory device may transmit the second set of bits and the second error detection code to the host device.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: June 13, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Natalija Jovanovic, Stefan Dietrich
  • Patent number: 11621033
    Abstract: Methods, systems, and devices for techniques for low power operation are described. A device may be configurable to operate in a first mode and a second mode, where the first mode may include transmitting using a first modulation scheme having two logic levels and the second mode may include transmitting using a second modulation scheme having three or more (e.g., four) logic levels. The device may identify a data symbol for transmission and select, from the first mode and the second mode, the first modulation scheme for the transmission. In some example, the device may determine which of the two modes to select based on a value stored at a mode register. Here, the value stored by the mode register may indicate to utilize the first modulation scheme associated with the first mode. Thus, the device may transmit the data symbol by a signal modulated by the first modulation scheme.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: April 4, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Martin Brox, Thomas Hein, Stefan Dietrich, Natalija Jovanovic, Ronny Schneider, Michael Dieter Richter
  • Patent number: 11619294
    Abstract: A gear unit having a shaft, particularly an input shaft, a fan impeller being joined in rotatably fixed manner to the shaft, a fan cowl, which at least partially surrounds the fan impeller, being mounted on the gear housing, a separating plate for separating the pressure chamber of the fan from the suction chamber of the fan being joined to the fan cowl, the separating plate having an air inlet for the fan impeller and being disposed on the side of the fan impeller facing away axially from the gear unit.
    Type: Grant
    Filed: June 4, 2013
    Date of Patent: April 4, 2023
    Assignee: SEW-EURODRIVE GMBH & CO. KG
    Inventors: Konstantin Völker, Peter Barton, Stefan Dietrich, Anette Bunka
  • Patent number: 11601215
    Abstract: Methods, systems, and devices for data inversion techniques are described to enable a memory device to transmit or receive a multi-symbol signal that includes more than two (2) physical levels. Some portions of some multi-symbol signals may be inverted. A transmitting device may determine to invert one or more data symbols based on one or more parameters. A receiving device may determine that one or more data symbols are inverted and may re-invert the one or more data symbols (e.g., to an original value). When receiving or transmitting a multi-symbol signal, a device may invert or re-invert a data symbol by changing a value of one bit of the data symbol. Additionally or alternatively, a device may invert or re-invert a data symbol of a multi-symbol signal by inverting a physical level of the signal across an axis located between or associated with one or more physical levels.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: March 7, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Stefan Dietrich, Thomas Hein, Natalija Jovanovic, Ronny Schneider, Michael Dieter Richter, Martin Brox
  • Publication number: 20230069525
    Abstract: An electrosurgical generator for an electrosurgical instrument includes a DC voltage supply and a high-voltage inverter that generates a high-frequency AC voltage having a variable voltage and frequency that is output at an output for the connection of the electrosurgical instrument. The inverter is configured as a multilevel inverter and includes a plurality of inverter cells connected in a cascaded manner that are driven by a control device. Thanks to the cascading, switching losses incurred in the power semiconductors are reduced, both in terms of value (through the divided and thus lower voltage) and in terms of frequency (through the reduced switching frequency).
    Type: Application
    Filed: August 18, 2022
    Publication date: March 2, 2023
    Applicant: OLYMPUS WINTER & IBE GMBH
    Inventors: Jelle DIJKSTRA, Thomas FÄHSING, Daniel RAMIN, Stefan DIETRICH, Thomas PREZEWOWSKY, Stefan SCHIDDEL, Dimitri BECKER
  • Publication number: 20230053885
    Abstract: A medical device and a method of operating a medical device, wherein the device includes a medical function assembly, a control assembly, a user interface, and a user information element, configured to display information about a type of the medical device, wherein the control assembly includes a memory element in which different operating parameters for the medical function assembly are storable and wherein the control assembly is configured to control the medical function assembly to perform different medical functions as a function of operating parameters stored in the memory element, wherein the control assembly is further configured to control the user information element to display information about the operating parameters stored in the memory element. The medical device wherein the user information element is configured to continue to reproduce the information after being controlled once by the control assembly, independent of continued control by the control assembly.
    Type: Application
    Filed: August 16, 2022
    Publication date: February 23, 2023
    Applicant: OLYMPUS WINTER & IBE GMBH
    Inventor: Stefan DIETRICH
  • Patent number: 11563378
    Abstract: A converter operable to convert an input voltage at an input node to an output voltage at an output node coupled to a load by switching on and off a transistor at a switching frequency, the converter comprising: an error amplifier circuit having a first input coupled to a reference voltage, a second input coupled to the output node through a resistive divider, a first output operable to output a control current and a second output operable to output a current equivalent to the control current; a peak current comparator circuit having a first input coupled to the second output of the error amplifier circuit, a second input and an output, the second input is coupled to the input node through an inductor; an off-time timer circuit having an input coupled to the first output of the error amplifier circuit and an output, the off-time timer circuit operable to set the switching frequency based on the control current; and a control circuit having a first input coupled to the output of the peak current comparator cir
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: January 24, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Julian Becker, Christian Harder, Eduardas Jodka, Stefan Dietrich, Puneet Sareen
  • Patent number: 11552566
    Abstract: To facilitate current sensing for valley current-controlled power converters, an example apparatus includes a comparator having a first terminal, a second terminal, and an output. A first transistor has a first drain coupled to the first terminal of the comparator. A second transistor has a second drain coupled to the first terminal of the comparator. A third transistor has a third drain coupled to the second terminal of the comparator.
    Type: Grant
    Filed: February 15, 2021
    Date of Patent: January 10, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Joerg Kirchner, Stefan Dietrich, Ivan Shumkov, Christian Harder
  • Publication number: 20220370115
    Abstract: An electrosurgical generator comprising two HF generator units, two output transformers, and at least four output terminals for connecting electrosurgical instruments. Together with the associated output transformer and corresponding output terminals, each HF generator unit forms an HF generator module.
    Type: Application
    Filed: October 23, 2020
    Publication date: November 24, 2022
    Applicant: OLYMPUS WINTER & IBE GMBH
    Inventors: Stefan DIETRICH, Jelle DIJKSTRA, Thomas FAEHSING
  • Publication number: 20220245026
    Abstract: Methods, systems, and devices for bit and signal level mapping are described to enable a memory device to transmit or receive a multi-symbol signal that includes more than two (2) physical levels. Some cyclic redundancy check (CRC) calculations may generate one or more bits of CRC output per symbol of an associated signal and the output may be transmitted via a multi-symbol signal by converting one or more CRC output bit to a physical level of the signal. The conversion, or mapping, process may be performed such that the physical levels of the signal avoid a transition between a highest physical level and lowest physical level. For example, a modulation scheme or mapping process may be configured to map different values of CRC output bits to different physical levels, where the different physical levels are separated by one other physical level associated with the signal or the modulation scheme.
    Type: Application
    Filed: April 21, 2022
    Publication date: August 4, 2022
    Inventors: Stefan Dietrich, Martin Brox, Michael Dieter Richter, Thomas Hein, Ronny Schneider, Natalija Jovanovic
  • Publication number: 20220171673
    Abstract: Methods, systems, and devices related to error detection code generation techniques are described. A memory device may identify a first set of bits for transmission to a host device and calculate an error detection code associated with the first set of bits. Prior to transmitting the first set of bits, the memory device may modify one or more bits of the first set of bits to generate a second set of bits for transmission from the memory device to the host device. The memory device may modify one or more bits of the first error detection code to generate a second error detection code based on a parity of the modified one or more bits of the first set of bits. The memory device may transmit the second set of bits and the second error detection code to the host device.
    Type: Application
    Filed: February 18, 2022
    Publication date: June 2, 2022
    Inventors: Natalija Jovanovic, Stefan Dietrich