Patents by Inventor Stefan Landis

Stefan Landis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220404704
    Abstract: A method for making at least one structure having sidewalls with different inclinations includes providing a stack including a substrate having a layer of a positive resin whose tone could be reversed when exposed to an insolation dose D<Dinversion, the patterns exposed to the dose Dinversion not being sensitive to creeping at the glass-transition temperature Tfluage of the resin; forming a non-sensitive first pattern by exposing the resin to a first dose D1?Dinversion, the first pattern having a first sidewall having a first inclination; and forming a creep-sensitive second pattern by exposing the resin to a second dose D2<Dinversion. Creeping is performed by applying a temperature T?Tfluage to make the second pattern creep over a portion of the first pattern by leaving uncovered at least partially the first sidewall of the first pattern, and defining at least one second sidewall having a second inclination different from the first inclination.
    Type: Application
    Filed: August 27, 2020
    Publication date: December 22, 2022
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Stefan LANDIS, Romain LAURENT
  • Patent number: 11495462
    Abstract: A method for forming reliefs on a face of a substrate is provided, successively including forming a protective screen for protecting at least a first zone of the face; an implanting to introduce at least one species comprising carbon into the substrate from the face of the substrate, the forming of the protective screen and the implanting being configured to form, in the substrate, at least one carbon modified layer having a concentration of implanted carbon greater than or equal to an etching threshold only from a second zone of the face of the substrate not protected by the protective screen; removing the protective screen; and etching the substrate from the first zone selectively with respect to the second zone.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: November 8, 2022
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Lamia Nouri, Stefan Landis, Nicolas Posseme
  • Patent number: 11456403
    Abstract: A method is provided for producing a microelectronic device having a subsequent grating of reliefs of which at least one wall is slanted, the method including providing a structure including a base, and an initial grating of reliefs, each relief having at least one proximal end in contact with the base, a distal end, and at least one wall extending between the proximal end and the distal end; and laying the reliefs of the initial grating on one another, by application of at least one stress on the structure, such that walls facing two adjacent reliefs come into contact, thus generating at least one subsequent grating of reliefs of which at least one wall is slanted.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: September 27, 2022
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Stefan Landis, Hubert Teyssedre
  • Patent number: 11444041
    Abstract: A method for producing an individualisation area includes providing at least a first level of the electrical tracks. The method includes depositing a dielectric layer and a deformable layer on the interconnection level. The method includes producing, in an area of the deformable layer, recessed patterns, by penetrating an imprint mould into the deformable layer, the production of the patterns being configured so that the patterns have a randomness in the deformable layer, thus forming random patterns. The method includes transferring the random patterns into the dielectric layer to form transferred random patterns therein and exposing the vias located in line with the transferred random patterns. The method includes filling the transferred random patterns with an electrically conductive material so as to form electrical connections between vias. The method includes producing a second level of the electrical tracks on the vias and the electrical connections.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: September 13, 2022
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Hubert Teyssedre, Stefan Landis, Michael May
  • Patent number: 11415881
    Abstract: A method for functionalising a substrate intended for the self-assembly of a block copolymer, includes depositing on the surface of a substrate a layer of a first polymer material, the first polymer having a first chemical affinity with respect to the block copolymer; grafting one part only of the first polymer material layer onto the surface of the substrate; printing, using a mould, patterns in a sacrificial layer arranged above the grafted part of the first polymer material layer; transferring the patterns of the sacrificial layer into the grafted part of the first polymer material layer, until the substrate is reached; and removing at least one part of the sacrificial layer by wet etching, so as to uncover the grafted part of the first polymer material layer.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: August 16, 2022
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Stefan Landis, Raluca Tiron
  • Publication number: 20220111562
    Abstract: A method for producing a structure having at least one curved pattern includes providing a substrate having a front face, where one portion is structured by at least one plurality of reliefs, the reliefs of each plurality defining spaces therebetween, and another portion is free of reliefs. The method also includes depositing a base layer of a material such as a polymer or a glass, on the front face of the substrate, at least in line with the reliefs, and allowing the material of the base layer to at least partially fill the at least one of the spaces by deformation. The base layer is thus deformed so that its free surface has at least one curved pattern.
    Type: Application
    Filed: July 23, 2019
    Publication date: April 14, 2022
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Hubert TEYSSEDRE, Pierre BRIANCEAU, Stefan LANDIS
  • Publication number: 20220028803
    Abstract: The invention relates to a method for making an individualization zone of a microchip comprising a first (10A) and a second (20A) level of electrical tracks (10, 20), and a level of interconnections (30A) comprising vias (30), the method comprising the following steps: providing the first level (10A) and a dielectric layer (200, 201, 202), making a hard metal mask (300) on the dielectric layer (200, 201, 202), etching the dielectric layer (200, 201, 202) through the mask openings (301) by etching based on fluorinated chemistry, preferably oxidizing the hard metal mask (300) by hydrolysis so as to form randomly distributed residues (31) at certain openings (320R), filling the openings (320, 320R) so as to form at least the vias (30) of the level of interconnections (30A), said vias (30) comprising functional vias (30OK) at the openings without residues (320) and inactive vias (30KO) at the openings with residues (320R).
    Type: Application
    Filed: July 21, 2021
    Publication date: January 27, 2022
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Nicolas POSSEME, Stefan LANDIS
  • Publication number: 20220028802
    Abstract: The invention relates to a method for making an individualization zone of a microchip comprising a first (10A) and a second (20A) level of electrical tracks (10, 20), and a conductor layer (30A) comprising via holes (30), the method comprising the following steps: providing at least one dielectric layer (200, 201, 202) having a thickness hd, forming a metal mask layer (300) having a thickness hm and a residual stress ?r on the at least one dielectric layer (200, 201, 202), etching the layer (300) so as to form line patterns (310) of width l, etching the at least one dielectric layer (200, 201, 202) between the line patterns (310) so as to form trenches (210) separated by walls (211), filling the trenches (210) with an electrically conductive material so as to form the electrical tracks (10, 10KO) of the first level (10A), forming via holes (30, 30OK, 30KO1, 30KO2) of the conductor layer (30A), forming the second level (20A) of electrical tracks (20, 20OK), the method being characterized in that the thickn
    Type: Application
    Filed: July 21, 2021
    Publication date: January 27, 2022
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Nicolas POSSEME, Stefan LANDIS, Hubert TEYSSEDRE
  • Publication number: 20210398917
    Abstract: A method for producing a plurality of chips each comprising an individualisation region, each chip comprising at least: a first and a second level of the electrical tracks, and an interconnections level comprising vias. The method includes producing on the dielectric layer covering the first level a mask having openings located in line with the electrical tracks and making the dielectric layer accessible. The method includes producing, in a region of the chip comprising the individualisation region, patterns conformed so that: first openings of the hard mask are not masked by the patterns, and second openings of the hard mask are masked by the patterns. The method includes producing via openings in the dielectric layer in line solely with the first openings. The method further includes filling in the via openings with an electrically conductive material, and producing the second level of the electrical tracks on the vias.
    Type: Application
    Filed: March 30, 2021
    Publication date: December 23, 2021
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Stefan LANDIS, Michaƫl MAY
  • Publication number: 20210375794
    Abstract: A method for producing an individualisation area includes providing at least a first level of the electrical tracks. The method includes depositing a dielectric layer and a deformable layer on the interconnection level. The method includes producing, in an area of the deformable layer, recessed patterns, by penetrating an imprint mould into the deformable layer, the production of the patterns being configured so that the patterns have a randomness in the deformable layer, thus forming random patterns. The method includes transferring the random patterns into the dielectric layer to form transferred random patterns therein and exposing the vias located in line with the transferred random patterns. The method includes filling the transferred random patterns with an electrically conductive material so as to form electrical connections between vias. The method includes producing a second level of the electrical tracks on the vias and the electrical connections.
    Type: Application
    Filed: March 30, 2021
    Publication date: December 2, 2021
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Hubert Teyssedre, Stefan Landis, Michael May
  • Publication number: 20210217937
    Abstract: A method is provided for producing a microelectronic device having a subsequent grating of reliefs of which at least one wall is slanted, the method including providing a structure including a base, and an initial grating of reliefs, each relief having at least one proximal end in contact with the base, a distal end, and at least one wall extending between the proximal end and the distal end; and laying the reliefs of the initial grating on one another, by application of at least one stress on the structure, such that walls facing two adjacent reliefs come into contact, thus generating at least one subsequent grating of reliefs of which at least one wall is slanted.
    Type: Application
    Filed: November 18, 2020
    Publication date: July 15, 2021
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Stefan LANDIS, Hubert TEYSSEDRE
  • Patent number: 11049724
    Abstract: A method for producing at least one pattern in a substrate is provided, including providing a substrate having a front face surmounted by at least one masking layer carrying at least one mask pattern, carrying out an ion implantation of the substrate so as to form at least one first zone having a resistivity ?1 less than a resistivity ?2 of at least one second non-modified zone, after the ion implantation step, immersing the substrate in an electrolyte, and removing the at least one first zone selectively at the at least one second zone, the removing including at least an application of an electrochemistry step to the substrate to cause a porosification of the at least one first zone selectively at the at least one second zone.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: June 29, 2021
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Lamia Nouri, Frederic-Xavier Gaillard, Stefan Landis, Nicolas Posseme
  • Patent number: 11038701
    Abstract: The invention relates to a method of securing an integrated circuit during its fabrication on a wafer, said method including the following steps: delimitation of said wafer of the integrated circuit (1) into a first zone called a standard zone (5a) and a second zone called a security zone (5b), and creation of a random connection tracks network (7b) in said security zone (5b) configured to interconnect a set of conducting nodes (9b) thus forming a physical unclonable function modelled by random electrical continuity that can be queried through said set of conducting nodes using a challenge-response authentication protocol.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: June 15, 2021
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Michael May, Stefan Landis, Florian Pebay-Peyroula
  • Patent number: 10886239
    Abstract: A method for securing an integrated circuit during the realization thereof, including the following steps: delimiting the integrated circuit into a first zone referred to as standard zone and into a second zone referred to as security zone, forming of a set of vias in the security zone, and introducing of a layer loaded with contaminant particles configured to randomly obstruct a portion of the vias, thus forming a random interconnection structure in the security zone, the random interconnection structure creating a physical unclonable function.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: January 5, 2021
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Stefan Landis, Hubert Teyssedre
  • Publication number: 20200335343
    Abstract: A method for forming reliefs on a face of a substrate is provided, successively including forming a protective screen for protecting at least a first zone of the face; an implanting to introduce at least one species comprising carbon into the substrate from the face of the substrate, the forming of the protective screen and the implanting being configured to form, in the substrate, at least one carbon modified layer having a concentration of implanted carbon greater than or equal to an etching threshold only from a second zone of the face of the substrate not protected by the protective screen; removing the protective screen; and etching the substrate from the first zone selectively with respect to the second zone.
    Type: Application
    Filed: July 2, 2020
    Publication date: October 22, 2020
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Lamia NOURI, Stefan LANDIS, Nicolas POSSEME
  • Patent number: 10739583
    Abstract: A method for determining at least one reflow parameter for obtaining a structure approximating a sought structure by reflowing an initial structure different to the sought structure, the initial structure including at least one pattern formed in a thermo-deformable layer arranged on a substrate. The thermo-deformable layer forms a residual layer surrounding each pattern and from which each pattern extends such that each pattern has an interface only with the surrounding medium. The method includes: predicting progression over time of geometry of the initial structure subject to reflow, to obtain a plurality of predicted structures each associated with reflow parameters including at least a reflow time and a reflow temperature; computing correlation values of the geometry of each predicted structure with respect to the sought structure; identifying reflow parameters for obtaining the predicted structure offering a highest correlation value.
    Type: Grant
    Filed: January 19, 2015
    Date of Patent: August 11, 2020
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Vincent Reboud, Stefan Landis, Etienne Rognin
  • Patent number: 10741398
    Abstract: A method for forming reliefs on a face of a substrate is provided, successively including forming a protective screen for protecting at least a first zone of the face; an implanting to introduce at least one species comprising carbon into the substrate from the face of the substrate, the forming of the protective screen and the implanting being configured to form, in the substrate, at least one carbon modified layer having a concentration of implanted carbon greater than or equal to an etching threshold only from a second zone of the face of the substrate not protected by the protective screen; removing the protective screen; and etching the substrate from the first zone selectively with respect to the second zone.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: August 11, 2020
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Lamia Nouri, Stefan Landis, Nicolas Posseme
  • Publication number: 20200135663
    Abstract: A method for securing an integrated circuit during the realization thereof, including the following steps: delimiting the integrated circuit into a first zone referred to as standard zone and into a second zone referred to as security zone, forming of a set of vias in the security zone, and introducing of a layer loaded with contaminant particles configured to randomly obstruct a portion of the vias, thus forming a random interconnection structure in the security zone, the random interconnection structure creating a physical unclonable function.
    Type: Application
    Filed: October 29, 2019
    Publication date: April 30, 2020
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE AUX ENERGIES ALTERNATIVES
    Inventors: Stefan LANDIS, Hubert Teyssedre
  • Publication number: 20200090941
    Abstract: A method for producing at least one pattern in a substrate is provided, including providing a substrate having a front face surmounted by at least one masking layer carrying at least one mask pattern, carrying out an ion implantation of the substrate so as to form at least one first zone having a resistivity ?1 less than a resistivity ?2 of at least one second non-modified zone, after the ion implantation step, immersing the substrate in an electrolyte, and removing the at least one first zone selectively at the at least one second zone, the removing including at least an application of an electrochemistry step to the substrate to cause a porosification of the at least one first zone selectively at the at least one second zone.
    Type: Application
    Filed: May 24, 2018
    Publication date: March 19, 2020
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVE
    Inventors: Lamia NOURI, Frederic-Xavier GAI LIARD, Stefan LANDIS, Nicolas POSSEME
  • Patent number: 10553435
    Abstract: The invention relates in particular to a method for producing subsequent patterns in an underlying layer (120), the method comprising at least one step of producing prior patterns in a carbon imprintable layer (110) on top of the underlying layer (120), the production of the prior patterns involving nanoimprinting of the imprintable layer (110) and leave in place a continuous layer formed by the imprintable layer (110) and covering the underlying layer (120), characterized in that it comprises the following step: at least one step of modifying the underlying layer (120) via ion implantation (421) in the underlying layer (120), the implantation (421) being carried out through the imprintable layer (110) comprising the subsequent patterns, the parameters of the implantation (421) being chosen in such a way as to form, in the underlying layer (120), implanted zones (122) and non-implanted zones, the non-implanted zones defining the subsequent patterns and having a geometry that is dependent on the prior patterns
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: February 4, 2020
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Stefan Landis, Nicolas Posseme, Lamia Nouri