Patents by Inventor Stephen M. Trimberger

Stephen M. Trimberger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190188419
    Abstract: An example method of configuring a programmable integrated circuit (IC) in a computer system includes: selecting a first region of a programmable fabric of the programmable IC for implementation of a shell circuit, the shell circuit configured to interface with a bus of the computer system; selecting a second region of the programmable fabric for implementation of an application circuit, the application circuit configured to interface with the shell circuit; providing a fence region disposed between the first region and the second region, the fence region including a set of un-configured tiles of the programmable fabric; generating configuration data for a circuit design having the first region, the second region, and the fence region; and loading the configuration data to the programmable IC.
    Type: Application
    Filed: December 18, 2017
    Publication date: June 20, 2019
    Applicant: Xilinx, Inc.
    Inventor: Stephen M. Trimberger
  • Patent number: 10325646
    Abstract: The disclosure describes approaches for generating a physically unclonable function (PUF) value. Power is applied to a power control circuit, an SRAM, and a PUF control circuit. After initially powering-up the SRAM, the PUF control circuit signals the power control circuit to disable power to the SRAM. The power control circuit disables power to the SRAM, and then re-enables power to the SRAM after having power to the SRAM disabled for a waiting period. The PUF control circuit reads a PUF value from the SRAM by the PUF control circuit after the enabling of power.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: June 18, 2019
    Assignee: XILINX, INC.
    Inventor: Stephen M. Trimberger
  • Publication number: 20190096813
    Abstract: An example integrated circuit (IC) package includes: a processing system and a programmable IC disposed on a substrate, the processing system coupled to the programmable IC through interconnect of the substrate; the processing system including components coupled to a ring interconnect, the components including a processor and an interface controller. The programmable IC includes: an interface endpoint coupled to the interface controller through the interconnect; and at least one peripheral coupled to the interface endpoint and configured for communication with the ring interconnect of the processing system through the interconnect endpoint and the interface controller.
    Type: Application
    Filed: September 28, 2017
    Publication date: March 28, 2019
    Applicant: Xilinx, Inc.
    Inventors: Austin H. Lesea, Sundararajarao Mohan, Stephen M. Trimberger
  • Patent number: 10147666
    Abstract: A method and apparatus are provided that includes an electronic device, a chip package and a method for cooling a chip package in an electronic device. In one example, the chip package includes an interposer or package substrate having a first IC die and a second IC die mounted thereon. The second IC die has a maximum safe operating temperature that is greater than a maximum safe operating temperature of the first IC die. An indicia is disposed on the chip package. The indicia designates an installation orientation of the interposer or package substrate which positions the first IC die upstream of the second IC die relative to a direction of cooling fluid flow.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: December 4, 2018
    Assignee: XILINX, INC.
    Inventors: Stephen M. Trimberger, Austin H. Lesea
  • Patent number: 10038503
    Abstract: In an adaptation module relating generally to adaptive optical channel compensation, an analysis module is coupled to receive a first data signal and a second data signal and coupled to provide first information and second information. A comparison module is coupled to compare the first information and the second information to provide third information. An adjustment module is coupled to receive the third information to provide fourth information to compensate for distortion in the second data signal with reference to the first data signal. The second data signal is associated with a conversion of the first data signal to an optical signal for communication via an optical channel.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: July 31, 2018
    Assignee: XILINX, INC.
    Inventors: Austin H. Lesea, Stephen M. Trimberger
  • Patent number: 10014949
    Abstract: Various apparatuses, circuits, systems, and methods for optical communication are disclosed. In some implementations an optical communication device includes an optical data port configured to support an optical fiber in a fixed position. The optical communication device may further include a plurality of optical communication circuits, each oriented to communicate optical signals at a respective position of a cross section of the optical fiber connected to the optical data port and a control circuit, responsive to optical signals communicated on the optical fiber connected to the optical data port and configured to determine ones of the plurality of optical communication circuits that are misaligned with the optical fiber and disable the determined ones of the plurality of optical communication circuits.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: July 3, 2018
    Assignee: XILINX, INC.
    Inventors: Stephen M. Trimberger, Austin H. Lesea
  • Patent number: 9941880
    Abstract: A system includes an integrated circuit (IC) chip with connections to plurality of external pins. An integrated voltage regulator circuit is configured to provide an internal supply voltage to the IC chip. Isolation circuitry is configured to inhibit tampering of the internal supply voltage through the external pins. An analog to digital converter (ADC) circuit is configured to monitor parameters of the internal supply voltage. Security circuitry is configured to detect, using the monitored parameters, indications of tampering and to generate an error signal in response to detecting an indication of tampering.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: April 10, 2018
    Assignee: XILINX, INC.
    Inventors: Austin H. Lesea, Stephen M. Trimberger
  • Publication number: 20170236809
    Abstract: A chip package assembly is provided that includes a substrate, at least one integrated circuit (IC) die and a power management integrated circuit (PMIC). In one example, the IC die of the chip package assembly is disposed on a first surface of the substrate. The PMIC die has a first surface having outputs electrically coupled to the second surface of the IC die. The PMIC die also has a second surface facing away from the first surface. The second surface of the PMIC die has inputs that are electrically coupled to the first surface of the substrate.
    Type: Application
    Filed: February 16, 2016
    Publication date: August 17, 2017
    Applicant: Xilinx, Inc.
    Inventors: Stephen M. Trimberger, Mohsen H. Mardi, David M. Mahoney
  • Patent number: 9608827
    Abstract: Circuits and approaches for de-initializing memory circuits. In one implementation, a memory circuit includes a plurality of memory cells. Each memory cell includes a pair of cross-coupled inverters and first and second access transistors coupled to the pair of cross-coupled inverters. A first bit line is coupled to the first access transistor, and a second bit line is coupled to the second access transistor. A de-initialization circuit is coupled to the first and second bit lines. The de-initialization circuit is configured and arranged to equalize signal states on the first and second bit lines in response to a de-initialization signal.
    Type: Grant
    Filed: January 18, 2016
    Date of Patent: March 28, 2017
    Assignee: XILINX, INC.
    Inventor: Stephen M. Trimberger
  • Patent number: 9584329
    Abstract: Approaches for using a physically unclonable function (PUF) are described. A selector map is used to indicate stable and unstable bits in a PUF value that is generated by a PUF circuit. The stable bits of the PUF value generated by the PUF circuit may be selected for use by an application, and the unstable bits ignored.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: February 28, 2017
    Assignee: XILINX, INC.
    Inventor: Stephen M. Trimberger
  • Patent number: 9530022
    Abstract: In one approach for protecting a design, a plurality of implementations of the design are generated. Each implementation includes an identification function. One of the implementations is selected as a current implementation, and the current implementation is installed on one or more electronic systems. For each electronic system, a method determines whether or not the current implementation is an authorized version on the electronic system from an output value of the identification function. If in the current implementation is not an authorized version on the electronic system, a signal is output indicating that the current implementation is not an authorized version on the electronic system. Periodically, another one of the implementations is selected as a new current implementation, and the new current installation is used for installations on one or more electronic systems.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: December 27, 2016
    Assignee: XILINX, INC.
    Inventors: Jason J. Moore, James B. Anderson, James D. Wesselkamper, Stephen M. Trimberger
  • Patent number: 9520949
    Abstract: Various apparatuses, circuits, systems, and methods for optical communication are disclosed. In some implementations an optical transmitter includes an optical data port configured to engage an optical fiber. The optical transmitter also includes a plurality of lasers coupled to the optical data port and configured and arranged to transmit respective optical signals over the optical fiber via the optical data port when selected. A control circuit of the optical transmitter is configured to receive an input data signal and encode the input data signal for transmission over the optical fiber by selecting one or more of the plurality of lasers at a time. The control circuit is configured to select one or more of the plurality of lasers at a time according to one of a frequency modulation encoding algorithm or an amplitude modulation encoding algorithm.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: December 13, 2016
    Assignee: XILINX, INC.
    Inventors: Stephen M. Trimberger, Austin H. Lesea
  • Patent number: 9483416
    Abstract: A method of processor operation using an integrated circuit (IC) can include loading encrypted program code into the IC through a configuration port of the IC and decrypting the encrypted program code using configuration circuitry of the IC. Decryption of the encrypted program code can result in decrypted program code which can be provided to a target destination.
    Type: Grant
    Filed: October 21, 2010
    Date of Patent: November 1, 2016
    Assignee: XILINX, INC.
    Inventors: Ting Lu, Stephen M. Trimberger, Eric E. Edwards, Weiguang Lu, Kam-Wing Li
  • Patent number: 9444618
    Abstract: Circuits and methods are disclosed for defending against attacks on ring oscillator-based physically unclonable functions (RO PUFs). A control circuit that is coupled to the RO PUF is configured to detect out-of-tolerance operation of the RO PUF. In response to detecting out-of-tolerance operation of the RO PUF, the control circuit disables the RO PUF, and in response to detecting in-tolerance operation, the control circuit enables the RO PUF.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: September 13, 2016
    Assignee: XILINX, INC.
    Inventors: Stephen M. Trimberger, Austin H Lesea
  • Patent number: 9432121
    Abstract: Various apparatuses, circuits, systems, and methods for optical communication are disclosed. In some implementations, an apparatus includes a package substrate and f first interposer mounted on the package substrate. The apparatus also includes a logic circuit and an optical interface circuit connected to the logic circuit via the first interposer. One of the optical interface circuit or the logic circuit is mounted on the first interposer. The optical interface circuit includes a driver circuit configured to receive electronic data signals from the logic circuit. The optical interface circuit also includes an optical transmitter circuit coupled to the driver circuit and configured to output optical data signals encoding the electronic data signals.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: August 30, 2016
    Assignee: XILINX, INC.
    Inventors: Austin H. Lesea, Stephen M. Trimberger
  • Patent number: 9372956
    Abstract: A method of enabling the use of a programmable device having impaired circuitry includes determining one or more locations of the impaired circuitry of the programmable device; generating a defect map for the programmable device based on the determined locations of the impaired circuitry; generating a plurality of configuration bitstreams to implement a circuit in the programmable device; selecting one of the plurality of configuration bitstreams that does not use the impaired circuitry indicated by the defect map; and programming the programmable device with the selected configuration bitstream.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: June 21, 2016
    Assignee: XILINX, INC.
    Inventors: Yuezhen Fan, Eric J. Thorne, Xiao-Yu Li, Glenn O'Rourke, Stephen M. Trimberger
  • Patent number: 9270469
    Abstract: One approach for authenticating data includes storing a plurality of combinations of representations of public keys and session key IDs in a non-volatile memory. A payload and accompanying public key, session key ID, and signature of the payload are input. The signature is a function of the payload and a private key of a key pair that includes the accompanying public key and the private key. Authenticity of the payload is determined based on the accompanying public key and session key ID and the combinations stored in the non-volatile memory, and from the signature and the payload. In response to determining that the payload is authentic, the payload is processed, and in response to determining that the payload is not authentic, processing of the payload is disabled.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: February 23, 2016
    Assignee: XILINX, INC.
    Inventors: Jason J. Moore, Steven E. McNeil, Stephen M. Trimberger
  • Publication number: 20160050017
    Abstract: In an adaptation module relating generally to adaptive optical channel compensation, an analysis module is coupled to receive a first data signal and a second data signal and coupled to provide first information and second information. A comparison module is coupled to compare the first information and the second information to provide third information. An adjustment module is coupled to receive the third information to provide fourth information to compensate for distortion in the second data signal with reference to the first data signal. The second data signal is associated with a conversion of the first data signal to an optical signal for communication via an optical channel.
    Type: Application
    Filed: August 13, 2014
    Publication date: February 18, 2016
    Applicant: Xilinx, Inc.
    Inventors: Austin H. Lesea, Stephen M. Trimberger
  • Patent number: 9225512
    Abstract: Approaches for using a physically unclonable function (PUF) as a key-encrypting key are disclosed. Data is encrypted using a session key, and at least one PUF value is generated from a PUF. The session key and a correctness indicator are encrypted into a corresponding session key pair using the PUF value. Each session key pair is added to the encrypted data. Subsequent decryption, using a subsequently generated PUF value, of the correctness indicator to an expected value indicates a valid decryption. Decryption may be repeated using a different PUF value if the correctness indicator does not match the expected value. In another approach, the session key may be omitted and the payload data may be encrypted with the different PUF values and paired with correctness indicators.
    Type: Grant
    Filed: May 1, 2013
    Date of Patent: December 29, 2015
    Assignee: XILINX, INC.
    Inventor: Stephen M. Trimberger
  • Patent number: 9213835
    Abstract: In one embodiment of the present invention, a secure cryptographic circuit arrangement is provided. The secure cryptographic circuit includes a cryptographic processing block, a spreading sequence generator, and a delay control circuit. The cryptographic processing block has a plurality of signal paths. One or more of the plurality of signal paths includes respective adjustable delay circuits. The spreading sequence generator is configured to output a sequence of pseudo-random numbers. The delay control circuit has an input coupled to an output of the spreading sequence number generator and one or more outputs coupled to respective delay adjustment inputs of the adjustable delay circuits. The delay control circuit is configured to adjust the adjustable delay circuits based on the pseudo-random numbers.
    Type: Grant
    Filed: April 7, 2010
    Date of Patent: December 15, 2015
    Assignee: XILINX, INC.
    Inventors: Austin H. Lesea, Stephen M. Trimberger