Patents by Inventor Stephen M. Trimberger

Stephen M. Trimberger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10860044
    Abstract: Apparatuses and methods relating generally to reduction of allocation of external power and/or ground pins of a microelectronic device are disclosed. In one such apparatus, an external power input pin is configured for receiving an input supply-side power having an external supply voltage level higher than an internal supply voltage level and an external supply current level lower than an internal supply current level. An internal power plane circuit coupled to the external power input pin is configured to step-down a voltage from the external supply voltage level to the internal supply voltage level and to step-up a current from the external supply current level to the internal supply current level to provide an internal power source.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: December 8, 2020
    Assignee: XILINX, INC.
    Inventor: Stephen M. Trimberger
  • Patent number: 10665579
    Abstract: A chip package assembly is provided that includes a substrate, at least one integrated circuit (IC) die and a power management integrated circuit (PMIC). In one example, the IC die of the chip package assembly is disposed on a first surface of the substrate. The PMIC die has a first surface having outputs electrically coupled to the second surface of the IC die. The PMIC die also has a second surface facing away from the first surface. The second surface of the PMIC die has inputs that are electrically coupled to the first surface of the substrate.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: May 26, 2020
    Assignee: XILINX, INC.
    Inventors: Stephen M. Trimberger, Mohsen H. Mardi, David M. Mahoney
  • Publication number: 20200161247
    Abstract: An example integrated circuit (IC) package includes: a processing system and a programmable IC disposed on a substrate, the processing system coupled to the programmable IC through interconnect of the substrate; the processing system including components coupled to a ring interconnect, the components including a processor and an interface controller. The programmable IC includes: an interface endpoint coupled to the interface controller through the interconnect; and at least one peripheral coupled to the interface endpoint and configured for communication with the ring interconnect of the processing system through the interconnect endpoint and the interface controller.
    Type: Application
    Filed: January 27, 2020
    Publication date: May 21, 2020
    Inventors: Austin H. LESEA, Sundararajarao MOHAN, Stephen M. TRIMBERGER
  • Patent number: 10657292
    Abstract: An example method of configuring a programmable integrated circuit (IC) in a computer system includes: selecting a first region of a programmable fabric of the programmable IC for implementation of a shell circuit, the shell circuit configured to interface with a bus of the computer system; selecting a second region of the programmable fabric for implementation of an application circuit, the application circuit configured to interface with the shell circuit; providing a fence region disposed between the first region and the second region, the fence region including a set of un-configured tiles of the programmable fabric; generating configuration data for a circuit design having the first region, the second region, and the fence region; and loading the configuration data to the programmable IC.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: May 19, 2020
    Assignee: XILINX, INC.
    Inventor: Stephen M. Trimberger
  • Patent number: 10573598
    Abstract: An example integrated circuit (IC) package includes: a processing system and a programmable IC disposed on a substrate, the processing system coupled to the programmable IC through interconnect of the substrate; the processing system including components coupled to a ring interconnect, the components including a processor and an interface controller. The programmable IC includes: an interface endpoint coupled to the interface controller through the interconnect; and at least one peripheral coupled to the interface endpoint and configured for communication with the ring interconnect of the processing system through the interconnect endpoint and the interface controller.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: February 25, 2020
    Assignee: XILINX, INC.
    Inventors: Austin H. Lesea, Sundararajarao Mohan, Stephen M. Trimberger
  • Patent number: 10536477
    Abstract: Disclosed approaches for protecting against attacks on a local network device include establishing an access period associated with one remote network device of a plurality of remote network devices. The router rejects messages from remote network devices of the plurality of remote network devices not having associated access periods. The router forwards to the local network device, a message received from the one remote network device during the access period. The router rejects, in response to expiration of the access period, subsequent messages from the one remote network device to the local network device.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: January 14, 2020
    Assignee: XILINX, INC.
    Inventor: Stephen M. Trimberger
  • Patent number: 10505971
    Abstract: Disclosed approaches for protecting against attacks on a network device, a second network device receives a first message from a first network device. In response to the first message, the second network device determines a first area from which the first network device issued the message. The second network device determines whether or not the first area intersects a second area having the second network device. In response to determining that the first area intersects the second area, the second network device acknowledges the first message to the first network device. In response to determining that the first area does not intersect the second area, the second network device rejects the first message.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: December 10, 2019
    Assignee: XILINX, INC.
    Inventor: Stephen M. Trimberger
  • Patent number: 10476598
    Abstract: Various apparatuses, circuits, systems, and methods for optical communication are disclosed. In some implementations, an apparatus includes a package substrate and f first interposer mounted on the package substrate. The apparatus also includes a logic circuit and an optical interface circuit connected to the logic circuit via the first interposer. One of the optical interface circuit or the logic circuit is mounted on the first interposer. The optical interface circuit includes a driver circuit configured to receive electronic data signals from the logic circuit. The optical interface circuit also includes an optical transmitter circuit coupled to the driver circuit and configured to output optical data signals encoding the electronic data signals.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: November 12, 2019
    Assignee: XILINX, INC.
    Inventors: Austin H. Lesea, Stephen M. Trimberger
  • Publication number: 20190188419
    Abstract: An example method of configuring a programmable integrated circuit (IC) in a computer system includes: selecting a first region of a programmable fabric of the programmable IC for implementation of a shell circuit, the shell circuit configured to interface with a bus of the computer system; selecting a second region of the programmable fabric for implementation of an application circuit, the application circuit configured to interface with the shell circuit; providing a fence region disposed between the first region and the second region, the fence region including a set of un-configured tiles of the programmable fabric; generating configuration data for a circuit design having the first region, the second region, and the fence region; and loading the configuration data to the programmable IC.
    Type: Application
    Filed: December 18, 2017
    Publication date: June 20, 2019
    Applicant: Xilinx, Inc.
    Inventor: Stephen M. Trimberger
  • Patent number: 10325646
    Abstract: The disclosure describes approaches for generating a physically unclonable function (PUF) value. Power is applied to a power control circuit, an SRAM, and a PUF control circuit. After initially powering-up the SRAM, the PUF control circuit signals the power control circuit to disable power to the SRAM. The power control circuit disables power to the SRAM, and then re-enables power to the SRAM after having power to the SRAM disabled for a waiting period. The PUF control circuit reads a PUF value from the SRAM by the PUF control circuit after the enabling of power.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: June 18, 2019
    Assignee: XILINX, INC.
    Inventor: Stephen M. Trimberger
  • Publication number: 20190096813
    Abstract: An example integrated circuit (IC) package includes: a processing system and a programmable IC disposed on a substrate, the processing system coupled to the programmable IC through interconnect of the substrate; the processing system including components coupled to a ring interconnect, the components including a processor and an interface controller. The programmable IC includes: an interface endpoint coupled to the interface controller through the interconnect; and at least one peripheral coupled to the interface endpoint and configured for communication with the ring interconnect of the processing system through the interconnect endpoint and the interface controller.
    Type: Application
    Filed: September 28, 2017
    Publication date: March 28, 2019
    Applicant: Xilinx, Inc.
    Inventors: Austin H. Lesea, Sundararajarao Mohan, Stephen M. Trimberger
  • Patent number: 10147666
    Abstract: A method and apparatus are provided that includes an electronic device, a chip package and a method for cooling a chip package in an electronic device. In one example, the chip package includes an interposer or package substrate having a first IC die and a second IC die mounted thereon. The second IC die has a maximum safe operating temperature that is greater than a maximum safe operating temperature of the first IC die. An indicia is disposed on the chip package. The indicia designates an installation orientation of the interposer or package substrate which positions the first IC die upstream of the second IC die relative to a direction of cooling fluid flow.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: December 4, 2018
    Assignee: XILINX, INC.
    Inventors: Stephen M. Trimberger, Austin H. Lesea
  • Patent number: 10038503
    Abstract: In an adaptation module relating generally to adaptive optical channel compensation, an analysis module is coupled to receive a first data signal and a second data signal and coupled to provide first information and second information. A comparison module is coupled to compare the first information and the second information to provide third information. An adjustment module is coupled to receive the third information to provide fourth information to compensate for distortion in the second data signal with reference to the first data signal. The second data signal is associated with a conversion of the first data signal to an optical signal for communication via an optical channel.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: July 31, 2018
    Assignee: XILINX, INC.
    Inventors: Austin H. Lesea, Stephen M. Trimberger
  • Patent number: 10014949
    Abstract: Various apparatuses, circuits, systems, and methods for optical communication are disclosed. In some implementations an optical communication device includes an optical data port configured to support an optical fiber in a fixed position. The optical communication device may further include a plurality of optical communication circuits, each oriented to communicate optical signals at a respective position of a cross section of the optical fiber connected to the optical data port and a control circuit, responsive to optical signals communicated on the optical fiber connected to the optical data port and configured to determine ones of the plurality of optical communication circuits that are misaligned with the optical fiber and disable the determined ones of the plurality of optical communication circuits.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: July 3, 2018
    Assignee: XILINX, INC.
    Inventors: Stephen M. Trimberger, Austin H. Lesea
  • Patent number: 9941880
    Abstract: A system includes an integrated circuit (IC) chip with connections to plurality of external pins. An integrated voltage regulator circuit is configured to provide an internal supply voltage to the IC chip. Isolation circuitry is configured to inhibit tampering of the internal supply voltage through the external pins. An analog to digital converter (ADC) circuit is configured to monitor parameters of the internal supply voltage. Security circuitry is configured to detect, using the monitored parameters, indications of tampering and to generate an error signal in response to detecting an indication of tampering.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: April 10, 2018
    Assignee: XILINX, INC.
    Inventors: Austin H. Lesea, Stephen M. Trimberger
  • Publication number: 20170236809
    Abstract: A chip package assembly is provided that includes a substrate, at least one integrated circuit (IC) die and a power management integrated circuit (PMIC). In one example, the IC die of the chip package assembly is disposed on a first surface of the substrate. The PMIC die has a first surface having outputs electrically coupled to the second surface of the IC die. The PMIC die also has a second surface facing away from the first surface. The second surface of the PMIC die has inputs that are electrically coupled to the first surface of the substrate.
    Type: Application
    Filed: February 16, 2016
    Publication date: August 17, 2017
    Applicant: Xilinx, Inc.
    Inventors: Stephen M. Trimberger, Mohsen H. Mardi, David M. Mahoney
  • Patent number: 9608827
    Abstract: Circuits and approaches for de-initializing memory circuits. In one implementation, a memory circuit includes a plurality of memory cells. Each memory cell includes a pair of cross-coupled inverters and first and second access transistors coupled to the pair of cross-coupled inverters. A first bit line is coupled to the first access transistor, and a second bit line is coupled to the second access transistor. A de-initialization circuit is coupled to the first and second bit lines. The de-initialization circuit is configured and arranged to equalize signal states on the first and second bit lines in response to a de-initialization signal.
    Type: Grant
    Filed: January 18, 2016
    Date of Patent: March 28, 2017
    Assignee: XILINX, INC.
    Inventor: Stephen M. Trimberger
  • Patent number: 9584329
    Abstract: Approaches for using a physically unclonable function (PUF) are described. A selector map is used to indicate stable and unstable bits in a PUF value that is generated by a PUF circuit. The stable bits of the PUF value generated by the PUF circuit may be selected for use by an application, and the unstable bits ignored.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: February 28, 2017
    Assignee: XILINX, INC.
    Inventor: Stephen M. Trimberger
  • Patent number: 9530022
    Abstract: In one approach for protecting a design, a plurality of implementations of the design are generated. Each implementation includes an identification function. One of the implementations is selected as a current implementation, and the current implementation is installed on one or more electronic systems. For each electronic system, a method determines whether or not the current implementation is an authorized version on the electronic system from an output value of the identification function. If in the current implementation is not an authorized version on the electronic system, a signal is output indicating that the current implementation is not an authorized version on the electronic system. Periodically, another one of the implementations is selected as a new current implementation, and the new current installation is used for installations on one or more electronic systems.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: December 27, 2016
    Assignee: XILINX, INC.
    Inventors: Jason J. Moore, James B. Anderson, James D. Wesselkamper, Stephen M. Trimberger
  • Patent number: 9520949
    Abstract: Various apparatuses, circuits, systems, and methods for optical communication are disclosed. In some implementations an optical transmitter includes an optical data port configured to engage an optical fiber. The optical transmitter also includes a plurality of lasers coupled to the optical data port and configured and arranged to transmit respective optical signals over the optical fiber via the optical data port when selected. A control circuit of the optical transmitter is configured to receive an input data signal and encode the input data signal for transmission over the optical fiber by selecting one or more of the plurality of lasers at a time. The control circuit is configured to select one or more of the plurality of lasers at a time according to one of a frequency modulation encoding algorithm or an amplitude modulation encoding algorithm.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: December 13, 2016
    Assignee: XILINX, INC.
    Inventors: Stephen M. Trimberger, Austin H. Lesea