Abstract: A packaged device includes a first die, a second die, and specially spaced and positioned sets of package terminals. The first die includes a pulse-width modulator (PWM), a processor, a timer, high-side drivers, low-side drivers, and a fault protection circuit. The second die includes ultra-high voltage high-side drivers. In an ultra-high voltage application, the PWM and external circuitry together form a switching power supply that generates a high voltage. The high voltage powers external high-side transistors. The processor and timer control the ultra-high voltage high-side drivers, that in turn supply drive signals to the external high-side transistors through the package terminals. External low-side transistors are driven directly by low-side drivers of the first die. If the fault protection circuit detects an excessive current, then the fault protection circuit supplies a disable signal to high-side and low-side drivers of both dice.

Abstract: A power supply system includes an Offline Total Power Management Integrated Circuit (OTPMIC). The OTPMIC controls a Power Factor Correction (PFC) converter, a main AC/DC converter, and a standby AC/DC converter. A PFC Autodetect circuit in the OTPMIC monitors current flow in the PFC converter. If a high power condition is detected, then the PFC Autodetect circuit enables the PFC converter. The high power condition may be a voltage drop across a current sense resistor of a predetermined voltage for a predetermined time, within one half period of the incoming AC supply voltage. If a low power condition is detected, then the PFC Autodetect circuit disables the PFC converter. The PFC Autodetect circuit stores an IMON value that determines the predetermined voltage, and a TMON value that determines the predetermined time. The IMON and TMON values are loaded into the Autodetect circuit across an optocoupler link of the standby converter.

Abstract: A programmable analog tile integrated circuit is configured over a standardized bus by communicating tile configuration information from a first integrated circuit tile, through a second integrated circuit tile, to a third integrated circuit tile. Each of the three integrated circuit tiles is part of an integrated circuit. The standardized bus is formed when the tiles are placed adjacent one another. Data bus and control signal conductors of the adjacent tiles line up and interconnect such that each signal conductor is electrically connected to every tile. Tile configuration information may be written to a selected register identified by an address in any selected one of the tiles using the data bus and control lines, regardless of the relative physical locations of the tile sending and the tile receiving the information. Thus, tile configuration information may pass from one tile to another tile, through any number of intermediate tiles.

Abstract: An LED lamp with an integrated circuit, a rectifier, and a string of series-connected LEDs rectifies an incoming AC signal. The integrated circuit includes power switches that can separately and selectably short out a corresponding one of several groups of LEDs in an LED string across which the rectified AC signal is present. As the voltage across the string increases, the integrated circuit controls the power switches to increase the number of LEDs through which current flows, whereas as the voltage across the string decreases the integrated circuit controls the power switches to decrease the number of LEDs through which current flows. The flow of LED string current is broken to reduce flicker. Alternatively, a valley fill capacitor peaks LED current during the valleys of the incoming AC signal to reduce flicker. LED current is regulated to provide superior efficiency, reliability, power-factor correction, and lamp over-voltage, -current, and -temperature protection.

Abstract: A packaged device includes a first die, a second die, and specially spaced and positioned sets of package terminals. The first die includes a pulse-width modulator (PWM), a processor, a timer, high-side drivers, low-side drivers, and a fault protection circuit. The second die includes ultra-high voltage high-side drivers. In an ultra-high voltage application, the PWM and external circuitry together form a switching power supply that generates a high voltage. The high voltage powers external high-side transistors. The processor and timer control the ultra-high voltage high-side drivers, that in turn supply drive signals to the external high-side transistors through the package terminals. External low-side transistors are driven directly by low-side drivers of the first die. If the fault protection circuit detects an excessive current, then the fault protection circuit supplies a disable signal to high-side and low-side drivers of both dice.

Abstract: A Multi-Tile Power Management Integrated Circuit (MTPMIC) includes tiles including an MCU/ADC tile and a power manager tile. The power manager tile includes a hibernate circuit and a set of Configurable Switching Power Supply Pulse Width Modulator (CSPSPWM) components. The CSPSPWM, in combination with other circuitry external to the integrated circuit, form a switching power supply. The hibernate circuit is operable in a hibernate mode where the CSPSPWM is disabled and the switching power supply no longer generates a supply voltage. A processor in the MCU/ADC tile writes across a standardized bus to configure the hibernate circuit to wake up after a timer determines a configurable amount of time has lapsed, or to wake up in response to a signal present on a terminal of MTPMIC. The processor enables the hibernate mode causing the switching power supply to no longer provide power to the processor and other circuitry of MTPMIC.

Abstract: A Power Management Integrated Circuit (PMIC) includes a pulse width modulator and driver circuit (PWMDC), a processor, and high-side and low-side driver circuitry. The PWMDC, along with components external to the PMIC, forms a switching power supply. A small linear regulator powers the PWMDC from power received via a terminal. The power supply supplies power to other on-chip circuitry, including the driver circuitry and processor. The PWMDC starts an on pulse (of a power supply switching cycle) in response to a clock signal. In a first mode, the PWMDC stops the on pulse based on a signal received from a terminal via an analog feedback signal path. In a second mode, the PWMDC stops the on pulse based on a signal received via a digital feedback signal path. In one example, the digital feedback signal path extends from a terminal, through an ADC, processor, and DAC, to an error node.

Abstract: A Multi-Tile Power Management Integrated Circuit (MTPMIC) includes a processor, a fault protect circuit, a first terminal, a driver that drives the first terminal, a second terminal, and detection circuitry that outputs a digital detection signal indicative of whether a predetermined condition is detected on the second terminal. The processor can program the fault protect circuit so that the fault protect circuit will later disable the driver as a function of multiple signals, including the digital detection signal. The function is programmable by the processor. In one example, if the detection circuitry detects the predetermined condition on the second terminal then the fault protect circuit disables all the high-side drivers and all low-side drivers of the MTPMIC independently of and without input from the processor.

Abstract: A Multi-Tile Power Management Integrated Circuit (MTPMIC) includes tiles including an MCU/ADC tile and a power manager tile. The power manager tile includes a set of Configurable Switching Power Supply Pulse Width Modulator (CSPSPWM) components. These components, in combination with other circuitry external to the integrated circuit, are configurable to form a selected one of a number of different switching power supply circuits. Upon power up, an internal regulator supplies power to the CSPSPWM. The CSPSPWM then controls the power supply to begin switching in a low frequency start-up mode. The CSPSPWM determines during start-up the current sensing method based on circuitry external to the integrated circuit. A supply voltage generated is then supplied via a conductor of a standardized bus to a processor in the MCU/ADC tile. The processor begins executing instructions, and as a result writes across the standardized bus to configure the various tiles of the MTPMIC.

Abstract: A Multi-Tile Power Management Integrated Circuit (MTPMIC) includes tiles including an MCU/ADC tile and a power manager tile. The power manager tile includes a set of Configurable Switching Power Supply Pulse Width Modulator (CSPSPWM) components. These components, in combination with other circuitry external to the integrated circuit, are configurable to form a selected one of a number of different switching power supply circuits. Upon power up, an internal regulator supplies power to the CSPSPWM. The CSPSPWM then controls the power supply to begin switching in a low frequency start-up mode. The CSPSPWM determines during start-up the current sensing method based on circuitry external to the integrated circuit. A supply voltage generated is then supplied via a conductor of a standardized bus to a processor in the MCU/ADC tile. The processor begins executing instructions, and as a result writes across the standardized bus to configure the various tiles of the MTPMIC.

Abstract: An LED lamp includes a rectifier, an integrated circuit and a string of series-connected LEDs. The lamp receives an incoming AC signal such that a rectified version of the signal is present across the LED string. The integrated circuit includes a plurality of power switches. Each power switch is coupled so that it can separately and selectably short out a corresponding one of several groups of LEDs in the string. As the voltage across the string increases the integrated circuit controls the power switches such that the number of LEDs through which current flows increases, whereas as the voltage across the string decreases the integrated circuit controls the power switches such that the number of LEDs through which current flows decreases. LED string current flow is controlled and regulated to provide superior efficiency, reliability, anti-flicker, regulation against line voltage variations, power factor correction, and lamp over-voltage, over-current, and over-temperature protection.

Abstract: A Multi-Tile Power Management Integrated Circuit (MTPMIC) includes tiles including an MCU/ADC tile and a power manager tile. The power manager tile includes a hibernate circuit and a set of Configurable Switching Power Supply Pulse Width Modulator (CSPSPWM) components. The CSPSPWM, in combination with other circuitry external to the integrated circuit, form a switching power supply. The hibernate circuit is operable in a hibernate mode where the CSPSPWM is disabled and the switching power supply no longer generates a supply voltage. A processor in the MCU/ADC tile writes across a standardized bus to configure the hibernate circuit to wake up after a timer determines a configurable amount of time has lapsed, or to wake up in response to a signal present on a terminal of MTPMIC. The processor enables the hibernate mode causing the switching power supply to no longer provide power to the processor and other circuitry of MTPMIC.

Abstract: A packaged device includes a first die, a second die, and specially spaced and positioned sets of package terminals. The first die includes a pulse-width modulator (PWM), a processor, a timer, high-side drivers, low-side drivers, and a fault protection circuit. The second die includes ultra-high voltage high-side drivers. In an ultra-high voltage application, the PWM and external circuitry together form a switching power supply that generates a high voltage. The high voltage powers external high-side transistors. The processor and timer control the ultra-high voltage high-side drivers, that in turn supply drive signals to the external high-side transistors through the package terminals. External low-side transistors are driven directly by low-side drivers of the first die. If the fault protection circuit detects an excessive current, then the fault protection circuit supplies a disable signal to high-side and low-side drivers of both dice.

Abstract: An article made up of a substrate which has a polymer coating applied to at least one of its surfaces, wherein the polymer coating forms an interrupted pattern such that at least 10% to 80% of the substrate surface remains uncoated, and wherein the polymer coating comprises a moisture permeable polymer.

Abstract: A readily scalable modular progammable integrated circuit (IC) with improved power management is provided. An IC is described that contains one master controller module and a multiplicity of slave modules that include power-supplying functions, battery management functions, and analog and digital input-output functions. The master controller module configures the slave modules by writing data to the slave modules' configuration registers through the communication network. Each module contains a multiplicity of configuration registers that determine the module's operational and parametric characteristics. Programmability is achieved by configuring the modules to respond to appropriate signals on the configurable interconnection network.

Abstract: An LED lamp with an integrated circuit, a rectifier, and a string of series-connected LEDs rectifies an incoming AC signal. The integrated circuit includes power switches that can separately and selectably short out a corresponding one of several groups of LEDs in an LED string across which the rectified AC signal is present. As the voltage across the string increases, the integrated circuit controls the power switches to increase the number of LEDs through which current flows, whereas as the voltage across the string decreases the integrated circuit controls the power switches to decrease the number of LEDs through which current flows. The flow of LED string current is broken to reduce flicker. Alternatively, a valley fill capacitor peaks LED current during the valleys of the incoming AC signal to reduce flicker. LED current is regulated to provide superior efficiency, reliability, power-factor correction, and lamp over-voltage, -current, and -temperature protection.

Abstract: A power management integrated circuit includes pairs of high-side and low-side drivers, sensing circuitry, and a processor. The high-side and low-side drivers are used in combination with external discrete NFETs to drive multiple windings of a motor. The N-channel LDMOS transistor of each high-side driver has an associated isolation structure and a tracking and clamping circuit. If the voltage on a terminal of the integrated circuit pulses negative during a switching of current flow to the motor, then the isolation structure and tracking and clamping circuit clamps the voltage on the isolation structure and blocks current flow from the substrate to the drain. An associated ESD protection circuit allows the voltage on the terminal to pulse negative. As a result, a large surge of current that would otherwise flow through the high-side driver is blocked, and is conducted outside the integrated circuit through a body diode of an external NFET.

Abstract: A Multi-Tile Power Management Integrated Circuit (MTPMIC) includes tiles including an MCU/ADC tile and a power manager tile. The power manager tile includes a set of Configurable Switching Power Supply Pulse Width Modulator (CSPSPWM) components. These components, in combination with other circuitry external to the integrated circuit, are configurable to form a selected one of a number of different switching power supply circuits. Upon power up, an internal regulator supplies power to the CSPSPWM. The CSPSPWM then controls the power supply to begin switching in a low frequency start-up mode. The CSPSPWM determines during start-up the current sensing method based on circuitry external to the integrated circuit. A supply voltage generated is then supplied via a conductor of a standardized bus to a processor in the MCU/ADC tile. The processor begins executing instructions, and as a result writes across the standardized bus to configure the various tiles of the MTPMIC.

Abstract: A Multi-Tile Power Management Integrated Circuit (MTPMIC) includes a processor, a fault protect circuit, a first terminal, a driver that drives the first terminal, a second terminal, and detection circuitry that outputs a digital detection signal indicative of whether a predetermined condition is detected on the second terminal. The processor can program the fault protect circuit so that the fault protect circuit will later disable the driver as a function of multiple signals, including the digital detection signal. The function is programmable by the processor. In one example, if the detection circuitry detects the predetermined condition on the second terminal then the fault protect circuit disables all the high-side drivers and all low-side drivers of the MTPMIC independently of and without input from the processor.

Abstract: A Power Management Integrated Circuit (PMIC) includes a pulse width modulator and driver circuit (PWMDC), a processor, and high-side and low-side driver circuitry. The PWMDC, along with components external to the PMIC, forms a switching power supply. A small linear regulator powers the PWMDC from power received via a terminal. The power supply supplies power to other on-chip circuitry, including the driver circuitry and processor. The PWMDC starts an on pulse (of a power supply switching cycle) in response to a clock signal. In a first mode, the PWMDC stops the on pulse based on a signal received from a terminal via an analog feedback signal path. In a second mode, the PWMDC stops the on pulse based on a signal received via a digital feedback signal path. In one example, the digital feedback signal path extends from a terminal, through an ADC, processor, and DAC, to an error node.