Patents by Inventor Steven P. Denbaars

Steven P. Denbaars has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240266165
    Abstract: A III-V or II-VI compound based device is fabricated having one or more layers with an in-plane lattice constant or strain that is at least 20% biaxially relaxed, preferably more than 20% biaxially relaxed, more preferably 50% or more biaxially relaxed, and most preferably at least 70% biaxially relaxed. A III-V or II-VI compound based decomposition stop layer is created on or above a III-V or II-VI compound based decomposition layer, wherein the III-V or II-VI compound based decomposition stop layer has a higher sublimation temperature or melting point as compared to a lower sublimation temperature or melting point of the III-V or II-VI compound based decomposition layer, and a temperature increase decomposes the III-V or II-VI compound based decomposition layer. A III-V or II-VI compound based device structure is grown on or above the III-V or II-VI compound based decomposition stop layer.
    Type: Application
    Filed: June 3, 2022
    Publication date: August 8, 2024
    Applicant: The Regents of the University of California
    Inventors: Shuji Nakamura, Steven P. DenBaars
  • Publication number: 20240258771
    Abstract: A III-nitride based device is fabricated having an in-plane lattice constant or strain that is more than 30% biaxially relaxed, by creating a III-nitride based decomposition stop layer on or above a III-nitride based decomposition layer, wherein a temperature is increased to decompose the III-nitride based decomposition layer; and growing a III-nitride based device structure on or above the III-nitride based decomposition stop layer. The III-nitride based device structure includes at least one of an n-type layer, active layer, and p-type layer, and at least one of the n-type layer, active layer and p-type layer has an in-plane lattice constant or strain that is preferably more than 30% biaxially relaxed, more preferably 50% or more biaxially relaxed, and most preferably at least 70% biaxially relaxed.
    Type: Application
    Filed: May 9, 2022
    Publication date: August 1, 2024
    Applicant: The Regents of the University of California
    Inventors: Philip Chan, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 12027642
    Abstract: According to the present invention, techniques related generally to a photodiode device configured to be receptive to a near ultraviolet (UV-C) emission wavelength range. This wavelength range is specifically designed to be immune to background radiation produced by the Sun, rendering the communication device Solar Blind, and immune to other similar forms of interference. In particular, the present invention provides a light receiving and sensing system using various compositional Al, Ga, Sc, and N solid state materials to detect and measure radiation with a high degree of fidelity. This invention has numerous applications not only in detection and sensing technologies, but also measurement, communication, navigation, and other related aspects.
    Type: Grant
    Filed: May 4, 2023
    Date of Patent: July 2, 2024
    Assignee: PALOMINO LABORATORIES, INC.
    Inventors: Steven P. Denbaars, Dalton Eng-Denbaars
  • Publication number: 20240194822
    Abstract: A method for fabricating small size light emitting diodes (LEDs) on high-quality epitaxial crystal layers. III-nitride epitaxial lateral overgrowth (ELO) layers are grown on a substrate using a growth restrict mask. III-nitride device layers are grown on wings of the III-nitride ELO layers, to form island-like III-nitride semiconductor layers. The wings of the III-nitride ELO layers have at least an order of magnitude smaller defect density than the substrate, resulting in superior characteristics for the devices made thereon. Light emitting mesas are etched from the island-like III-nitride semiconductor layers, wherein each of the light emitting mesas corresponds to a device; and a device unit pattern is etched from the island-like III-nitride semiconductor layers, wherein the device unit pattern is comprised of one or more of the light emitting mesas. The device unit pattern including the island-like III-nitride semiconductor layers is then transferred to display panel or a carrier.
    Type: Application
    Filed: July 13, 2022
    Publication date: June 13, 2024
    Applicant: The Regents of the University of California
    Inventors: Srinivas Gandrothula, Shuji Nakamura, Steven P. DenBaars
  • Publication number: 20240128400
    Abstract: Grow gallium-containing semi-conductor layers are grown on a substrate, wherein the gallium-containing semiconductor layers comprise AlxGayInzNvPwAsu, where 0?x?1, 0?y?1, 0?z?1, 0?v?1, 0?w?1, 0?u?1, v+w+u=1, and x+y+z=1. Dry etching of the gallium-containing semiconductor layers exposes sidewalls of the layers. Surface treatments are performed to recover from damage to the sidewalls resulting from the dry etching. Dielectric materials are deposited on the sidewalls, for example, by atomic layer deposition (ALD), to passivate the sidewalls. The resulting gallium-containing semiconductor layers have an improvement in optical efficiency as compared to gallium-containing semiconductor layers that are not subjected to the surface treatments and the deposition of the dielectric materials.
    Type: Application
    Filed: March 4, 2022
    Publication date: April 18, 2024
    Applicant: The Regents of the University of California
    Inventors: Steven P. DenBaars, Matthew S. Wong
  • Publication number: 20230420617
    Abstract: A nitride-based ultraviolet light emitting diode (UVLED) with an ultraviolet transparent contact (UVTC). The nitride-based UVLED is an alloy composition of (Ga, Al, In, B)N semiconductors, and the UVTC is composed of an oxide with a bandgap larger than that emitted in an active region of the nitride-based UVLED, wherein the oxide is an alloy composition of (Ga, Al, In, B, Mg, Fe, Si, Sn)O semiconductors, such as Ga2O3.
    Type: Application
    Filed: October 29, 2021
    Publication date: December 28, 2023
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Michael Iza, Matthew S. Wong, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20230307579
    Abstract: A method to fabricate micro-size III-nitride light emitting diodes (?LEDs) with an epitaxial tunnel junction comprised of a p+GaN layer, an InxAlyGazN insertion layer, and an n+GaN layer, grown using metalorganic chemical vapor deposition (MOCVD), wherein the ?LEDs have a low forward the GaN layers, which reduces a depletion width of the tunnel junction and increases the tunneling probability. The ?LEDs are fabricated with dimensions that vary from 25 to 10,000 ?m2. It was found that the InxAlyGazN insertion layer can reduce the forward voltage at 20 A/cm2 by at least 0.6 V. The tunnel junction ?LEDs with an n-type and p-type InxAlyGazN insertion layer had a low forward voltage at 20 A/cm2 that was very stable. At dimensions smaller than 1600 ?m2, the low forward voltage is less than 3.2 V.
    Type: Application
    Filed: August 11, 2021
    Publication date: September 28, 2023
    Applicant: The Regents of the University of California
    Inventors: Panpan Li, Hongjian Li, Michael Iza, Shuji Nakamura, Steven P. DenBaars
  • Publication number: 20230268462
    Abstract: A fully transparent UV LED or far-UV LED is disclosed, in which all semiconductor layers except the active region are transparent to the radiation emitted in the active region. The key technology enabling this invention is the transparent tunnel junction, which replaces the optically absorbing p-GaN and metal mirror p-contact currently found in all commercially available UV LEDs. The tunnel junction also enables the use of a second n-AlGaN current spreading layer above the active region (on the p-side of the device) similar to the current spreading layer already found below the active region (on the n-side of the device). Therefore, small-area and/or remote p- and n-contacts can be used, and light can be extracted from both the top-side and bottom-side of the device. This fully transparent semiconductor device can then be packaged using transparent materials into a fully transparent UV LED or far-UV LED with high brightness and efficiency.
    Type: Application
    Filed: July 9, 2021
    Publication date: August 24, 2023
    Applicant: The Regents of the University of California
    Inventors: Christian J. Zollner, Michael Iza, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 11735419
    Abstract: A method for protecting a semiconductor film comprised of one or more layers during processing. The method includes placing a surface of the semiconductor film in direct contact with a surface of a protective covering, such as a separate substrate piece, that forms an airtight or hermetic seal with the surface of the semiconductor film, so as to reduce material degradation and evaporation in the semiconductor film. The method includes processing the semiconductor film under some conditions, such as a thermal annealing and/or controlled ambient, which might cause the semiconductor film's evaporation or degradation without the protective covering.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: August 22, 2023
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Christian J. Zollner, Michael Iza, James S. Speck, Shuji Nakamura, Steven P. DenBaars
  • Publication number: 20230197896
    Abstract: Gallium-containing semiconductor layers are grown on a substrate, followed by dry etching of the gallium-containing semiconductor layers during fabrication of a device. After the dry etching, surface treatments are performed to remove damage from the sidewalls of the device. After the surface treatments, dielectric materials are deposited on the sidewalls of the device to passivate the sidewalls of the device. These steps result in an improvement in forward current-voltage characteristics and reduction in leakage current of the device, as well as an enhancement of light output power and efficiency of the device.
    Type: Application
    Filed: October 30, 2020
    Publication date: June 22, 2023
    Applicant: The Regents of the University of California
    Inventors: Matthew S. Wong, Jordan M. Smith, Steven P. DenBaars
  • Publication number: 20230187573
    Abstract: A III-nitride LED with simultaneous visible and ultraviolet (UV) emission, in which the visible emission is due to conventional InGaN active region mechanisms and the UV emission occurs due to Auger carrier injection into a UV light emitting region, such as impurity-doped AlGaN. The primary application for the III-nitride LED is general airborne pathogen inactivation to prevent the transmission of airborne-mediated pathogens while being safe for humans.
    Type: Application
    Filed: May 28, 2021
    Publication date: June 15, 2023
    Applicant: The Regents of the University of California
    Inventors: Vincent Rienzi, Christian J. Zollner, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 11552452
    Abstract: An optoelectronic device grown on a miscut of GaN, wherein the miscut comprises a semi-polar GaN crystal plane (of the GaN) miscut x degrees from an m-plane of the GaN and in a c-direction of the GaN, where ?15<x<?1 and 1<x<15 degrees.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: January 10, 2023
    Assignee: The Regents of the University of California
    Inventors: Po Shan Hsu, Kathryn M. Kelchner, Robert M. Farrell, Daniel A. Haeger, Hiroaki Ohta, Anurag Tyagi, Shuji Nakamura, Steven P. DenBaars, James S. Speck
  • Publication number: 20230006426
    Abstract: A Group-III nitride light emitting device that utilizes scattering of hot carriers generated by Auger recombination from an externally electrically-driven, relatively narrow band gap carrier generation region into a relatively wide band gap carrier recombination region, such that the relatively wide band gap carrier recombination region of the Group-III nitride light emitting device is internally electrically injected by the hot carriers generated in the externally electrically-injected relatively narrow band gap carrier generation region. The device is used for generation of incoherent light (a light-emitting diode) or coherent light (a laser diode).
    Type: Application
    Filed: February 17, 2021
    Publication date: January 5, 2023
    Applicant: The Regents of the University of California
    Inventors: Daniel A. Cohen, Daniel Myers, Claude C. A. Weisbuch, Steven P. DenBaars
  • Patent number: 11532922
    Abstract: A Vertical Cavity Surface Emitting Laser (VCSEL) including a light emitting III-nitride active region including quantum wells (QWs), wherein each of the quantum wells have a thickness of more than 8 nm, a cavity length of at least 7 ?, or at least 20 ?, where lambda is a peak wavelength of the light emitted from the active region, layers with reduced surface roughness, a tunnel junction intracavity contact. The VCSEL is flip chip bonded using In—Au bonding. This is the first report of a VCSEL capable of continuous wave operation.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: December 20, 2022
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Charles Forman, SeungGeun Lee, Erin C. Young, Jared Kearns, Steven P. DenBaars, James S. Speck, Shuji Nakamura
  • Publication number: 20220384682
    Abstract: A micro light emitting diode including a mesa comprising an epitaxial structure and having a top surface with an area less than 10 micrometers by 10 micrometers, less than 1 micrometer by 1 micrometer, or less than 0.5 micrometers by 0.5 micrometers; a dielectric on the top surface; and a via hole in the dielectric that is centered or self aligned on the top surface, e.g., perfectly centered or centered within 0.5% of the center of the top surface. In one or more examples, the micro light emitting diode is plasma damage free. Metallization in the via hole is used to electrically contact the micro light emitting diode.
    Type: Application
    Filed: October 28, 2020
    Publication date: December 1, 2022
    Applicant: The Regents of the University of California
    Inventors: Jordan M. Smith, Steven P. DenBaars
  • Patent number: 11411137
    Abstract: A III-nitride optoelectronic device includes at least one n-type layer, an active region grown on or above the n-type layer, at least one p-type layer grown on or above the active region, and a tunnel junction grown on or above the p-type layer. A conductive oxide may be wafer bonded on or above the tunnel junction, wherein the conductive oxide comprises a transparent conductor and may contain light extraction features on its non-bonded face. The tunnel junction also enables monolithic incorporation of electrically-injected and optically-pumped III-nitride layers, wherein the optically-pumped III-nitride layers comprise high-indium-content III-nitride layers formed as quantum wells (QWs) that are grown on or above the tunnel junction. The optically-pumped high-indium-content III-nitride layers emit light at a longer wavelength than the electrically-injected III-nitride layers.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: August 9, 2022
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Asad J. Mughal, Stacy J. Kowsz, Robert M. Farrell, Benjamin P. Yonkee, Erin C. Young, Christopher D. Pynn, Tal Margalith, James S. Speck, Shuji Nakamura, Steven P. DenBaars
  • Publication number: 20220239068
    Abstract: Vertical Cavity Surface Emitting Laser (VCSEL) configurations are disclosed. In a first example, the VCSEL includes a III-Nitride active region between a p-type III-Nitride layer and an n-type III-Nitride layer; and a curved minor on or above the p-type III-Nitride layer. The curved mirror can be formed in a III-Nitride layer or a Transparent Oxide (TO) material and enables the formation of a long VCSEL cavity that improves VCSEL lifetime, VCSEL output power, VCSEL power efficiency and VCSEL reliability. In a second example, the VCSEL has an active region with a high indium content. In a third example, the VCSEL is transparent.
    Type: Application
    Filed: May 28, 2020
    Publication date: July 28, 2022
    Applicant: The Regents of the University of California
    Inventors: Jared Kearns, Daniel A. Cohen, Joonho Back, Nathan Palmquist, Tal Margalith, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20220181513
    Abstract: A hybrid growth method for III-nitride tunnel junction devices uses metal-organic chemical vapor deposition (MOCVD) to grow one or more light-emitting or light-absorbing structures and ammonia-assisted or plasma-assisted molecular beam epitaxy (MBE) to grow one or more tunnel junctions. Unlike p-type gallium nitride (p-GaN) grown by MOCVD, p-GaN grown by MBE is conductive as grown, which allows for its use in a tunnel junction. Moreover, the doping limits of MBE materials are higher than MOCVD materials. The tunnel junctions can be used to incorporate multiple active regions into a single device. In addition, n-type GaN (n-GaN) can be used as a current spreading layer on both sides of the device, eliminating the need for a transparent conductive oxide (TCO) layer or a silver (Au) mirror.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 9, 2022
    Applicant: The Regents of the University of California
    Inventors: Erin C. Young, Benjamin P. Yonkee, John T. Leonard, Tal Margalith, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 11348908
    Abstract: A flip chip III-Nitride LED which utilizes a dielectric coating backed by a metallic reflector (e.g., aluminum or silver). High reflectivity and low resistance contacts for optoelectronic devices. Low ESD rating optoelectronic devices. A VCSEL comprising a tunnel junction for current and optical confinement.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: May 31, 2022
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Benjamin P. Yonkee, Erin C. Young, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20220102580
    Abstract: A method for fabricating a device, as well as the device itself, which includes growing a bonding layer on a first wafer or substrate, wherein the bonding layer includes at least partially relaxed features; and then bonding a second wafer or substrate to the features in on the first wafer or substrate, to cap and contact the features with separately grown material.
    Type: Application
    Filed: January 16, 2020
    Publication date: March 31, 2022
    Applicant: The Regents of the University of California
    Inventors: Caroline E. Reilly, Umesh K. Mishra, Stacia Keller, Steven P. DenBaars