Patents by Inventor Steven P. Denbaars
Steven P. Denbaars has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220239068Abstract: Vertical Cavity Surface Emitting Laser (VCSEL) configurations are disclosed. In a first example, the VCSEL includes a III-Nitride active region between a p-type III-Nitride layer and an n-type III-Nitride layer; and a curved minor on or above the p-type III-Nitride layer. The curved mirror can be formed in a III-Nitride layer or a Transparent Oxide (TO) material and enables the formation of a long VCSEL cavity that improves VCSEL lifetime, VCSEL output power, VCSEL power efficiency and VCSEL reliability. In a second example, the VCSEL has an active region with a high indium content. In a third example, the VCSEL is transparent.Type: ApplicationFiled: May 28, 2020Publication date: July 28, 2022Applicant: The Regents of the University of CaliforniaInventors: Jared Kearns, Daniel A. Cohen, Joonho Back, Nathan Palmquist, Tal Margalith, Steven P. DenBaars, Shuji Nakamura
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Publication number: 20220181513Abstract: A hybrid growth method for III-nitride tunnel junction devices uses metal-organic chemical vapor deposition (MOCVD) to grow one or more light-emitting or light-absorbing structures and ammonia-assisted or plasma-assisted molecular beam epitaxy (MBE) to grow one or more tunnel junctions. Unlike p-type gallium nitride (p-GaN) grown by MOCVD, p-GaN grown by MBE is conductive as grown, which allows for its use in a tunnel junction. Moreover, the doping limits of MBE materials are higher than MOCVD materials. The tunnel junctions can be used to incorporate multiple active regions into a single device. In addition, n-type GaN (n-GaN) can be used as a current spreading layer on both sides of the device, eliminating the need for a transparent conductive oxide (TCO) layer or a silver (Au) mirror.Type: ApplicationFiled: December 1, 2021Publication date: June 9, 2022Applicant: The Regents of the University of CaliforniaInventors: Erin C. Young, Benjamin P. Yonkee, John T. Leonard, Tal Margalith, James S. Speck, Steven P. DenBaars, Shuji Nakamura
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Patent number: 11348908Abstract: A flip chip III-Nitride LED which utilizes a dielectric coating backed by a metallic reflector (e.g., aluminum or silver). High reflectivity and low resistance contacts for optoelectronic devices. Low ESD rating optoelectronic devices. A VCSEL comprising a tunnel junction for current and optical confinement.Type: GrantFiled: August 17, 2017Date of Patent: May 31, 2022Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Benjamin P. Yonkee, Erin C. Young, James S. Speck, Steven P. DenBaars, Shuji Nakamura
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Publication number: 20220102580Abstract: A method for fabricating a device, as well as the device itself, which includes growing a bonding layer on a first wafer or substrate, wherein the bonding layer includes at least partially relaxed features; and then bonding a second wafer or substrate to the features in on the first wafer or substrate, to cap and contact the features with separately grown material.Type: ApplicationFiled: January 16, 2020Publication date: March 31, 2022Applicant: The Regents of the University of CaliforniaInventors: Caroline E. Reilly, Umesh K. Mishra, Stacia Keller, Steven P. DenBaars
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Patent number: 11286419Abstract: A method for fabricating a composite useful in a white light emitting device, includes mixing a phosphor and a filler to form a mixture; sintering the mixture (e.g., using spark plasma sintering) to form a composite; and annealing the composite to reduce oxygen vacancies and improve optical properties of the composite. Also disclosed is a white light emitting device including a laser diode or light emitting diode optically pumping the phosphor in the composite to produce white light. The composite fabricated using the method (and having. e.g., at most 50% phosphor by weight) can (1) reduce an operating temperature of the phosphor by 55 degrees, (2) increase an external quantum efficiency (e.g., by at least 15%) of the white light emitting device, and (3) result in color points and quality of the white light that is equal to or improved, as compared to without the filler.Type: GrantFiled: July 31, 2017Date of Patent: March 29, 2022Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Clayton J. Cozzan, Steven P. DenBaars, Ram Seshadri
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Publication number: 20220029049Abstract: A method for fabricating an (Al,Ga,In,B)N or III-nitride semiconductor device, including performing a growth of III-nitride or (Al,Ga,In,B)N material including a p-n junction with an active region and using metal-organic chemical vapor deposition (MOCVD) or chemical vapor deposition; and performing a subsequent regrowth of n-type (Al,Ga,In,B)N or III-nitride material using MOCVD or chemical vapor deposition while utilizing a pulsed delta n-type doping scheme to realize an abrupt, smoother surface of the n-type material and a higher carrier concentration in the n-type material. In another example, the method comprises forming a mesa having a top surface; and activating magnesium in the p-type GaN of the (Al,Ga,In,B)N material through openings in the top surface that expose the p-type GaN's surface. The openings are formed before or after the subsequent regrowth of the tunnel junction.Type: ApplicationFiled: October 7, 2021Publication date: January 27, 2022Applicants: The Regents of the University of California, King Abdulaziz City For Science And Technology (KACST)Inventors: Abdullah Ibrahim Alhassan, Ahmed Alyamani, Abdulrahman Albadri, James S. Speck, Steven P. DenBaars
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Publication number: 20220005980Abstract: Micro-scale light emitting diodes (micro-LEDs) with ultra-low leakage current results from a sidewall passivation method for the micro-LEDs using a chemical treatment followed by conformal dielectric deposition, which reduces or eliminates sidewall damage and surface recombination, and the passivated micro-LEDs can achieve higher efficiency than micro-LEDs without sidewall treatments. Moreover, the sidewall profile of micro-LEDs can be altered by varying the conditions of chemical treatment.Type: ApplicationFiled: October 31, 2019Publication date: January 6, 2022Applicant: The Regents of the University of CaliforniaInventors: Tal Margalith, Matthew S. Wong, Lesley Chan, Steven P. DenBaars
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Patent number: 11217722Abstract: A hybrid growth method for III-nitride tunnel junction devices uses metal-organic chemical vapor deposition (MOCVD) to grow one or more light-emitting or light-absorbing structures and ammonia-assisted or plasma-assisted molecular beam epitaxy (MBE) to grow one or more tunnel junctions. Unlike p-type gallium nitride (p-GaN) grown by MOCVD, p-GaN grown by MBE is conductive as grown, which allows for its use in a tunnel junction. Moreover, the doping limits of MBE materials are higher than MOCVD materials. The tunnel junctions can be used to incorporate multiple active regions into a single device. In addition, n-type GaN (n-GaN) can be used as a current spreading layer on both sides of the device, eliminating the need for a transparent conductive oxide (TCO) layer or a silver (Au) mirror.Type: GrantFiled: July 11, 2016Date of Patent: January 4, 2022Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Erin C. Young, Benjamin P. Yonkee, John T. Leonard, Tal Margalith, James S. Speck, Steven P. DenBaars, Shuji Nakamura
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Patent number: 11164997Abstract: A III-Nitride LED which utilizes n-type III-Nitride layers for current spreading on both sides of the device. A multilayer dielectric coating is used underneath the wire bond pads, both LED contacts are deposited in one step, and the p-side wire bond pad is moved off of the mesa. The LED has a wall plug efficiency or External Quantum Efficiency (EQE) over 70%, a fractional EQE droop of less than 7% at 20 A/cm2 drive current and less than 15% at 35 A/cm2 drive current. The LEDs can be patterned into an LED array and each LED can have an edge dimension of between 5 and 50 ?m. The LED emission wavelength can be below 400 nm and aluminum can be added to the n-type III-Nitride layers such that the bandgap of the n-type III-nitride layers is larger than the LED emission photon energy.Type: GrantFiled: August 17, 2017Date of Patent: November 2, 2021Assignee: THE REGENTS OF THE UNIVERISTY OF CALIFORNIAInventors: Benjamin P. Yonkee, Erin C. Young, James S. Speck, Steven P. DenBaars, Shuji Nakamura
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Patent number: 11158760Abstract: A method for fabricating an (Al,Ga,In,B)N or III-nitride semiconductor device, including performing a growth of III-nitride or (Al,Ga,In,B)N material including a p-n junction with an active region and using metal-organic chemical vapor deposition (MOCVD) or chemical vapor deposition; and performing a subsequent regrowth of n-type (Al,Ga,In,B)N or III-nitride material using MOCVD or chemical vapor deposition while utilizing a pulsed delta n-type doping scheme to realize an abrupt, smoother surface of the n-type material and a higher carrier concentration in the n-type material. In another example, the method comprises forming a mesa having a top surface; and activating magnesium in the p-type GaN of the (Al,Ga,In,B)N material through openings in the top surface that expose the p-type GaN's surface. The openings are formed before or after the subsequent regrowth of the tunnel junction.Type: GrantFiled: February 7, 2019Date of Patent: October 26, 2021Assignees: The Regents of the University of California, KING ABDULAZIZ CITY FOR SCIENCE AND TECHNOLOGY (KACST)Inventors: Abdullah Ibrahim Alhassan, James S. Speck, Steven P. DenBaars, Ahmed Alyamani, Abdulrahman Albadri
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Publication number: 20210193871Abstract: A reduction in leakage current and an increase in efficiency of III-nitride LEDs is obtained by sidewall passivation using atomic layer deposition of a dielectric. Atomic layer deposition is a hydrogen-free deposition method, which avoids problems associated with the effects of hydrogen on passivation and transparency.Type: ApplicationFiled: October 31, 2018Publication date: June 24, 2021Applicant: The Regents of the University of CaliforniaInventors: Matthew S. Wong, David Hwang, Abdullah Alhassan, Steven P. DenBaars
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Patent number: 10985285Abstract: A physical vapor deposition (e.g., sputter deposition) method for III-nitride tunnel junction devices uses metal-organic chemical vapor deposition (MOCVD) to grow one or more light-emitting or light-absorbing structures and electron cyclotron resonance (ECR) sputtering to grow one or more tunnel junctions. In another method, the surface of the p-type layer is treated before deposition of the tunnel junction on the p-type layer. In yet another method, the whole device (including tunnel junction) is grown using MOCVD and the p-type layers of the III-nitride material are reactivated by lateral diffusion of hydrogen through mesa sidewalls in the III-nitride material, with one or more lateral dimensions of the mesa that are less than or equal to about 200 ?m. A flip chip display device is also disclosed.Type: GrantFiled: August 17, 2017Date of Patent: April 20, 2021Assignee: The Regents of the University of CaliforniaInventors: Benjamin P. Yonkee, Asad J. Mughal, David Hwang, Erin C. Young, James S. Speck, Steven P. DenBaars, Shuji Nakamura
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Publication number: 20210104504Abstract: A flip chip III-Nitride LED which utilizes a dielectric coating backed by a metallic reflector (e.g., aluminum or silver). High reflectivity and low resistance contacts for optoelectronic devices. Low ESD rating optoelectronic devices. A VCSEL comprising a tunnel junction for current and optical confinement.Type: ApplicationFiled: August 17, 2017Publication date: April 8, 2021Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Benjamin P. Yonkee, Erin C. Young, Charles Forman, John T. Leonard, SeungGeun Lee, Dan Cohen, Robert M. Farrell, Michael Iza, Burhan Saifaddin, Abdullah Almogbel, Humberto Foronda, James S. Speck, Steven P. DenBaars, Shuji Nakamura
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Publication number: 20200335663Abstract: A III-nitride optoelectronic device includes at least one n-type layer, an active region grown on or above the n-type layer, at least one p-type layer grown on or above the active region, and a tunnel junction grown on or above the p-type layer. A conductive oxide may be wafer bonded on or above the tunnel junction, wherein the conductive oxide comprises a transparent conductor and may contain light extraction features on its non-bonded face. The tunnel junction also enables monolithic incorporation of electrically-injected and optically-pumped III-nitride layers, wherein the optically-pumped III-nitride layers comprise high-indium-content III-nitride layers formed as quantum wells (QWs) that are grown on or above the tunnel junction. The optically-pumped high-indium-content III-nitride layers emit light at a longer wavelength than the electrically-injected III-nitride layers.Type: ApplicationFiled: February 6, 2017Publication date: October 22, 2020Applicant: The Regents of the University of CaliforniaInventors: Asad J. Mughal, Stacy J. Kowsz, Robert M. Farrell, Benjamin P. Yonkee, Erin C. Young, Christopher D. Pynn, Tal Margalith, James S. Speck, Shuji Nakamura, Steven P. DenBaars
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Publication number: 20200244036Abstract: A Vertical Cavity Surface Emitting Laser (VCSEL) including a light emitting III-nitride active region including quantum wells (QWs), wherein each of the quantum wells have a thickness of more than 8 nm, a cavity length of at least 7 ?, or at least 20 ?, where lambda is a peak wavelength of the light emitted from the active region, layers with reduced surface roughness, a tunnel junction intracavity contact. The VCSEL is flip chip bonded using In-Au bonding. This is the first report of a VCSEL capable of continuous wave operation.Type: ApplicationFiled: October 2, 2018Publication date: July 30, 2020Applicant: The Regents of the University of CaliforniaInventors: Charles Forman, SeungGeun Lee, Erin C. Young, Jared Kearns, Steven P. DenBaars, James S. Speck, Shuji Nakamura
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Publication number: 20200243334Abstract: A method for protecting a semiconductor film comprised of one or more layers during processing. The method includes placing a surface of the semiconductor film in direct contact with a surface of a protective covering, such as a separate substrate piece, that forms an airtight or hermetic seal with the surface of the semiconductor film, so as to reduce material degradation and evaporation in the semiconductor film. The method includes processing the semiconductor film under some conditions, such as a thermal annealing and/or controlled ambient, which might cause the semiconductor film's evaporation or degradation without the protective covering.Type: ApplicationFiled: January 24, 2020Publication date: July 30, 2020Applicant: The Regents of the University of CaliforniaInventors: Christian J. Zollner, Michael Iza, James S. Speck, Shuji Nakamura, Steven P. DenBaars
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Patent number: 10685835Abstract: A III-nitride tunnel junction with a modified p-n interface, wherein the modified p-n interface includes a delta-doped layer to reduce tunneling resistance. The delta-doped layer may be doped using donor atoms comprised of Oxygen (O), Germanium (Ge) or Silicon (Si); acceptor atoms comprised of Magnesium (Mg) or Zinc (Zn); or impurities comprised of Iron (Fe) or Carbon (C).Type: GrantFiled: November 1, 2016Date of Patent: June 16, 2020Assignees: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, KING ABDULAZIZ CITY FOR SCIENCE AND TECHNOLOGY (KACST)Inventors: Benjamin P. Yonkee, Erin C. Young, John T. Leonard, Tal Margalith, James S. Speck, Steven P. DenBaars, Shuji Nakamura
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Patent number: 10658557Abstract: A transparent light emitting diode (LED) includes a plurality of III-nitride layers, including an active region that emits light, wherein all of the layers except for the active region are transparent for an emission wavelength of the light, such that the light is extracted effectively through all of the layers and in multiple directions through the layers. Moreover, the surface of one or more of the III-nitride layers may be roughened, textured, patterned or shaped to enhance light extraction.Type: GrantFiled: September 12, 2019Date of Patent: May 19, 2020Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Shuji Nakamura, Steven P. DenBaars, Hirokuni Asamizu
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Patent number: 10644213Abstract: A transparent light emitting diode (LED) includes a plurality of III-nitride layers, including an active region that emits light, wherein all of the layers except for the active region are transparent for an emission wavelength of the light, such that the light is extracted effectively through all of the layers and in multiple directions through the layers. Moreover, the surface of one or more of the III-nitride layers may be roughened, textured, patterned or shaped to enhance light extraction.Type: GrantFiled: September 11, 2019Date of Patent: May 5, 2020Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Shuji Nakamura, Steven P. DenBaars, Hirokuni Asamizu
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Patent number: 10593854Abstract: A transparent light emitting diode (LED) includes a plurality of III-nitride layers, including an active region that emits light, wherein all of the layers except for the active region are transparent for an emission wavelength of the light, such that the light is extracted effectively through all of the layers and in multiple directions through the layers. Moreover, the surface of one or more of the III-nitride layers may be roughened, textured, patterned or shaped to enhance light extraction.Type: GrantFiled: September 13, 2019Date of Patent: March 17, 2020Assignee: The Regents of the University of CaliforniaInventors: Shuji Nakamura, Steven P. DenBaars, Hirokuni Asamizu